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{
    "id": 41057,
    "url": "http://patches.dpdk.org/api/patches/41057/",
    "web_url": "http://patches.dpdk.org/patch/41057/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<1528892062-4997-24-git-send-email-tomaszx.jozwiak@intel.com>",
    "date": "2018-06-13T12:14:07",
    "name": "[v3,23/38] crypto/qat: move code into appropriate files",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "aac384cfbbd6d566b82456e958147f442ba0bcad",
    "submitter": {
        "id": 949,
        "url": "http://patches.dpdk.org/api/people/949/",
        "name": "Tomasz Jozwiak",
        "email": "tomaszx.jozwiak@intel.com"
    },
    "delegate": {
        "id": 22,
        "url": "http://patches.dpdk.org/api/users/22/",
        "username": "pdelarag",
        "first_name": "Pablo",
        "last_name": "de Lara Guarch",
        "email": "pablo.de.lara.guarch@intel.com"
    },
    "mbox": "http://patches.dpdk.org/patch/41057/mbox/",
    "series": [
        {
            "id": 111,
            "url": "http://patches.dpdk.org/api/series/111/",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=111",
            "date": "2018-06-13T12:13:44",
            "name": "crypto/qat: refactor to support multiple services",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/111/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/41057/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/41057/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "References": "<1523040732-3290-1-git-send-email-fiona.trahe@intel.com>\n\t<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>",
        "X-Mailman-Version": "2.1.15",
        "X-IronPort-AV": "E=Sophos;i=\"5.51,218,1526367600\"; d=\"scan'208\";a=\"63727764\"",
        "Date": "Wed, 13 Jun 2018 14:14:07 +0200",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "X-ExtLoop1": "1",
        "X-BeenThere": "dev@dpdk.org",
        "Message-Id": "<1528892062-4997-24-git-send-email-tomaszx.jozwiak@intel.com>",
        "X-Original-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BBF5B1EFDF;\n\tWed, 13 Jun 2018 14:15:32 +0200 (CEST)",
            "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n\tby dpdk.org (Postfix) with ESMTP id DBEE11EF4A\n\tfor <dev@dpdk.org>; Wed, 13 Jun 2018 14:15:02 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t13 Jun 2018 05:14:59 -0700",
            "from tjozwiax-mobl.ger.corp.intel.com (HELO localhost.localdomain)\n\t([10.103.104.42])\n\tby fmsmga001.fm.intel.com with ESMTP; 13 Jun 2018 05:14:55 -0700"
        ],
        "Subject": "[dpdk-dev] [PATCH v3 23/38] crypto/qat: move code into appropriate\n\tfiles",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "X-Mailer": "git-send-email 2.7.4",
        "Precedence": "list",
        "From": "Tomasz Jozwiak <tomaszx.jozwiak@intel.com>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "X-Amp-File-Uploaded": "False",
        "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "Delivered-To": "patchwork@dpdk.org",
        "In-Reply-To": "<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>",
        "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "To": "fiona.trahe@intel.com,\n\ttomaszx.jozwiak@intel.com,\n\tdev@dpdk.org",
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Fiona Trahe <fiona.trahe@intel.com>\n\nMove all code into appropriate files, no actual code changes. Specifically:\n - Rename rte_qat_cryptodev.c to qat_sym_pmd.c\n - Create qat_sym_pmd.h and populate with fn prototypes for qat_sym_pmd.c\n - Create qat_comp_pmd.c/.h and populate with placeholder functions\n - Create qat_asym_pmd.c/.h and populate with placeholder functions\n - Rename qat_crypto_capabilities.h to qat_sym_capabilities.h\n - Move CRYPTODEV_NAME_QAT_SYM_PMD from qat_common.h to qat_sym_pmd.h\n - Move qat_sym_dev_private from qat_device.h to qat_sym_pmd.h\n - Move prototype for qat_sym_dev_info_get frm qat_device.h 2 qat_sym_pmd.h\n - Move all qat_device.c sym dev_ops fns to qat_sym_pmd.c file\n - Move all qat_sym.c dev_ops fns to qat_sym_pmd.c file\n - Remove unused header file #includes from all files.\n - Move pci_id_qat_map, probe/release/register from\n   rte_qat_cryptodev.c to qat_device.c\n - Moved stray comment for bpi_cipher_ctx_init() from qat_sym.c\n   to qat_sym_session.c\n - Changed all files to use SPDX license header\n\nSigned-off-by: Fiona Trahe <fiona.trahe@intel.com>\n---\n drivers/crypto/qat/Makefile                   |   4 +-\n drivers/crypto/qat/meson.build                |  11 +-\n drivers/crypto/qat/qat_asym_pmd.c             |  17 +\n drivers/crypto/qat/qat_asym_pmd.h             |  15 +\n drivers/crypto/qat/qat_common.c               |  54 +++\n drivers/crypto/qat/qat_common.h               |  15 +-\n drivers/crypto/qat/qat_comp_pmd.c             |  18 +\n drivers/crypto/qat/qat_comp_pmd.h             |  29 ++\n drivers/crypto/qat/qat_device.c               | 141 +++++---\n drivers/crypto/qat/qat_device.h               |  31 +-\n drivers/crypto/qat/qat_qp.c                   |   2 +-\n drivers/crypto/qat/qat_qp.h                   |   9 +-\n drivers/crypto/qat/qat_sym.c                  | 246 ++-----------\n drivers/crypto/qat/qat_sym.h                  |  28 +-\n ..._capabilities.h => qat_sym_capabilities.h} |   6 +-\n drivers/crypto/qat/qat_sym_pmd.c              | 326 ++++++++++++++++++\n drivers/crypto/qat/qat_sym_pmd.h              |  39 +++\n drivers/crypto/qat/qat_sym_session.c          |  17 +-\n drivers/crypto/qat/qat_sym_session.h          |   2 +-\n drivers/crypto/qat/rte_qat_cryptodev.c        | 258 --------------\n 20 files changed, 665 insertions(+), 603 deletions(-)\n create mode 100644 drivers/crypto/qat/qat_asym_pmd.c\n create mode 100644 drivers/crypto/qat/qat_asym_pmd.h\n create mode 100644 drivers/crypto/qat/qat_comp_pmd.c\n create mode 100644 drivers/crypto/qat/qat_comp_pmd.h\n rename drivers/crypto/qat/{qat_crypto_capabilities.h => qat_sym_capabilities.h} (99%)\n create mode 100644 drivers/crypto/qat/qat_sym_pmd.c\n create mode 100644 drivers/crypto/qat/qat_sym_pmd.h\n delete mode 100644 drivers/crypto/qat/rte_qat_cryptodev.c",
    "diff": "diff --git a/drivers/crypto/qat/Makefile b/drivers/crypto/qat/Makefile\nindex 902c47ff4..d467683fd 100644\n--- a/drivers/crypto/qat/Makefile\n+++ b/drivers/crypto/qat/Makefile\n@@ -26,7 +26,9 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_device.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_qp.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym_session.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_common.c\n-SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += rte_qat_cryptodev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym_pmd.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_asym_pmd.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_comp_pmd.c\n \n # export include files\n SYMLINK-y-include +=\ndiff --git a/drivers/crypto/qat/meson.build b/drivers/crypto/qat/meson.build\nindex 12910c377..e22e08fba 100644\n--- a/drivers/crypto/qat/meson.build\n+++ b/drivers/crypto/qat/meson.build\n@@ -5,11 +5,12 @@ dep = dependency('libcrypto', required: false)\n if not dep.found()\n \tbuild = false\n endif\n-sources = files('qat_sym.c', 'qat_qp.c',\n-\t\t'qat_sym_session.c',\n-\t\t'qat_common.c',\n-\t\t'rte_qat_cryptodev.c',\n-\t\t'qat_device.c')\n+sources = files('qat_common.c',\n+\t\t'qat_qp.c',\n+\t\t'qat_device.c',\n+\t\t'qat_sym_pmd.c', 'qat_sym.c', 'qat_sym_session.c',\n+\t\t'qat_asym_pmd.c',\n+\t\t'qat_comp_pmd.c')\n includes += include_directories('qat_adf')\n deps += ['bus_pci']\n ext_deps += dep\ndiff --git a/drivers/crypto/qat/qat_asym_pmd.c b/drivers/crypto/qat/qat_asym_pmd.c\nnew file mode 100644\nindex 000000000..8d36300ac\n--- /dev/null\n+++ b/drivers/crypto/qat/qat_asym_pmd.c\n@@ -0,0 +1,17 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Intel Corporation\n+ */\n+\n+#include \"qat_asym_pmd.h\"\n+\n+int\n+qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused)\n+{\n+\treturn 0;\n+}\n+\n+int\n+qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused)\n+{\n+\treturn 0;\n+}\ndiff --git a/drivers/crypto/qat/qat_asym_pmd.h b/drivers/crypto/qat/qat_asym_pmd.h\nnew file mode 100644\nindex 000000000..0465e0300\n--- /dev/null\n+++ b/drivers/crypto/qat/qat_asym_pmd.h\n@@ -0,0 +1,15 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Intel Corporation\n+ */\n+\n+#ifndef _QAT_ASYM_PMD_H_\n+#define _QAT_ASYM_PMD_H_\n+\n+#include \"qat_device.h\"\n+\n+int\n+qat_asym_dev_create(struct qat_pci_device *qat_pci_dev);\n+\n+int\n+qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev);\n+#endif /* _QAT_ASYM_PMD_H_ */\ndiff --git a/drivers/crypto/qat/qat_common.c b/drivers/crypto/qat/qat_common.c\nindex a8865904f..f1759ea76 100644\n--- a/drivers/crypto/qat/qat_common.c\n+++ b/drivers/crypto/qat/qat_common.c\n@@ -3,6 +3,7 @@\n  */\n \n #include \"qat_common.h\"\n+#include \"qat_device.h\"\n #include \"qat_logs.h\"\n \n int\n@@ -51,3 +52,56 @@ qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buf_start,\n \n \treturn 0;\n }\n+\n+void qat_stats_get(struct qat_pci_device *dev,\n+\t\tstruct qat_common_stats *stats,\n+\t\tenum qat_service_type service)\n+{\n+\tint i;\n+\tstruct qat_qp **qp;\n+\n+\tif (stats == NULL || dev == NULL || service >= QAT_SERVICE_INVALID) {\n+\t\tPMD_DRV_LOG(ERR, \"invalid param: stats %p, dev %p, service %d\",\n+\t\t\t\tstats, dev, service);\n+\t\treturn;\n+\t}\n+\n+\tqp = dev->qps_in_use[service];\n+\tfor (i = 0; i < ADF_MAX_QPS_PER_BUNDLE; i++) {\n+\t\tif (qp[i] == NULL) {\n+\t\t\tPMD_DRV_LOG(DEBUG, \"Service %d Uninitialised qp %d\",\n+\t\t\t\t\tservice, i);\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tstats->enqueued_count += qp[i]->stats.enqueued_count;\n+\t\tstats->dequeued_count += qp[i]->stats.dequeued_count;\n+\t\tstats->enqueue_err_count += qp[i]->stats.enqueue_err_count;\n+\t\tstats->dequeue_err_count += qp[i]->stats.dequeue_err_count;\n+\t}\n+}\n+\n+void qat_stats_reset(struct qat_pci_device *dev,\n+\t\tenum qat_service_type service)\n+{\n+\tint i;\n+\tstruct qat_qp **qp;\n+\n+\tif (dev == NULL || service >= QAT_SERVICE_INVALID) {\n+\t\tPMD_DRV_LOG(ERR, \"invalid param: dev %p, service %d\",\n+\t\t\t\tdev, service);\n+\t\treturn;\n+\t}\n+\n+\tqp = dev->qps_in_use[service];\n+\tfor (i = 0; i < ADF_MAX_QPS_PER_BUNDLE; i++) {\n+\t\tif (qp[i] == NULL) {\n+\t\t\tPMD_DRV_LOG(DEBUG, \"Service %d Uninitialised qp %d\",\n+\t\t\t\t\tservice, i);\n+\t\t\tcontinue;\n+\t\t}\n+\t\tmemset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));\n+\t}\n+\n+\tPMD_DRV_LOG(DEBUG, \"QAT crypto: %d stats cleared\", service);\n+}\ndiff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h\nindex fcf5c4c09..8ecebe954 100644\n--- a/drivers/crypto/qat/qat_common.h\n+++ b/drivers/crypto/qat/qat_common.h\n@@ -8,9 +8,6 @@\n \n #include <rte_mbuf.h>\n \n-/**< Intel(R) QAT Symmetric Crypto PMD device name */\n-#define CRYPTODEV_NAME_QAT_SYM_PMD\tcrypto_qat\n-\n /**< Intel(R) QAT device name for PCI registration */\n #define QAT_PCI_NAME\tqat\n /*\n@@ -21,10 +18,9 @@\n /* Intel(R) QuickAssist Technology device generation is enumerated\n  * from one according to the generation of the device\n  */\n-\n enum qat_device_gen {\n \tQAT_GEN1 = 1,\n-\tQAT_GEN2,\n+\tQAT_GEN2\n };\n \n enum qat_service_type {\n@@ -62,8 +58,17 @@ struct qat_common_stats {\n \t/**< Total error count on operations dequeued */\n };\n \n+struct qat_pci_device;\n+\n int\n qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buf_start,\n \t\tstruct qat_sgl *list, uint32_t data_len);\n+void\n+qat_stats_get(struct qat_pci_device *dev,\n+\t\tstruct qat_common_stats *stats,\n+\t\tenum qat_service_type service);\n+void\n+qat_stats_reset(struct qat_pci_device *dev,\n+\t\tenum qat_service_type service);\n \n #endif /* _QAT_COMMON_H_ */\ndiff --git a/drivers/crypto/qat/qat_comp_pmd.c b/drivers/crypto/qat/qat_comp_pmd.c\nnew file mode 100644\nindex 000000000..547b3db49\n--- /dev/null\n+++ b/drivers/crypto/qat/qat_comp_pmd.c\n@@ -0,0 +1,18 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Intel Corporation\n+ */\n+\n+#include \"qat_comp_pmd.h\"\n+\n+\n+int\n+qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused)\n+{\n+\treturn 0;\n+}\n+\n+int\n+qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused)\n+{\n+\treturn 0;\n+}\ndiff --git a/drivers/crypto/qat/qat_comp_pmd.h b/drivers/crypto/qat/qat_comp_pmd.h\nnew file mode 100644\nindex 000000000..cc31246c3\n--- /dev/null\n+++ b/drivers/crypto/qat/qat_comp_pmd.h\n@@ -0,0 +1,29 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Intel Corporation\n+ */\n+\n+#ifndef _QAT_COMP_PMD_H_\n+#define _QAT_COMP_PMD_H_\n+\n+#include \"qat_device.h\"\n+\n+\n+/**< Intel(R) QAT Compression PMD device name */\n+#define COMPRESSDEV_NAME_QAT_PMD\tcomp_qat\n+\n+\n+/** private data structure for a QAT compression device.\n+ * This QAT device is a device offering only a compression service,\n+ * there can be one of these on each qat_pci_device (VF).\n+ */\n+struct qat_comp_dev_private {\n+\tstruct qat_pci_device *qat_dev;\n+\t/**< The qat pci device hosting the service */\n+};\n+\n+int\n+qat_comp_dev_create(struct qat_pci_device *qat_pci_dev);\n+\n+int\n+qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev);\n+#endif /* _QAT_COMP_PMD_H_ */\ndiff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c\nindex 8b2ac5a5f..c9d4b32ed 100644\n--- a/drivers/crypto/qat/qat_device.c\n+++ b/drivers/crypto/qat/qat_device.c\n@@ -4,7 +4,9 @@\n \n #include \"qat_device.h\"\n #include \"adf_transport_access_macros.h\"\n-#include \"qat_qp.h\"\n+#include \"qat_sym_pmd.h\"\n+#include \"qat_asym_pmd.h\"\n+#include \"qat_comp_pmd.h\"\n \n /* Hardware device information per generation */\n __extension__\n@@ -24,58 +26,25 @@ struct qat_gen_hw_data qp_gen_config[] =  {\n static struct qat_pci_device qat_pci_devices[QAT_MAX_PCI_DEVICES];\n static int qat_nb_pci_devices;\n \n-int qat_sym_dev_config(__rte_unused struct rte_cryptodev *dev,\n-\t\t__rte_unused struct rte_cryptodev_config *config)\n-{\n-\tPMD_INIT_FUNC_TRACE();\n-\treturn 0;\n-}\n-\n-int qat_sym_dev_start(__rte_unused struct rte_cryptodev *dev)\n-{\n-\tPMD_INIT_FUNC_TRACE();\n-\treturn 0;\n-}\n-\n-void qat_sym_dev_stop(__rte_unused struct rte_cryptodev *dev)\n-{\n-\tPMD_INIT_FUNC_TRACE();\n-}\n-\n-int qat_sym_dev_close(struct rte_cryptodev *dev)\n-{\n-\tint i, ret;\n-\n-\tPMD_INIT_FUNC_TRACE();\n-\n-\tfor (i = 0; i < dev->data->nb_queue_pairs; i++) {\n-\t\tret = qat_sym_qp_release(dev, i);\n-\t\tif (ret < 0)\n-\t\t\treturn ret;\n-\t}\n-\n-\treturn 0;\n-}\n+/*\n+ * The set of PCI devices this driver supports\n+ */\n \n-void qat_sym_dev_info_get(struct rte_cryptodev *dev,\n-\t\t\tstruct rte_cryptodev_info *info)\n-{\n-\tstruct qat_sym_dev_private *internals = dev->data->dev_private;\n-\tconst struct qat_qp_hw_data *sym_hw_qps =\n-\t\tqp_gen_config[internals->qat_dev->qat_dev_gen]\n-\t\t\t      .qp_hw_data[QAT_SERVICE_SYMMETRIC];\n-\n-\tPMD_INIT_FUNC_TRACE();\n-\tif (info != NULL) {\n-\t\tinfo->max_nb_queue_pairs =\n-\t\t\tqat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC);\n-\t\tinfo->feature_flags = dev->feature_flags;\n-\t\tinfo->capabilities = internals->qat_dev_capabilities;\n-\t\tinfo->sym.max_nb_sessions = RTE_QAT_PMD_MAX_NB_SESSIONS;\n-\t\tinfo->driver_id = cryptodev_qat_driver_id;\n-\t\tinfo->pci_dev = RTE_DEV_TO_PCI(dev->device);\n-\t}\n-}\n+static const struct rte_pci_id pci_id_qat_map[] = {\n+\t\t{\n+\t\t\tRTE_PCI_DEVICE(0x8086, 0x0443),\n+\t\t},\n+\t\t{\n+\t\t\tRTE_PCI_DEVICE(0x8086, 0x37c9),\n+\t\t},\n+\t\t{\n+\t\t\tRTE_PCI_DEVICE(0x8086, 0x19e3),\n+\t\t},\n+\t\t{\n+\t\t\tRTE_PCI_DEVICE(0x8086, 0x6f55),\n+\t\t},\n+\t\t{.device_id = 0},\n+};\n \n \n static struct qat_pci_device *\n@@ -203,3 +172,71 @@ qat_pci_device_release(struct rte_pci_device *pci_dev)\n \t\t\t\tname, qat_nb_pci_devices);\n \treturn 0;\n }\n+\n+static int\n+qat_pci_dev_destroy(struct qat_pci_device *qat_pci_dev,\n+\t\tstruct rte_pci_device *pci_dev)\n+{\n+\tqat_sym_dev_destroy(qat_pci_dev);\n+\tqat_comp_dev_destroy(qat_pci_dev);\n+\tqat_asym_dev_destroy(qat_pci_dev);\n+\treturn qat_pci_device_release(pci_dev);\n+}\n+\n+static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n+\t\tstruct rte_pci_device *pci_dev)\n+{\n+\tint ret = 0;\n+\tstruct qat_pci_device *qat_pci_dev;\n+\n+\tPMD_DRV_LOG(DEBUG, \"Found QAT device at %02x:%02x.%x\",\n+\t\t\tpci_dev->addr.bus,\n+\t\t\tpci_dev->addr.devid,\n+\t\t\tpci_dev->addr.function);\n+\n+\tqat_pci_dev = qat_pci_device_allocate(pci_dev);\n+\tif (qat_pci_dev == NULL)\n+\t\treturn -ENODEV;\n+\n+\tret = qat_sym_dev_create(qat_pci_dev);\n+\tif (ret != 0)\n+\t\tgoto error_out;\n+\n+\tret = qat_comp_dev_create(qat_pci_dev);\n+\tif (ret != 0)\n+\t\tgoto error_out;\n+\n+\tret = qat_asym_dev_create(qat_pci_dev);\n+\tif (ret != 0)\n+\t\tgoto error_out;\n+\n+\treturn 0;\n+\n+error_out:\n+\tqat_pci_dev_destroy(qat_pci_dev, pci_dev);\n+\treturn ret;\n+\n+}\n+\n+static int qat_pci_remove(struct rte_pci_device *pci_dev)\n+{\n+\tstruct qat_pci_device *qat_pci_dev;\n+\n+\tif (pci_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tqat_pci_dev = qat_get_qat_dev_from_pci_dev(pci_dev);\n+\tif (qat_pci_dev == NULL)\n+\t\treturn 0;\n+\n+\treturn qat_pci_dev_destroy(qat_pci_dev, pci_dev);\n+}\n+\n+static struct rte_pci_driver rte_qat_pmd = {\n+\t.id_table = pci_id_qat_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING,\n+\t.probe = qat_pci_probe,\n+\t.remove = qat_pci_remove\n+};\n+RTE_PMD_REGISTER_PCI(QAT_PCI_NAME, rte_qat_pmd);\n+RTE_PMD_REGISTER_PCI_TABLE(QAT_PCI_NAME, pci_id_qat_map);\ndiff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h\nindex 5424a9a94..fd1819354 100644\n--- a/drivers/crypto/qat/qat_device.h\n+++ b/drivers/crypto/qat/qat_device.h\n@@ -4,8 +4,8 @@\n #ifndef _QAT_DEVICE_H_\n #define _QAT_DEVICE_H_\n \n-#include <rte_cryptodev_pmd.h>\n #include <rte_bus_pci.h>\n+\n #include \"qat_common.h\"\n #include \"qat_logs.h\"\n #include \"adf_transport_access_macros.h\"\n@@ -18,12 +18,6 @@\n #define QAT_MAX_PCI_DEVICES\t48\n #define QAT_DEV_NAME_MAX_LEN\t64\n \n-\n-extern uint8_t cryptodev_qat_driver_id;\n-\n-extern int qat_sym_qp_release(struct rte_cryptodev *dev,\n-\tuint16_t queue_pair_id);\n-\n /*\n  * This struct holds all the data about a QAT pci device\n  * including data about all services it supports.\n@@ -63,20 +57,6 @@ struct qat_pci_device {\n \n };\n \n-/** private data structure for a QAT device.\n- * This QAT device is a device offering only symmetric crypto service,\n- * there can be one of these on each qat_pci_device (VF),\n- * in future there may also be private data structures for other services.\n- */\n-struct qat_sym_dev_private {\n-\tstruct qat_pci_device *qat_dev;\n-\t/**< The qat pci device hosting the service */\n-\tuint8_t sym_dev_id;\n-\t/**< Device instance for this rte_cryptodev */\n-\tconst struct rte_cryptodev_capabilities *qat_dev_capabilities;\n-\t/* QAT device symmetric crypto capabilities */\n-};\n-\n struct qat_gen_hw_data {\n \tenum qat_device_gen dev_gen;\n \tconst struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_PER_BUNDLE];\n@@ -84,14 +64,6 @@ struct qat_gen_hw_data {\n \n extern struct qat_gen_hw_data qp_gen_config[];\n \n-int qat_sym_dev_config(struct rte_cryptodev *dev,\n-\t\tstruct rte_cryptodev_config *config);\n-int qat_sym_dev_start(struct rte_cryptodev *dev);\n-void qat_sym_dev_stop(struct rte_cryptodev *dev);\n-int qat_sym_dev_close(struct rte_cryptodev *dev);\n-void qat_sym_dev_info_get(struct rte_cryptodev *dev,\n-\tstruct rte_cryptodev_info *info);\n-\n struct qat_pci_device *\n qat_pci_device_allocate(struct rte_pci_device *pci_dev);\n int\n@@ -99,4 +71,5 @@ qat_pci_device_release(struct rte_pci_device *pci_dev);\n struct qat_pci_device *\n qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev);\n \n+\n #endif /* _QAT_DEVICE_H_ */\ndiff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c\nindex 869140fc0..7b2dc3f90 100644\n--- a/drivers/crypto/qat/qat_qp.c\n+++ b/drivers/crypto/qat/qat_qp.c\n@@ -12,8 +12,8 @@\n #include <rte_prefetch.h>\n \n #include \"qat_logs.h\"\n-#include \"qat_qp.h\"\n #include \"qat_device.h\"\n+#include \"qat_qp.h\"\n #include \"adf_transport_access_macros.h\"\n \n \ndiff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h\nindex 49d9f29d3..73888b805 100644\n--- a/drivers/crypto/qat/qat_qp.h\n+++ b/drivers/crypto/qat/qat_qp.h\n@@ -5,9 +5,10 @@\n #define _QAT_QP_H_\n \n #include \"qat_common.h\"\n-#include <rte_cryptodev_pmd.h>\n #include \"adf_transport_access_macros.h\"\n \n+struct qat_pci_device;\n+\n #define QAT_CSR_HEAD_WRITE_THRESH 32U\n /* number of requests to accumulate before writing head CSR */\n #define QAT_CSR_TAIL_WRITE_THRESH 32U\n@@ -76,9 +77,9 @@ struct qat_queue {\n struct qat_qp {\n \tvoid\t\t\t*mmap_bar_addr;\n \tuint16_t\t\tinflights16;\n-\tstruct\tqat_queue\ttx_q;\n-\tstruct\tqat_queue\trx_q;\n-\tstruct\tqat_common_stats stats;\n+\tstruct qat_queue\ttx_q;\n+\tstruct qat_queue\trx_q;\n+\tstruct qat_common_stats stats;\n \tstruct rte_mempool *op_cookie_pool;\n \tvoid **op_cookies;\n \tuint32_t nb_descriptors;\ndiff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c\nindex 8007e25d6..15244d113 100644\n--- a/drivers/crypto/qat/qat_sym.c\n+++ b/drivers/crypto/qat/qat_sym.c\n@@ -2,6 +2,8 @@\n  * Copyright(c) 2015-2018 Intel Corporation\n  */\n \n+#include <openssl/evp.h>\n+\n #include <rte_mempool.h>\n #include <rte_mbuf.h>\n #include <rte_hexdump.h>\n@@ -9,14 +11,10 @@\n #include <rte_bus_pci.h>\n #include <rte_byteorder.h>\n \n-#include <openssl/evp.h>\n-\n #include \"qat_logs.h\"\n #include \"qat_sym_session.h\"\n #include \"qat_sym.h\"\n-#include \"qat_qp.h\"\n-#include \"adf_transport_access_macros.h\"\n-#include \"qat_device.h\"\n+#include \"qat_sym_pmd.h\"\n \n #define BYTE_LENGTH    8\n /* bpi is only used for partial blocks of DES and AES\n@@ -82,9 +80,6 @@ bpi_cipher_decrypt(uint8_t *src, uint8_t *dst,\n \treturn -EINVAL;\n }\n \n-/** Creates a context in either AES or DES in ECB mode\n- *  Depends on openssl libcrypto\n- */\n \n static inline uint32_t\n qat_bpicipher_preprocess(struct qat_sym_session *ctx,\n@@ -197,57 +192,6 @@ qat_bpicipher_postprocess(struct qat_sym_session *ctx,\n \treturn sym_op->cipher.data.length - last_block_len;\n }\n \n-uint16_t\n-qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,\n-\t\tuint16_t nb_ops)\n-{\n-\treturn qat_enqueue_op_burst(qp, (void **)ops, nb_ops);\n-}\n-\n-static int\n-qat_sym_process_response(void **op, uint8_t *resp,\n-\t\t__rte_unused void *op_cookie,\n-\t\t__rte_unused enum qat_device_gen qat_dev_gen)\n-{\n-\n-\tstruct icp_qat_fw_comn_resp *resp_msg =\n-\t\t\t(struct icp_qat_fw_comn_resp *)resp;\n-\tstruct rte_crypto_op *rx_op = (struct rte_crypto_op *)(uintptr_t)\n-\t\t\t(resp_msg->opaque_data);\n-\n-#ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX\n-\trte_hexdump(stdout, \"qat_response:\", (uint8_t *)resp_msg,\n-\t\t\tsizeof(struct icp_qat_fw_comn_resp));\n-#endif\n-\n-\tif (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=\n-\t\t\tICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(\n-\t\t\tresp_msg->comn_hdr.comn_status)) {\n-\n-\t\trx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n-\t} else {\n-\t\tstruct qat_sym_session *sess = (struct qat_sym_session *)\n-\t\t\t\t\t\tget_session_private_data(\n-\t\t\t\t\t\trx_op->sym->session,\n-\t\t\t\t\t\tcryptodev_qat_driver_id);\n-\n-\t\tif (sess->bpi_ctx)\n-\t\t\tqat_bpicipher_postprocess(sess, rx_op);\n-\t\trx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n-\t}\n-\t*op = (void *)rx_op;\n-\n-\treturn 0;\n-}\n-\n-\n-uint16_t\n-qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n-\t\tuint16_t nb_ops)\n-{\n-\treturn qat_dequeue_op_burst(qp, (void **)ops, nb_ops);\n-}\n-\n static inline void\n set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,\n \t\tstruct icp_qat_fw_la_cipher_req_params *cipher_param,\n@@ -293,7 +237,7 @@ set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,\n \t\t\tiv_length);\n }\n \n-static int\n+int\n qat_sym_build_request(void *in_op, uint8_t *out_msg,\n \t\tvoid *op_cookie, enum qat_device_gen qat_dev_gen)\n {\n@@ -716,168 +660,38 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,\n \treturn 0;\n }\n \n-\n-static void qat_stats_get(struct qat_pci_device *dev,\n-\t\tstruct qat_common_stats *stats,\n-\t\tenum qat_service_type service)\n-{\n-\tint i;\n-\tstruct qat_qp **qp;\n-\n-\tif (stats == NULL || dev == NULL || service >= QAT_SERVICE_INVALID) {\n-\t\tPMD_DRV_LOG(ERR, \"invalid param: stats %p, dev %p, service %d\",\n-\t\t\t\tstats, dev, service);\n-\t\treturn;\n-\t}\n-\n-\tqp = dev->qps_in_use[service];\n-\tfor (i = 0; i < ADF_MAX_QPS_PER_BUNDLE; i++) {\n-\t\tif (qp[i] == NULL) {\n-\t\t\tPMD_DRV_LOG(DEBUG, \"Service %d Uninitialised qp %d\",\n-\t\t\t\t\tservice, i);\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tstats->enqueued_count += qp[i]->stats.enqueued_count;\n-\t\tstats->dequeued_count += qp[i]->stats.dequeued_count;\n-\t\tstats->enqueue_err_count += qp[i]->stats.enqueue_err_count;\n-\t\tstats->dequeue_err_count += qp[i]->stats.dequeue_err_count;\n-\t}\n-}\n-\n-void qat_sym_stats_get(struct rte_cryptodev *dev,\n-\t\tstruct rte_cryptodev_stats *stats)\n-{\n-\tstruct qat_common_stats qat_stats = {0};\n-\tstruct qat_sym_dev_private *qat_priv;\n-\n-\tif (stats == NULL || dev == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"invalid ptr: stats %p, dev %p\", stats, dev);\n-\t\treturn;\n-\t}\n-\tqat_priv = dev->data->dev_private;\n-\n-\tqat_stats_get(qat_priv->qat_dev, &qat_stats, QAT_SERVICE_SYMMETRIC);\n-\tstats->enqueued_count = qat_stats.enqueued_count;\n-\tstats->dequeued_count = qat_stats.dequeued_count;\n-\tstats->enqueue_err_count = qat_stats.enqueue_err_count;\n-\tstats->dequeue_err_count = qat_stats.dequeue_err_count;\n-}\n-\n-static void qat_stats_reset(struct qat_pci_device *dev,\n-\t\tenum qat_service_type service)\n-{\n-\tint i;\n-\tstruct qat_qp **qp;\n-\n-\tif (dev == NULL || service >= QAT_SERVICE_INVALID) {\n-\t\tPMD_DRV_LOG(ERR, \"invalid param: dev %p, service %d\",\n-\t\t\t\tdev, service);\n-\t\treturn;\n-\t}\n-\n-\tqp = dev->qps_in_use[service];\n-\tfor (i = 0; i < ADF_MAX_QPS_PER_BUNDLE; i++) {\n-\t\tif (qp[i] == NULL) {\n-\t\t\tPMD_DRV_LOG(DEBUG, \"Service %d Uninitialised qp %d\",\n-\t\t\t\t\tservice, i);\n-\t\t\tcontinue;\n-\t\t}\n-\t\tmemset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));\n-\t}\n-\n-\tPMD_DRV_LOG(DEBUG, \"QAT crypto: %d stats cleared\", service);\n-}\n-\n-void qat_sym_stats_reset(struct rte_cryptodev *dev)\n-{\n-\tstruct qat_sym_dev_private *qat_priv;\n-\n-\tif (dev == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"invalid cryptodev ptr %p\", dev);\n-\t\treturn;\n-\t}\n-\tqat_priv = dev->data->dev_private;\n-\n-\tqat_stats_reset(qat_priv->qat_dev, QAT_SERVICE_SYMMETRIC);\n-\n-}\n-\n-int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)\n+int\n+qat_sym_process_response(void **op, uint8_t *resp,\n+\t\t__rte_unused void *op_cookie,\n+\t\t__rte_unused enum qat_device_gen qat_dev_gen)\n {\n-\tstruct qat_sym_dev_private *qat_private = dev->data->dev_private;\n \n-\tPMD_DRV_LOG(DEBUG, \"Release sym qp %u on device %d\",\n-\t\t\t\tqueue_pair_id, dev->data->dev_id);\n-\n-\tqat_private->qat_dev->qps_in_use[QAT_SERVICE_SYMMETRIC][queue_pair_id]\n-\t\t\t\t\t\t= NULL;\n-\n-\treturn qat_qp_release((struct qat_qp **)\n-\t\t\t&(dev->data->queue_pairs[queue_pair_id]));\n-}\n-\n-int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n-\tconst struct rte_cryptodev_qp_conf *qp_conf,\n-\tint socket_id, struct rte_mempool *session_pool __rte_unused)\n-{\n-\tstruct qat_qp *qp;\n-\tint ret = 0;\n-\tuint32_t i;\n-\tstruct qat_qp_config qat_qp_conf;\n-\n-\tstruct qat_qp **qp_addr =\n-\t\t\t(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);\n-\tstruct qat_sym_dev_private *qat_private = dev->data->dev_private;\n-\tconst struct qat_qp_hw_data *sym_hw_qps =\n-\t\t\tqp_gen_config[qat_private->qat_dev->qat_dev_gen]\n-\t\t\t\t      .qp_hw_data[QAT_SERVICE_SYMMETRIC];\n-\tconst struct qat_qp_hw_data *qp_hw_data = sym_hw_qps + qp_id;\n-\n-\t/* If qp is already in use free ring memory and qp metadata. */\n-\tif (*qp_addr != NULL) {\n-\t\tret = qat_sym_qp_release(dev, qp_id);\n-\t\tif (ret < 0)\n-\t\t\treturn ret;\n-\t}\n-\tif (qp_id >= qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC)) {\n-\t\tPMD_DRV_LOG(ERR, \"qp_id %u invalid for this device\", qp_id);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tqat_qp_conf.hw = qp_hw_data;\n-\tqat_qp_conf.build_request = qat_sym_build_request;\n-\tqat_qp_conf.process_response = qat_sym_process_response;\n-\tqat_qp_conf.cookie_size = sizeof(struct qat_sym_op_cookie);\n-\tqat_qp_conf.nb_descriptors = qp_conf->nb_descriptors;\n-\tqat_qp_conf.socket_id = socket_id;\n-\tqat_qp_conf.service_str = \"sym\";\n-\n-\tret = qat_qp_setup(qat_private->qat_dev, qp_addr, qp_id, &qat_qp_conf);\n-\tif (ret != 0)\n-\t\treturn ret;\n-\n-\t/* store a link to the qp in the qat_pci_device */\n-\tqat_private->qat_dev->qps_in_use[QAT_SERVICE_SYMMETRIC][qp_id]\n-\t\t\t\t\t\t\t= *qp_addr;\n-\n-\tqp = (struct qat_qp *)*qp_addr;\n+\tstruct icp_qat_fw_comn_resp *resp_msg =\n+\t\t\t(struct icp_qat_fw_comn_resp *)resp;\n+\tstruct rte_crypto_op *rx_op = (struct rte_crypto_op *)(uintptr_t)\n+\t\t\t(resp_msg->opaque_data);\n \n-\tfor (i = 0; i < qp->nb_descriptors; i++) {\n+#ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX\n+\trte_hexdump(stdout, \"qat_response:\", (uint8_t *)resp_msg,\n+\t\t\tsizeof(struct icp_qat_fw_comn_resp));\n+#endif\n \n-\t\tstruct qat_sym_op_cookie *sql_cookie =\n-\t\t\t\tqp->op_cookies[i];\n+\tif (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=\n+\t\t\tICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(\n+\t\t\tresp_msg->comn_hdr.comn_status)) {\n \n-\t\tsql_cookie->qat_sgl_src_phys_addr =\n-\t\t\t\trte_mempool_virt2iova(sql_cookie) +\n-\t\t\t\toffsetof(struct qat_sym_op_cookie,\n-\t\t\t\tqat_sgl_src);\n+\t\trx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n+\t} else {\n+\t\tstruct qat_sym_session *sess = (struct qat_sym_session *)\n+\t\t\t\t\t\tget_session_private_data(\n+\t\t\t\t\t\trx_op->sym->session,\n+\t\t\t\t\t\tcryptodev_qat_driver_id);\n \n-\t\tsql_cookie->qat_sgl_dst_phys_addr =\n-\t\t\t\trte_mempool_virt2iova(sql_cookie) +\n-\t\t\t\toffsetof(struct qat_sym_op_cookie,\n-\t\t\t\tqat_sgl_dst);\n+\t\tif (sess->bpi_ctx)\n+\t\t\tqat_bpicipher_postprocess(sess, rx_op);\n+\t\trx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n \t}\n+\t*op = (void *)rx_op;\n \n-\treturn ret;\n+\treturn 0;\n }\ndiff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h\nindex 78b40e378..d887dc126 100644\n--- a/drivers/crypto/qat/qat_sym.h\n+++ b/drivers/crypto/qat/qat_sym.h\n@@ -6,11 +6,8 @@\n #define _QAT_SYM_H_\n \n #include <rte_cryptodev_pmd.h>\n-#include <rte_memzone.h>\n \n #include \"qat_common.h\"\n-#include \"qat_device.h\"\n-#include \"qat_crypto_capabilities.h\"\n \n /*\n  * This macro rounds up a number to a be a multiple of\n@@ -29,23 +26,12 @@ struct qat_sym_op_cookie {\n \tphys_addr_t qat_sgl_dst_phys_addr;\n };\n \n-void qat_sym_stats_get(struct rte_cryptodev *dev,\n-\tstruct rte_cryptodev_stats *stats);\n-void qat_sym_stats_reset(struct rte_cryptodev *dev);\n-\n-int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n-\tconst struct rte_cryptodev_qp_conf *rx_conf, int socket_id,\n-\tstruct rte_mempool *session_pool);\n-int qat_sym_qp_release(struct rte_cryptodev *dev,\n-\tuint16_t queue_pair_id);\n-\n-\n-uint16_t\n-qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,\n-\t\tuint16_t nb_ops);\n-\n-uint16_t\n-qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n-\t\tuint16_t nb_ops);\n+int\n+qat_sym_build_request(void *in_op, uint8_t *out_msg,\n+\t\tvoid *op_cookie, enum qat_device_gen qat_dev_gen);\n+int\n+qat_sym_process_response(void **op, uint8_t *resp,\n+\t\t__rte_unused void *op_cookie,\n+\t\t__rte_unused enum qat_device_gen qat_dev_gen);\n \n #endif /* _QAT_SYM_H_ */\ndiff --git a/drivers/crypto/qat/qat_crypto_capabilities.h b/drivers/crypto/qat/qat_sym_capabilities.h\nsimilarity index 99%\nrename from drivers/crypto/qat/qat_crypto_capabilities.h\nrename to drivers/crypto/qat/qat_sym_capabilities.h\nindex 001c32c5d..d10a95ecb 100644\n--- a/drivers/crypto/qat/qat_crypto_capabilities.h\n+++ b/drivers/crypto/qat/qat_sym_capabilities.h\n@@ -2,8 +2,8 @@\n  * Copyright(c) 2017-2018 Intel Corporation\n  */\n \n-#ifndef _QAT_CRYPTO_CAPABILITIES_H_\n-#define _QAT_CRYPTO_CAPABILITIES_H_\n+#ifndef _QAT_SYM_CAPABILITIES_H_\n+#define _QAT_SYM_CAPABILITIES_H_\n \n #define QAT_BASE_GEN1_SYM_CAPABILITIES\t\t\t\t\t\\\n \t{\t/* SHA1 HMAC */\t\t\t\t\t\t\\\n@@ -554,4 +554,4 @@\n \t\t}, }\t\t\t\t\t\t\t\\\n \t}\n \n-#endif /* _QAT_CRYPTO_CAPABILITIES_H_ */\n+#endif /* _QAT_SYM_CAPABILITIES_H_ */\ndiff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c\nnew file mode 100644\nindex 000000000..aa71b4641\n--- /dev/null\n+++ b/drivers/crypto/qat/qat_sym_pmd.c\n@@ -0,0 +1,326 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2015-2018 Intel Corporation\n+ */\n+\n+#include <rte_bus_pci.h>\n+#include <rte_common.h>\n+#include <rte_dev.h>\n+#include <rte_malloc.h>\n+#include <rte_pci.h>\n+#include <rte_cryptodev_pmd.h>\n+\n+#include \"qat_logs.h\"\n+#include \"qat_sym.h\"\n+#include \"qat_sym_session.h\"\n+#include \"qat_sym_pmd.h\"\n+\n+uint8_t cryptodev_qat_driver_id;\n+\n+static const struct rte_cryptodev_capabilities qat_gen1_sym_capabilities[] = {\n+\tQAT_BASE_GEN1_SYM_CAPABILITIES,\n+\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n+};\n+\n+static const struct rte_cryptodev_capabilities qat_gen2_sym_capabilities[] = {\n+\tQAT_BASE_GEN1_SYM_CAPABILITIES,\n+\tQAT_EXTRA_GEN2_SYM_CAPABILITIES,\n+\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n+};\n+\n+static int qat_sym_qp_release(struct rte_cryptodev *dev,\n+\tuint16_t queue_pair_id);\n+\n+static int qat_sym_dev_config(__rte_unused struct rte_cryptodev *dev,\n+\t\t__rte_unused struct rte_cryptodev_config *config)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\treturn 0;\n+}\n+\n+static int qat_sym_dev_start(__rte_unused struct rte_cryptodev *dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\treturn 0;\n+}\n+\n+static void qat_sym_dev_stop(__rte_unused struct rte_cryptodev *dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+}\n+\n+static int qat_sym_dev_close(struct rte_cryptodev *dev)\n+{\n+\tint i, ret;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tfor (i = 0; i < dev->data->nb_queue_pairs; i++) {\n+\t\tret = qat_sym_qp_release(dev, i);\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static void qat_sym_dev_info_get(struct rte_cryptodev *dev,\n+\t\t\tstruct rte_cryptodev_info *info)\n+{\n+\tstruct qat_sym_dev_private *internals = dev->data->dev_private;\n+\tconst struct qat_qp_hw_data *sym_hw_qps =\n+\t\tqp_gen_config[internals->qat_dev->qat_dev_gen]\n+\t\t\t      .qp_hw_data[QAT_SERVICE_SYMMETRIC];\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\tif (info != NULL) {\n+\t\tinfo->max_nb_queue_pairs =\n+\t\t\tqat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC);\n+\t\tinfo->feature_flags = dev->feature_flags;\n+\t\tinfo->capabilities = internals->qat_dev_capabilities;\n+\t\tinfo->sym.max_nb_sessions = RTE_QAT_PMD_MAX_NB_SESSIONS;\n+\t\tinfo->driver_id = cryptodev_qat_driver_id;\n+\t\tinfo->pci_dev = RTE_DEV_TO_PCI(dev->device);\n+\t}\n+}\n+\n+static void qat_sym_stats_get(struct rte_cryptodev *dev,\n+\t\tstruct rte_cryptodev_stats *stats)\n+{\n+\tstruct qat_common_stats qat_stats = {0};\n+\tstruct qat_sym_dev_private *qat_priv;\n+\n+\tif (stats == NULL || dev == NULL) {\n+\t\tPMD_DRV_LOG(ERR, \"invalid ptr: stats %p, dev %p\", stats, dev);\n+\t\treturn;\n+\t}\n+\tqat_priv = dev->data->dev_private;\n+\n+\tqat_stats_get(qat_priv->qat_dev, &qat_stats, QAT_SERVICE_SYMMETRIC);\n+\tstats->enqueued_count = qat_stats.enqueued_count;\n+\tstats->dequeued_count = qat_stats.dequeued_count;\n+\tstats->enqueue_err_count = qat_stats.enqueue_err_count;\n+\tstats->dequeue_err_count = qat_stats.dequeue_err_count;\n+}\n+\n+static void qat_sym_stats_reset(struct rte_cryptodev *dev)\n+{\n+\tstruct qat_sym_dev_private *qat_priv;\n+\n+\tif (dev == NULL) {\n+\t\tPMD_DRV_LOG(ERR, \"invalid cryptodev ptr %p\", dev);\n+\t\treturn;\n+\t}\n+\tqat_priv = dev->data->dev_private;\n+\n+\tqat_stats_reset(qat_priv->qat_dev, QAT_SERVICE_SYMMETRIC);\n+\n+}\n+\n+static int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)\n+{\n+\tstruct qat_sym_dev_private *qat_private = dev->data->dev_private;\n+\n+\tPMD_DRV_LOG(DEBUG, \"Release sym qp %u on device %d\",\n+\t\t\t\tqueue_pair_id, dev->data->dev_id);\n+\n+\tqat_private->qat_dev->qps_in_use[QAT_SERVICE_SYMMETRIC][queue_pair_id]\n+\t\t\t\t\t\t= NULL;\n+\n+\treturn qat_qp_release((struct qat_qp **)\n+\t\t\t&(dev->data->queue_pairs[queue_pair_id]));\n+}\n+\n+static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n+\tconst struct rte_cryptodev_qp_conf *qp_conf,\n+\tint socket_id, struct rte_mempool *session_pool __rte_unused)\n+{\n+\tstruct qat_qp *qp;\n+\tint ret = 0;\n+\tuint32_t i;\n+\tstruct qat_qp_config qat_qp_conf;\n+\n+\tstruct qat_qp **qp_addr =\n+\t\t\t(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);\n+\tstruct qat_sym_dev_private *qat_private = dev->data->dev_private;\n+\tconst struct qat_qp_hw_data *sym_hw_qps =\n+\t\t\tqp_gen_config[qat_private->qat_dev->qat_dev_gen]\n+\t\t\t\t      .qp_hw_data[QAT_SERVICE_SYMMETRIC];\n+\tconst struct qat_qp_hw_data *qp_hw_data = sym_hw_qps + qp_id;\n+\n+\t/* If qp is already in use free ring memory and qp metadata. */\n+\tif (*qp_addr != NULL) {\n+\t\tret = qat_sym_qp_release(dev, qp_id);\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\t}\n+\tif (qp_id >= qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC)) {\n+\t\tPMD_DRV_LOG(ERR, \"qp_id %u invalid for this device\", qp_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tqat_qp_conf.hw = qp_hw_data;\n+\tqat_qp_conf.build_request = qat_sym_build_request;\n+\tqat_qp_conf.process_response = qat_sym_process_response;\n+\tqat_qp_conf.cookie_size = sizeof(struct qat_sym_op_cookie);\n+\tqat_qp_conf.nb_descriptors = qp_conf->nb_descriptors;\n+\tqat_qp_conf.socket_id = socket_id;\n+\tqat_qp_conf.service_str = \"sym\";\n+\n+\tret = qat_qp_setup(qat_private->qat_dev, qp_addr, qp_id, &qat_qp_conf);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\t/* store a link to the qp in the qat_pci_device */\n+\tqat_private->qat_dev->qps_in_use[QAT_SERVICE_SYMMETRIC][qp_id]\n+\t\t\t\t\t\t\t= *qp_addr;\n+\n+\tqp = (struct qat_qp *)*qp_addr;\n+\n+\tfor (i = 0; i < qp->nb_descriptors; i++) {\n+\n+\t\tstruct qat_sym_op_cookie *sql_cookie =\n+\t\t\t\tqp->op_cookies[i];\n+\n+\t\tsql_cookie->qat_sgl_src_phys_addr =\n+\t\t\t\trte_mempool_virt2iova(sql_cookie) +\n+\t\t\t\toffsetof(struct qat_sym_op_cookie,\n+\t\t\t\tqat_sgl_src);\n+\n+\t\tsql_cookie->qat_sgl_dst_phys_addr =\n+\t\t\t\trte_mempool_virt2iova(sql_cookie) +\n+\t\t\t\toffsetof(struct qat_sym_op_cookie,\n+\t\t\t\tqat_sgl_dst);\n+\t}\n+\n+\treturn ret;\n+}\n+\n+static struct rte_cryptodev_ops crypto_qat_ops = {\n+\n+\t\t/* Device related operations */\n+\t\t.dev_configure\t\t= qat_sym_dev_config,\n+\t\t.dev_start\t\t= qat_sym_dev_start,\n+\t\t.dev_stop\t\t= qat_sym_dev_stop,\n+\t\t.dev_close\t\t= qat_sym_dev_close,\n+\t\t.dev_infos_get\t\t= qat_sym_dev_info_get,\n+\n+\t\t.stats_get\t\t= qat_sym_stats_get,\n+\t\t.stats_reset\t\t= qat_sym_stats_reset,\n+\t\t.queue_pair_setup\t= qat_sym_qp_setup,\n+\t\t.queue_pair_release\t= qat_sym_qp_release,\n+\t\t.queue_pair_start\t= NULL,\n+\t\t.queue_pair_stop\t= NULL,\n+\t\t.queue_pair_count\t= NULL,\n+\n+\t\t/* Crypto related operations */\n+\t\t.session_get_size\t= qat_sym_session_get_private_size,\n+\t\t.session_configure\t= qat_sym_session_configure,\n+\t\t.session_clear\t\t= qat_sym_session_clear\n+};\n+\n+static uint16_t\n+qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,\n+\t\tuint16_t nb_ops)\n+{\n+\treturn qat_enqueue_op_burst(qp, (void **)ops, nb_ops);\n+}\n+\n+static uint16_t\n+qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n+\t\tuint16_t nb_ops)\n+{\n+\treturn qat_dequeue_op_burst(qp, (void **)ops, nb_ops);\n+}\n+\n+int\n+qat_sym_dev_create(struct qat_pci_device *qat_pci_dev)\n+{\n+\tstruct rte_cryptodev_pmd_init_params init_params = {\n+\t\t\t.name = \"\",\n+\t\t\t.socket_id = qat_pci_dev->pci_dev->device.numa_node,\n+\t\t\t.private_data_size = sizeof(struct qat_sym_dev_private),\n+\t\t\t.max_nb_sessions = RTE_QAT_PMD_MAX_NB_SESSIONS\n+\t};\n+\tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\tstruct rte_cryptodev *cryptodev;\n+\tstruct qat_sym_dev_private *internals;\n+\n+\tsnprintf(name, RTE_CRYPTODEV_NAME_MAX_LEN, \"%s_%s\",\n+\t\t\tqat_pci_dev->name, \"sym\");\n+\tPMD_DRV_LOG(DEBUG, \"Creating QAT SYM device %s\", name);\n+\n+\tcryptodev = rte_cryptodev_pmd_create(name,\n+\t\t\t&qat_pci_dev->pci_dev->device, &init_params);\n+\n+\tif (cryptodev == NULL)\n+\t\treturn -ENODEV;\n+\n+\tcryptodev->driver_id = cryptodev_qat_driver_id;\n+\tcryptodev->dev_ops = &crypto_qat_ops;\n+\n+\tcryptodev->enqueue_burst = qat_sym_pmd_enqueue_op_burst;\n+\tcryptodev->dequeue_burst = qat_sym_pmd_dequeue_op_burst;\n+\n+\tcryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n+\t\t\tRTE_CRYPTODEV_FF_HW_ACCELERATED |\n+\t\t\tRTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |\n+\t\t\tRTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER;\n+\n+\tinternals = cryptodev->data->dev_private;\n+\tinternals->qat_dev = qat_pci_dev;\n+\tqat_pci_dev->sym_dev = internals;\n+\n+\tinternals->sym_dev_id = cryptodev->data->dev_id;\n+\tswitch (qat_pci_dev->qat_dev_gen) {\n+\tcase QAT_GEN1:\n+\t\tinternals->qat_dev_capabilities = qat_gen1_sym_capabilities;\n+\t\tbreak;\n+\tcase QAT_GEN2:\n+\t\tinternals->qat_dev_capabilities = qat_gen2_sym_capabilities;\n+\t\tbreak;\n+\tdefault:\n+\t\tinternals->qat_dev_capabilities = qat_gen2_sym_capabilities;\n+\t\tPMD_DRV_LOG(DEBUG,\n+\t\t\t\"QAT gen %d capabilities unknown, default to GEN2\",\n+\t\t\t\t\tqat_pci_dev->qat_dev_gen);\n+\t\tbreak;\n+\t}\n+\n+\tPMD_DRV_LOG(DEBUG, \"Created QAT SYM device %s as cryptodev instance %d\",\n+\t\t\tname, internals->sym_dev_id);\n+\treturn 0;\n+}\n+\n+int\n+qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev)\n+{\n+\tstruct rte_cryptodev *cryptodev;\n+\n+\tif (qat_pci_dev == NULL)\n+\t\treturn -ENODEV;\n+\tif (qat_pci_dev->sym_dev == NULL)\n+\t\treturn 0;\n+\n+\t/* free crypto device */\n+\tcryptodev = rte_cryptodev_pmd_get_dev(qat_pci_dev->sym_dev->sym_dev_id);\n+\trte_cryptodev_pmd_destroy(cryptodev);\n+\tqat_pci_dev->sym_dev = NULL;\n+\n+\treturn 0;\n+}\n+\n+\n+/* An rte_driver is needed in the registration of both the device and the driver\n+ * with cryptodev.\n+ * The actual qat pci's rte_driver can't be used as its name represents\n+ * the whole pci device with all services. Think of this as a holder for a name\n+ * for the crypto part of the pci device.\n+ */\n+static const char qat_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_SYM_PMD);\n+static struct rte_driver cryptodev_qat_sym_driver = {\n+\t.name = qat_sym_drv_name,\n+\t.alias = qat_sym_drv_name\n+};\n+static struct cryptodev_driver qat_crypto_drv;\n+RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv, cryptodev_qat_sym_driver,\n+\t\tcryptodev_qat_driver_id);\ndiff --git a/drivers/crypto/qat/qat_sym_pmd.h b/drivers/crypto/qat/qat_sym_pmd.h\nnew file mode 100644\nindex 000000000..efa3b0775\n--- /dev/null\n+++ b/drivers/crypto/qat/qat_sym_pmd.h\n@@ -0,0 +1,39 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2015-2018 Intel Corporation\n+ */\n+\n+#ifndef _QAT_SYM_PMD_H_\n+#define _QAT_SYM_PMD_H_\n+\n+#include <rte_cryptodev.h>\n+\n+#include \"qat_sym_capabilities.h\"\n+#include \"qat_device.h\"\n+\n+\n+/**< Intel(R) QAT Symmetric Crypto PMD device name */\n+#define CRYPTODEV_NAME_QAT_SYM_PMD\tcrypto_qat\n+\n+extern uint8_t cryptodev_qat_driver_id;\n+\n+/** private data structure for a QAT device.\n+ * This QAT device is a device offering only symmetric crypto service,\n+ * there can be one of these on each qat_pci_device (VF),\n+ * in future there may also be private data structures for other services.\n+ */\n+struct qat_sym_dev_private {\n+\tstruct qat_pci_device *qat_dev;\n+\t/**< The qat pci device hosting the service */\n+\tuint8_t sym_dev_id;\n+\t/**< Device instance for this rte_cryptodev */\n+\tconst struct rte_cryptodev_capabilities *qat_dev_capabilities;\n+\t/* QAT device symmetric crypto capabilities */\n+};\n+\n+\n+int\n+qat_sym_dev_create(struct qat_pci_device *qat_pci_dev);\n+\n+int\n+qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev);\n+#endif /* _QAT_SYM_PMD_H_ */\ndiff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c\nindex 68d7773a2..689596d51 100644\n--- a/drivers/crypto/qat/qat_sym_session.c\n+++ b/drivers/crypto/qat/qat_sym_session.c\n@@ -1,6 +1,12 @@\n /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n  * Copyright(c) 2015-2018 Intel Corporation\n  */\n+\n+#include <openssl/sha.h>\t/* Needed to calculate pre-compute values */\n+#include <openssl/aes.h>\t/* Needed to calculate pre-compute values */\n+#include <openssl/md5.h>\t/* Needed to calculate pre-compute values */\n+#include <openssl/evp.h>\t/* Needed for bpi runt block processing */\n+\n #include <rte_memcpy.h>\n #include <rte_common.h>\n #include <rte_spinlock.h>\n@@ -10,14 +16,8 @@\n #include <rte_crypto_sym.h>\n \n #include \"qat_logs.h\"\n-#include \"qat_device.h\"\n-\n-#include <openssl/sha.h>\t/* Needed to calculate pre-compute values */\n-#include <openssl/aes.h>\t/* Needed to calculate pre-compute values */\n-#include <openssl/md5.h>\t/* Needed to calculate pre-compute values */\n-#include <openssl/evp.h>\n-\n #include \"qat_sym_session.h\"\n+#include \"qat_sym_pmd.h\"\n \n /** Frees a context previously created\n  *  Depends on openssl libcrypto\n@@ -29,6 +29,9 @@ bpi_cipher_ctx_free(void *bpi_ctx)\n \t\tEVP_CIPHER_CTX_free((EVP_CIPHER_CTX *)bpi_ctx);\n }\n \n+/** Creates a context in either AES or DES in ECB mode\n+ *  Depends on openssl libcrypto\n+ */\n static int\n bpi_cipher_ctx_init(enum rte_crypto_cipher_algorithm cryptodev_algo,\n \t\tenum rte_crypto_cipher_operation direction __rte_unused,\ndiff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h\nindex d3d27ff46..18d77e990 100644\n--- a/drivers/crypto/qat/qat_sym_session.h\n+++ b/drivers/crypto/qat/qat_sym_session.h\n@@ -1,5 +1,5 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2018 Intel Corporation\n+ * Copyright(c) 2015-2018 Intel Corporation\n  */\n #ifndef _QAT_SYM_SESSION_H_\n #define _QAT_SYM_SESSION_H_\ndiff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c\ndeleted file mode 100644\nindex 91bb1e590..000000000\n--- a/drivers/crypto/qat/rte_qat_cryptodev.c\n+++ /dev/null\n@@ -1,258 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2015-2018 Intel Corporation\n- */\n-\n-#include <rte_bus_pci.h>\n-#include <rte_common.h>\n-#include <rte_dev.h>\n-#include <rte_malloc.h>\n-#include <rte_pci.h>\n-#include <rte_cryptodev_pmd.h>\n-\n-#include \"qat_sym.h\"\n-#include \"qat_sym_session.h\"\n-#include \"qat_logs.h\"\n-\n-uint8_t cryptodev_qat_driver_id;\n-\n-static const struct rte_cryptodev_capabilities qat_gen1_sym_capabilities[] = {\n-\tQAT_BASE_GEN1_SYM_CAPABILITIES,\n-\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n-};\n-\n-static const struct rte_cryptodev_capabilities qat_gen2_sym_capabilities[] = {\n-\tQAT_BASE_GEN1_SYM_CAPABILITIES,\n-\tQAT_EXTRA_GEN2_SYM_CAPABILITIES,\n-\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n-};\n-\n-static struct rte_cryptodev_ops crypto_qat_ops = {\n-\n-\t\t/* Device related operations */\n-\t\t.dev_configure\t\t= qat_sym_dev_config,\n-\t\t.dev_start\t\t= qat_sym_dev_start,\n-\t\t.dev_stop\t\t= qat_sym_dev_stop,\n-\t\t.dev_close\t\t= qat_sym_dev_close,\n-\t\t.dev_infos_get\t\t= qat_sym_dev_info_get,\n-\n-\t\t.stats_get\t\t= qat_sym_stats_get,\n-\t\t.stats_reset\t\t= qat_sym_stats_reset,\n-\t\t.queue_pair_setup\t= qat_sym_qp_setup,\n-\t\t.queue_pair_release\t= qat_sym_qp_release,\n-\t\t.queue_pair_start\t= NULL,\n-\t\t.queue_pair_stop\t= NULL,\n-\t\t.queue_pair_count\t= NULL,\n-\n-\t\t/* Crypto related operations */\n-\t\t.session_get_size\t= qat_sym_session_get_private_size,\n-\t\t.session_configure\t= qat_sym_session_configure,\n-\t\t.session_clear\t\t= qat_sym_session_clear\n-};\n-\n-/*\n- * The set of PCI devices this driver supports\n- */\n-\n-static const struct rte_pci_id pci_id_qat_map[] = {\n-\t\t{\n-\t\t\tRTE_PCI_DEVICE(0x8086, 0x0443),\n-\t\t},\n-\t\t{\n-\t\t\tRTE_PCI_DEVICE(0x8086, 0x37c9),\n-\t\t},\n-\t\t{\n-\t\t\tRTE_PCI_DEVICE(0x8086, 0x19e3),\n-\t\t},\n-\t\t{\n-\t\t\tRTE_PCI_DEVICE(0x8086, 0x6f55),\n-\t\t},\n-\t\t{.device_id = 0},\n-};\n-\n-\n-\n-static int\n-qat_sym_dev_create(struct qat_pci_device *qat_pci_dev)\n-{\n-\tstruct rte_cryptodev_pmd_init_params init_params = {\n-\t\t\t.name = \"\",\n-\t\t\t.socket_id = qat_pci_dev->pci_dev->device.numa_node,\n-\t\t\t.private_data_size = sizeof(struct qat_sym_dev_private),\n-\t\t\t.max_nb_sessions = RTE_QAT_PMD_MAX_NB_SESSIONS\n-\t};\n-\tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n-\tstruct rte_cryptodev *cryptodev;\n-\tstruct qat_sym_dev_private *internals;\n-\n-\tsnprintf(name, RTE_CRYPTODEV_NAME_MAX_LEN, \"%s_%s\",\n-\t\t\tqat_pci_dev->name, \"sym\");\n-\tPMD_DRV_LOG(DEBUG, \"Creating QAT SYM device %s\", name);\n-\n-\tcryptodev = rte_cryptodev_pmd_create(name,\n-\t\t\t&qat_pci_dev->pci_dev->device, &init_params);\n-\n-\tif (cryptodev == NULL)\n-\t\treturn -ENODEV;\n-\n-\tcryptodev->driver_id = cryptodev_qat_driver_id;\n-\tcryptodev->dev_ops = &crypto_qat_ops;\n-\n-\tcryptodev->enqueue_burst = qat_sym_pmd_enqueue_op_burst;\n-\tcryptodev->dequeue_burst = qat_sym_pmd_dequeue_op_burst;\n-\n-\tcryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n-\t\t\tRTE_CRYPTODEV_FF_HW_ACCELERATED |\n-\t\t\tRTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |\n-\t\t\tRTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER;\n-\n-\tinternals = cryptodev->data->dev_private;\n-\tinternals->qat_dev = qat_pci_dev;\n-\tqat_pci_dev->sym_dev = internals;\n-\n-\tinternals->sym_dev_id = cryptodev->data->dev_id;\n-\tswitch (qat_pci_dev->qat_dev_gen) {\n-\tcase QAT_GEN1:\n-\t\tinternals->qat_dev_capabilities = qat_gen1_sym_capabilities;\n-\t\tbreak;\n-\tcase QAT_GEN2:\n-\t\tinternals->qat_dev_capabilities = qat_gen2_sym_capabilities;\n-\t\tbreak;\n-\tdefault:\n-\t\tinternals->qat_dev_capabilities = qat_gen2_sym_capabilities;\n-\t\tPMD_DRV_LOG(DEBUG,\n-\t\t\t\"QAT gen %d capabilities unknown, default to GEN2\",\n-\t\t\t\t\tqat_pci_dev->qat_dev_gen);\n-\t\tbreak;\n-\t}\n-\n-\tPMD_DRV_LOG(DEBUG, \"Created QAT SYM device %s as cryptodev instance %d\",\n-\t\t\tname, internals->sym_dev_id);\n-\treturn 0;\n-}\n-\n-static int\n-qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev)\n-{\n-\tstruct rte_cryptodev *cryptodev;\n-\n-\tif (qat_pci_dev == NULL)\n-\t\treturn -ENODEV;\n-\tif (qat_pci_dev->sym_dev == NULL)\n-\t\treturn 0;\n-\n-\t/* free crypto device */\n-\tcryptodev = rte_cryptodev_pmd_get_dev(qat_pci_dev->sym_dev->sym_dev_id);\n-\trte_cryptodev_pmd_destroy(cryptodev);\n-\tqat_pci_dev->sym_dev = NULL;\n-\n-\treturn 0;\n-}\n-\n-static int\n-qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused)\n-{\n-\treturn 0;\n-}\n-\n-static int\n-qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused)\n-{\n-\treturn 0;\n-}\n-\n-static int\n-qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused)\n-{\n-\treturn 0;\n-}\n-\n-static int\n-qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused)\n-{\n-\treturn 0;\n-}\n-\n-static int\n-qat_pci_dev_destroy(struct qat_pci_device *qat_pci_dev,\n-\t\tstruct rte_pci_device *pci_dev)\n-{\n-\tqat_sym_dev_destroy(qat_pci_dev);\n-\tqat_comp_dev_destroy(qat_pci_dev);\n-\tqat_asym_dev_destroy(qat_pci_dev);\n-\treturn qat_pci_device_release(pci_dev);\n-}\n-\n-static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n-\t\tstruct rte_pci_device *pci_dev)\n-{\n-\tint ret = 0;\n-\tstruct qat_pci_device *qat_pci_dev;\n-\n-\tPMD_DRV_LOG(DEBUG, \"Found QAT device at %02x:%02x.%x\",\n-\t\t\tpci_dev->addr.bus,\n-\t\t\tpci_dev->addr.devid,\n-\t\t\tpci_dev->addr.function);\n-\n-\tqat_pci_dev = qat_pci_device_allocate(pci_dev);\n-\tif (qat_pci_dev == NULL)\n-\t\treturn -ENODEV;\n-\n-\tret = qat_sym_dev_create(qat_pci_dev);\n-\tif (ret != 0)\n-\t\tgoto error_out;\n-\n-\tret = qat_comp_dev_create(qat_pci_dev);\n-\tif (ret != 0)\n-\t\tgoto error_out;\n-\n-\tret = qat_asym_dev_create(qat_pci_dev);\n-\tif (ret != 0)\n-\t\tgoto error_out;\n-\n-\treturn 0;\n-\n-error_out:\n-\tqat_pci_dev_destroy(qat_pci_dev, pci_dev);\n-\treturn ret;\n-\n-}\n-\n-static int qat_pci_remove(struct rte_pci_device *pci_dev)\n-{\n-\tstruct qat_pci_device *qat_pci_dev;\n-\n-\tif (pci_dev == NULL)\n-\t\treturn -EINVAL;\n-\n-\tqat_pci_dev = qat_get_qat_dev_from_pci_dev(pci_dev);\n-\tif (qat_pci_dev == NULL)\n-\t\treturn 0;\n-\n-\treturn qat_pci_dev_destroy(qat_pci_dev, pci_dev);\n-\n-}\n-\n-\n-/* An rte_driver is needed in the registration of both the device and the driver\n- * with cryptodev.\n- * The actual qat pci's rte_driver can't be used as its name represents\n- * the whole pci device with all services. Think of this as a holder for a name\n- * for the crypto part of the pci device.\n- */\n-static const char qat_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_SYM_PMD);\n-static struct rte_driver cryptodev_qat_sym_driver = {\n-\t.name = qat_sym_drv_name,\n-\t.alias = qat_sym_drv_name\n-};\n-static struct cryptodev_driver qat_crypto_drv;\n-RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv, cryptodev_qat_sym_driver,\n-\t\tcryptodev_qat_driver_id);\n-\n-static struct rte_pci_driver rte_qat_pmd = {\n-\t.id_table = pci_id_qat_map,\n-\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING,\n-\t.probe = qat_pci_probe,\n-\t.remove = qat_pci_remove\n-};\n-RTE_PMD_REGISTER_PCI(QAT_PCI_NAME, rte_qat_pmd);\n-RTE_PMD_REGISTER_PCI_TABLE(QAT_PCI_NAME, pci_id_qat_map);\n",
    "prefixes": [
        "v3",
        "23/38"
    ]
}