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{
    "id": 41042,
    "url": "http://patches.dpdk.org/api/patches/41042/",
    "web_url": "http://patches.dpdk.org/patch/41042/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<1528892062-4997-10-git-send-email-tomaszx.jozwiak@intel.com>",
    "date": "2018-06-13T12:13:53",
    "name": "[v3,09/38] crypto/qat: make dequeue function generic",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "f4593c59d8cfa977895ad7df8e95166f2d88e388",
    "submitter": {
        "id": 949,
        "url": "http://patches.dpdk.org/api/people/949/",
        "name": "Tomasz Jozwiak",
        "email": "tomaszx.jozwiak@intel.com"
    },
    "delegate": {
        "id": 22,
        "url": "http://patches.dpdk.org/api/users/22/",
        "username": "pdelarag",
        "first_name": "Pablo",
        "last_name": "de Lara Guarch",
        "email": "pablo.de.lara.guarch@intel.com"
    },
    "mbox": "http://patches.dpdk.org/patch/41042/mbox/",
    "series": [
        {
            "id": 111,
            "url": "http://patches.dpdk.org/api/series/111/",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=111",
            "date": "2018-06-13T12:13:44",
            "name": "crypto/qat: refactor to support multiple services",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/111/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/41042/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/41042/checks/",
    "tags": {},
    "headers": {
        "X-Mailman-Version": "2.1.15",
        "X-ExtLoop1": "1",
        "Errors-To": "dev-bounces@dpdk.org",
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Mailer": "git-send-email 2.7.4",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A87C31EF5B;\n\tWed, 13 Jun 2018 14:14:46 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id D8FA01EF2D\n\tfor <dev@dpdk.org>; Wed, 13 Jun 2018 14:14:39 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t13 Jun 2018 05:14:39 -0700",
            "from tjozwiax-mobl.ger.corp.intel.com (HELO localhost.localdomain)\n\t([10.103.104.42])\n\tby fmsmga001.fm.intel.com with ESMTP; 13 Jun 2018 05:14:38 -0700"
        ],
        "References": "<1523040732-3290-1-git-send-email-fiona.trahe@intel.com>\n\t<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>",
        "X-BeenThere": "dev@dpdk.org",
        "Message-Id": "<1528892062-4997-10-git-send-email-tomaszx.jozwiak@intel.com>",
        "X-IronPort-AV": "E=Sophos;i=\"5.51,218,1526367600\"; d=\"scan'208\";a=\"63727680\"",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "Precedence": "list",
        "From": "Tomasz Jozwiak <tomaszx.jozwiak@intel.com>",
        "X-Original-To": "patchwork@dpdk.org",
        "List-Post": "<mailto:dev@dpdk.org>",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "In-Reply-To": "<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>",
        "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "To": "fiona.trahe@intel.com,\n\ttomaszx.jozwiak@intel.com,\n\tdev@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Date": "Wed, 13 Jun 2018 14:13:53 +0200",
        "X-Amp-File-Uploaded": "False",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "Subject": "[dpdk-dev] [PATCH v3 09/38] crypto/qat: make dequeue function\n\tgeneric"
    },
    "content": "From: Fiona Trahe <fiona.trahe@intel.com>\n\nQueue-handling code in dequeue is made generic, so it can\nbe used by other services in future. This is done by\n - Removing all sym-specific refs in input params - replace with void ptrs.\n - Wrapping this generic dequeue with the sym-specific dequeue\n   called through the API.\n - extracting the sym-specific response processing into a new fn.\n - Setting a fn ptr for process_response in qp on qp creation\n - Passing void * params to this, in the service-specific implementation\n   qat_sym_process_response cast back to sym structs.\n\nSigned-off-by: Fiona Trahe <fiona.trahe@intel.com>\n---\n drivers/crypto/qat/qat_qp.c  |   1 +\n drivers/crypto/qat/qat_sym.c | 101 +++++++++++++++++++++--------------\n drivers/crypto/qat/qat_sym.h |  10 ++++\n 3 files changed, 72 insertions(+), 40 deletions(-)",
    "diff": "diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c\nindex d7d79f1af..bae6cf114 100644\n--- a/drivers/crypto/qat/qat_qp.c\n+++ b/drivers/crypto/qat/qat_qp.c\n@@ -198,6 +198,7 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \t\t= dev->data->dev_private;\n \tqp->qat_dev_gen = internals->qat_dev_gen;\n \tqp->build_request = qat_sym_build_request;\n+\tqp->process_response = qat_sym_process_response;\n \n \tdev->data->queue_pairs[queue_pair_id] = qp;\n \treturn 0;\ndiff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c\nindex 4e404749a..2bae913a1 100644\n--- a/drivers/crypto/qat/qat_sym.c\n+++ b/drivers/crypto/qat/qat_sym.c\n@@ -300,70 +300,91 @@ qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,\n \treturn qat_enqueue_op_burst(qp, (void **)ops, nb_ops);\n }\n \n-uint16_t\n-qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n-\t\tuint16_t nb_ops)\n+int\n+qat_sym_process_response(void **op, uint8_t *resp,\n+\t\t__rte_unused void *op_cookie,\n+\t\t__rte_unused enum qat_device_gen qat_dev_gen)\n+{\n+\n+\tstruct icp_qat_fw_comn_resp *resp_msg =\n+\t\t\t(struct icp_qat_fw_comn_resp *)resp;\n+\tstruct rte_crypto_op *rx_op = (struct rte_crypto_op *)(uintptr_t)\n+\t\t\t(resp_msg->opaque_data);\n+\n+#ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX\n+\trte_hexdump(stdout, \"qat_response:\", (uint8_t *)resp_msg,\n+\t\t\tsizeof(struct icp_qat_fw_comn_resp));\n+#endif\n+\n+\tif (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=\n+\t\t\tICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(\n+\t\t\tresp_msg->comn_hdr.comn_status)) {\n+\n+\t\trx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n+\t} else {\n+\t\tstruct qat_sym_session *sess = (struct qat_sym_session *)\n+\t\t\t\t\t\tget_session_private_data(\n+\t\t\t\t\t\trx_op->sym->session,\n+\t\t\t\t\t\tcryptodev_qat_driver_id);\n+\n+\t\tif (sess->bpi_ctx)\n+\t\t\tqat_bpicipher_postprocess(sess, rx_op);\n+\t\trx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n+\t}\n+\t*op = (void *)rx_op;\n+\n+\treturn 0;\n+}\n+\n+static uint16_t\n+qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops)\n {\n \tstruct qat_queue *rx_queue, *tx_queue;\n \tstruct qat_qp *tmp_qp = (struct qat_qp *)qp;\n-\tuint32_t msg_counter = 0;\n-\tstruct rte_crypto_op *rx_op;\n-\tstruct icp_qat_fw_comn_resp *resp_msg;\n \tuint32_t head;\n+\tuint32_t resp_counter = 0;\n+\tuint8_t *resp_msg;\n \n \trx_queue = &(tmp_qp->rx_q);\n \ttx_queue = &(tmp_qp->tx_q);\n \thead = rx_queue->head;\n-\tresp_msg = (struct icp_qat_fw_comn_resp *)\n-\t\t\t((uint8_t *)rx_queue->base_addr + head);\n+\tresp_msg = (uint8_t *)rx_queue->base_addr + rx_queue->head;\n \n \twhile (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&\n-\t\t\tmsg_counter != nb_ops) {\n-\t\trx_op = (struct rte_crypto_op *)(uintptr_t)\n-\t\t\t\t(resp_msg->opaque_data);\n-\n-#ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX\n-\t\trte_hexdump(stdout, \"qat_response:\", (uint8_t *)resp_msg,\n-\t\t\tsizeof(struct icp_qat_fw_comn_resp));\n-#endif\n-\t\tif (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=\n-\t\t\t\tICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(\n-\t\t\t\t\tresp_msg->comn_hdr.comn_status)) {\n-\t\t\trx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n-\t\t} else {\n-\t\t\tstruct qat_sym_session *sess =\n-\t\t\t\t(struct qat_sym_session *)\n-\t\t\t\t\tget_session_private_data(\n-\t\t\t\t\t\trx_op->sym->session,\n-\t\t\t\t\t\tcryptodev_qat_driver_id);\n+\t\t\tresp_counter != nb_ops) {\n \n-\t\t\tif (sess->bpi_ctx)\n-\t\t\t\tqat_bpicipher_postprocess(sess, rx_op);\n-\t\t\trx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n-\t\t}\n+\t\ttmp_qp->process_response(ops, resp_msg,\n+\t\t\ttmp_qp->op_cookies[head / rx_queue->msg_size],\n+\t\t\ttmp_qp->qat_dev_gen);\n \n \t\thead = adf_modulo(head + rx_queue->msg_size, rx_queue->modulo);\n-\t\tresp_msg = (struct icp_qat_fw_comn_resp *)\n-\t\t\t\t((uint8_t *)rx_queue->base_addr + head);\n-\t\t*ops = rx_op;\n+\n+\t\tresp_msg = (uint8_t *)rx_queue->base_addr + head;\n \t\tops++;\n-\t\tmsg_counter++;\n+\t\tresp_counter++;\n \t}\n-\tif (msg_counter > 0) {\n+\tif (resp_counter > 0) {\n \t\trx_queue->head = head;\n-\t\ttmp_qp->stats.dequeued_count += msg_counter;\n-\t\trx_queue->nb_processed_responses += msg_counter;\n-\t\ttmp_qp->inflights16 -= msg_counter;\n+\t\ttmp_qp->stats.dequeued_count += resp_counter;\n+\t\trx_queue->nb_processed_responses += resp_counter;\n+\t\ttmp_qp->inflights16 -= resp_counter;\n \n \t\tif (rx_queue->nb_processed_responses > QAT_CSR_HEAD_WRITE_THRESH)\n \t\t\trxq_free_desc(tmp_qp, rx_queue);\n \t}\n \t/* also check if tail needs to be advanced */\n \tif (tmp_qp->inflights16 <= QAT_CSR_TAIL_FORCE_WRITE_THRESH &&\n-\t\t\ttx_queue->tail != tx_queue->csr_tail) {\n+\t\ttx_queue->tail != tx_queue->csr_tail) {\n \t\ttxq_write_tail(tmp_qp, tx_queue);\n \t}\n-\treturn msg_counter;\n+\treturn resp_counter;\n+}\n+\n+uint16_t\n+qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n+\t\tuint16_t nb_ops)\n+{\n+\treturn qat_dequeue_op_burst(qp, (void **)ops, nb_ops);\n }\n \n static inline int\ndiff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h\nindex b1ddb6e93..279d3a3ae 100644\n--- a/drivers/crypto/qat/qat_sym.h\n+++ b/drivers/crypto/qat/qat_sym.h\n@@ -32,6 +32,11 @@ typedef int (*build_request_t)(void *op,\n \t\tenum qat_device_gen qat_dev_gen);\n /**< Build a request from an op. */\n \n+typedef int (*process_response_t)(void **ops,\n+\t\tuint8_t *resp, void *op_cookie,\n+\t\tenum qat_device_gen qat_dev_gen);\n+/**< Process a response descriptor and return the associated op. */\n+\n struct qat_sym_session;\n \n /**\n@@ -69,6 +74,7 @@ struct qat_qp {\n \tuint32_t nb_descriptors;\n \tenum qat_device_gen qat_dev_gen;\n \tbuild_request_t build_request;\n+\tprocess_response_t process_response;\n } __rte_cache_aligned;\n \n \n@@ -76,6 +82,10 @@ int\n qat_sym_build_request(void *in_op, uint8_t *out_msg,\n \t\tvoid *op_cookie, enum qat_device_gen qat_dev_gen);\n \n+int\n+qat_sym_process_response(void **op, uint8_t *resp,\n+\t\t__rte_unused void *op_cookie, enum qat_device_gen qat_dev_gen);\n+\n void qat_sym_stats_get(struct rte_cryptodev *dev,\n \tstruct rte_cryptodev_stats *stats);\n void qat_sym_stats_reset(struct rte_cryptodev *dev);\n",
    "prefixes": [
        "v3",
        "09/38"
    ]
}