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GET /api/patches/41040/?format=api
{ "id": 41040, "url": "http://patches.dpdk.org/api/patches/41040/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1528892062-4997-8-git-send-email-tomaszx.jozwiak@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1528892062-4997-8-git-send-email-tomaszx.jozwiak@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1528892062-4997-8-git-send-email-tomaszx.jozwiak@intel.com", "date": "2018-06-13T12:13:51", "name": "[v3,07/38] crypto/qat: renamed sym-specific structs", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "e953bfb9f6dcb810035e4db42cd9601169d639bd", "submitter": { "id": 949, "url": "http://patches.dpdk.org/api/people/949/?format=api", "name": "Tomasz Jozwiak", "email": "tomaszx.jozwiak@intel.com" }, "delegate": { "id": 22, "url": "http://patches.dpdk.org/api/users/22/?format=api", "username": "pdelarag", "first_name": "Pablo", "last_name": "de Lara Guarch", "email": "pablo.de.lara.guarch@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1528892062-4997-8-git-send-email-tomaszx.jozwiak@intel.com/mbox/", "series": [ { "id": 111, "url": "http://patches.dpdk.org/api/series/111/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=111", "date": "2018-06-13T12:13:44", "name": "crypto/qat: refactor to support multiple services", "version": 3, "mbox": "http://patches.dpdk.org/series/111/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/41040/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/41040/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B900A1EF3D;\n\tWed, 13 Jun 2018 14:14:41 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 8B2431D9C1\n\tfor <dev@dpdk.org>; Wed, 13 Jun 2018 14:14:37 +0200 (CEST)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t13 Jun 2018 05:14:37 -0700", "from tjozwiax-mobl.ger.corp.intel.com (HELO localhost.localdomain)\n\t([10.103.104.42])\n\tby fmsmga001.fm.intel.com with ESMTP; 13 Jun 2018 05:14:35 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.51,218,1526367600\"; d=\"scan'208\";a=\"63727668\"", "From": "Tomasz Jozwiak <tomaszx.jozwiak@intel.com>", "To": "fiona.trahe@intel.com,\n\ttomaszx.jozwiak@intel.com,\n\tdev@dpdk.org", "Date": "Wed, 13 Jun 2018 14:13:51 +0200", "Message-Id": "<1528892062-4997-8-git-send-email-tomaszx.jozwiak@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>", "References": "<1523040732-3290-1-git-send-email-fiona.trahe@intel.com>\n\t<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 07/38] crypto/qat: renamed sym-specific structs", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Fiona Trahe <fiona.trahe@intel.com>\n\nqat_session -> qat_sym_session\nqat_crypto_proto_flag -> qat_sym_proto_flag\nqat_alg_cd -> qat_sym_cd\nqat_crypto_op_cookie -> qat_sym_op_cookie\nqat_gen1_capabilities -> qat_gen1_sym_capabilities\nqat_gen2_capabilities -> qat_gen2_sym_capabilities\n\nSigned-off-by: Fiona Trahe <fiona.trahe@intel.com>\n---\n drivers/crypto/qat/qat_common.h | 4 ++--\n drivers/crypto/qat/qat_qp.c | 8 ++++----\n drivers/crypto/qat/qat_sym.c | 19 ++++++++---------\n drivers/crypto/qat/qat_sym.h | 2 +-\n drivers/crypto/qat/qat_sym_session.c | 28 +++++++++++++-------------\n drivers/crypto/qat/qat_sym_session.h | 20 +++++++++---------\n drivers/crypto/qat/rte_qat_cryptodev.c | 8 ++++----\n 7 files changed, 45 insertions(+), 44 deletions(-)", "diff": "diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h\nindex 293b6f700..7802e96f9 100644\n--- a/drivers/crypto/qat/qat_common.h\n+++ b/drivers/crypto/qat/qat_common.h\n@@ -37,11 +37,11 @@ struct qat_alg_buf_list {\n \tstruct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];\n } __rte_packed __rte_cache_aligned;\n \n-struct qat_crypto_op_cookie {\n+struct qat_sym_op_cookie {\n \tstruct qat_alg_buf_list qat_sgl_list_src;\n \tstruct qat_alg_buf_list qat_sgl_list_dst;\n \tphys_addr_t qat_sgl_src_phys_addr;\n \tphys_addr_t qat_sgl_dst_phys_addr;\n };\n \n-#endif /* _QAT_QAT_COMMON_H_ */\n+#endif /* _QAT_COMMON_H_ */\ndiff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c\nindex 23a9d5f01..fb9c2a7ef 100644\n--- a/drivers/crypto/qat/qat_qp.c\n+++ b/drivers/crypto/qat/qat_qp.c\n@@ -165,7 +165,7 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \tif (qp->op_cookie_pool == NULL)\n \t\tqp->op_cookie_pool = rte_mempool_create(op_cookie_pool_name,\n \t\t\t\tqp->nb_descriptors,\n-\t\t\t\tsizeof(struct qat_crypto_op_cookie), 64, 0,\n+\t\t\t\tsizeof(struct qat_sym_op_cookie), 64, 0,\n \t\t\t\tNULL, NULL, NULL, NULL, socket_id,\n \t\t\t\t0);\n \tif (!qp->op_cookie_pool) {\n@@ -180,17 +180,17 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \t\t\tgoto create_err;\n \t\t}\n \n-\t\tstruct qat_crypto_op_cookie *sql_cookie =\n+\t\tstruct qat_sym_op_cookie *sql_cookie =\n \t\t\t\tqp->op_cookies[i];\n \n \t\tsql_cookie->qat_sgl_src_phys_addr =\n \t\t\t\trte_mempool_virt2iova(sql_cookie) +\n-\t\t\t\toffsetof(struct qat_crypto_op_cookie,\n+\t\t\t\toffsetof(struct qat_sym_op_cookie,\n \t\t\t\tqat_sgl_list_src);\n \n \t\tsql_cookie->qat_sgl_dst_phys_addr =\n \t\t\t\trte_mempool_virt2iova(sql_cookie) +\n-\t\t\t\toffsetof(struct qat_crypto_op_cookie,\n+\t\t\t\toffsetof(struct qat_sym_op_cookie,\n \t\t\t\tqat_sgl_list_dst);\n \t}\n \ndiff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c\nindex ae521c2b1..2dfdc9cce 100644\n--- a/drivers/crypto/qat/qat_sym.c\n+++ b/drivers/crypto/qat/qat_sym.c\n@@ -88,10 +88,10 @@ adf_modulo(uint32_t data, uint32_t shift);\n \n static inline int\n qat_sym_build_request(struct rte_crypto_op *op, uint8_t *out_msg,\n-\t\tstruct qat_crypto_op_cookie *qat_op_cookie, struct qat_qp *qp);\n+\t\tstruct qat_sym_op_cookie *qat_op_cookie, struct qat_qp *qp);\n \n static inline uint32_t\n-qat_bpicipher_preprocess(struct qat_session *ctx,\n+qat_bpicipher_preprocess(struct qat_sym_session *ctx,\n \t\t\t\tstruct rte_crypto_op *op)\n {\n \tint block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);\n@@ -146,7 +146,7 @@ qat_bpicipher_preprocess(struct qat_session *ctx,\n }\n \n static inline uint32_t\n-qat_bpicipher_postprocess(struct qat_session *ctx,\n+qat_bpicipher_postprocess(struct qat_sym_session *ctx,\n \t\t\t\tstruct rte_crypto_op *op)\n {\n \tint block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);\n@@ -329,10 +329,11 @@ qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n \t\t\t\t\tresp_msg->comn_hdr.comn_status)) {\n \t\t\trx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n \t\t} else {\n-\t\t\tstruct qat_session *sess = (struct qat_session *)\n+\t\t\tstruct qat_sym_session *sess =\n+\t\t\t\t(struct qat_sym_session *)\n \t\t\t\t\tget_session_private_data(\n-\t\t\t\t\trx_op->sym->session,\n-\t\t\t\t\tcryptodev_qat_driver_id);\n+\t\t\t\t\t\trx_op->sym->session,\n+\t\t\t\t\t\tcryptodev_qat_driver_id);\n \n \t\t\tif (sess->bpi_ctx)\n \t\t\t\tqat_bpicipher_postprocess(sess, rx_op);\n@@ -457,10 +458,10 @@ set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,\n \n static inline int\n qat_sym_build_request(struct rte_crypto_op *op, uint8_t *out_msg,\n-\t\tstruct qat_crypto_op_cookie *qat_op_cookie, struct qat_qp *qp)\n+\t\tstruct qat_sym_op_cookie *qat_op_cookie, struct qat_qp *qp)\n {\n \tint ret = 0;\n-\tstruct qat_session *ctx;\n+\tstruct qat_sym_session *ctx;\n \tstruct icp_qat_fw_la_cipher_req_params *cipher_param;\n \tstruct icp_qat_fw_la_auth_req_params *auth_param;\n \tregister struct icp_qat_fw_la_bulk_req *qat_req;\n@@ -485,7 +486,7 @@ qat_sym_build_request(struct rte_crypto_op *op, uint8_t *out_msg,\n \t\treturn -EINVAL;\n \t}\n \n-\tctx = (struct qat_session *)get_session_private_data(\n+\tctx = (struct qat_sym_session *)get_session_private_data(\n \t\t\top->sym->session, cryptodev_qat_driver_id);\n \n \tif (unlikely(ctx == NULL)) {\ndiff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h\nindex 811ba8619..18c77ea11 100644\n--- a/drivers/crypto/qat/qat_sym.h\n+++ b/drivers/crypto/qat/qat_sym.h\n@@ -27,7 +27,7 @@\n #define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U\n /* number of inflights below which no tail write coalescing should occur */\n \n-struct qat_session;\n+struct qat_sym_session;\n \n /**\n * Structure associated with each queue.\ndiff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c\nindex f598d1461..a08e93037 100644\n--- a/drivers/crypto/qat/qat_sym_session.c\n+++ b/drivers/crypto/qat/qat_sym_session.c\n@@ -111,7 +111,7 @@ qat_sym_session_clear(struct rte_cryptodev *dev,\n \tPMD_INIT_FUNC_TRACE();\n \tuint8_t index = dev->driver_id;\n \tvoid *sess_priv = get_session_private_data(sess, index);\n-\tstruct qat_session *s = (struct qat_session *)sess_priv;\n+\tstruct qat_sym_session *s = (struct qat_sym_session *)sess_priv;\n \n \tif (sess_priv) {\n \t\tif (s->bpi_ctx)\n@@ -199,7 +199,7 @@ qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)\n int\n qat_sym_session_configure_cipher(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform,\n-\t\tstruct qat_session *session)\n+\t\tstruct qat_sym_session *session)\n {\n \tstruct qat_pmd_private *internals = dev->data->dev_private;\n \tstruct rte_crypto_cipher_xform *cipher_xform = NULL;\n@@ -404,7 +404,7 @@ int\n qat_sym_session_set_parameters(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform, void *session_private)\n {\n-\tstruct qat_session *session = session_private;\n+\tstruct qat_sym_session *session = session_private;\n \tint ret;\n \tint qat_cmd_id;\n \n@@ -412,7 +412,7 @@ qat_sym_session_set_parameters(struct rte_cryptodev *dev,\n \n \t/* Set context descriptor physical address */\n \tsession->cd_paddr = rte_mempool_virt2iova(session) +\n-\t\t\toffsetof(struct qat_session, cd);\n+\t\t\toffsetof(struct qat_sym_session, cd);\n \n \tsession->min_qat_dev_gen = QAT_GEN1;\n \n@@ -492,7 +492,7 @@ qat_sym_session_set_parameters(struct rte_cryptodev *dev,\n int\n qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \t\t\t\tstruct rte_crypto_sym_xform *xform,\n-\t\t\t\tstruct qat_session *session)\n+\t\t\t\tstruct qat_sym_session *session)\n {\n \tstruct rte_crypto_auth_xform *auth_xform = qat_get_auth_xform(xform);\n \tstruct qat_pmd_private *internals = dev->data->dev_private;\n@@ -629,7 +629,7 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \n int\n qat_sym_session_configure_aead(struct rte_crypto_sym_xform *xform,\n-\t\t\t\tstruct qat_session *session)\n+\t\t\t\tstruct qat_sym_session *session)\n {\n \tstruct rte_crypto_aead_xform *aead_xform = &xform->aead;\n \tenum rte_crypto_auth_operation crypto_operation;\n@@ -721,7 +721,7 @@ qat_sym_session_configure_aead(struct rte_crypto_sym_xform *xform,\n unsigned int qat_sym_session_get_private_size(\n \t\tstruct rte_cryptodev *dev __rte_unused)\n {\n-\treturn RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);\n+\treturn RTE_ALIGN_CEIL(sizeof(struct qat_sym_session), 8);\n }\n \n /* returns block size in bytes per cipher algo */\n@@ -1124,7 +1124,7 @@ static int qat_sym_do_precomputes(enum icp_qat_hw_auth_algo hash_alg,\n \n static void\n qat_sym_session_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,\n-\t\tenum qat_crypto_proto_flag proto_flags)\n+\t\tenum qat_sym_proto_flag proto_flags)\n {\n \tPMD_INIT_FUNC_TRACE();\n \theader->hdr_flags =\n@@ -1172,11 +1172,11 @@ qat_sym_session_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,\n *\tand set its protocol flag in both cipher and auth part of content\n *\tdescriptor building function\n */\n-static enum qat_crypto_proto_flag\n+static enum qat_sym_proto_flag\n qat_get_crypto_proto_flag(uint16_t flags)\n {\n \tint proto = ICP_QAT_FW_LA_PROTO_GET(flags);\n-\tenum qat_crypto_proto_flag qat_proto_flag =\n+\tenum qat_sym_proto_flag qat_proto_flag =\n \t\t\tQAT_CRYPTO_PROTO_FLAG_NONE;\n \n \tswitch (proto) {\n@@ -1191,7 +1191,7 @@ qat_get_crypto_proto_flag(uint16_t flags)\n \treturn qat_proto_flag;\n }\n \n-int qat_sym_session_aead_create_cd_cipher(struct qat_session *cdesc,\n+int qat_sym_session_aead_create_cd_cipher(struct qat_sym_session *cdesc,\n \t\t\t\t\t\tuint8_t *cipherkey,\n \t\t\t\t\t\tuint32_t cipherkeylen)\n {\n@@ -1203,7 +1203,7 @@ int qat_sym_session_aead_create_cd_cipher(struct qat_session *cdesc,\n \tstruct icp_qat_fw_cipher_cd_ctrl_hdr *cipher_cd_ctrl = ptr;\n \tstruct icp_qat_fw_auth_cd_ctrl_hdr *hash_cd_ctrl = ptr;\n \tenum icp_qat_hw_cipher_convert key_convert;\n-\tenum qat_crypto_proto_flag qat_proto_flag =\n+\tenum qat_sym_proto_flag qat_proto_flag =\n \t\tQAT_CRYPTO_PROTO_FLAG_NONE;\n \tuint32_t total_key_size;\n \tuint16_t cipher_offset, cd_size;\n@@ -1339,7 +1339,7 @@ int qat_sym_session_aead_create_cd_cipher(struct qat_session *cdesc,\n \treturn 0;\n }\n \n-int qat_sym_session_aead_create_cd_auth(struct qat_session *cdesc,\n+int qat_sym_session_aead_create_cd_auth(struct qat_sym_session *cdesc,\n \t\t\t\t\t\tuint8_t *authkey,\n \t\t\t\t\t\tuint32_t authkeylen,\n \t\t\t\t\t\tuint32_t aad_length,\n@@ -1363,7 +1363,7 @@ int qat_sym_session_aead_create_cd_auth(struct qat_session *cdesc,\n \tuint32_t *aad_len = NULL;\n \tuint32_t wordIndex = 0;\n \tuint32_t *pTempKey;\n-\tenum qat_crypto_proto_flag qat_proto_flag =\n+\tenum qat_sym_proto_flag qat_proto_flag =\n \t\tQAT_CRYPTO_PROTO_FLAG_NONE;\n \n \tPMD_INIT_FUNC_TRACE();\ndiff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h\nindex 493036ebf..d3d27ff46 100644\n--- a/drivers/crypto/qat/qat_sym_session.h\n+++ b/drivers/crypto/qat/qat_sym_session.h\n@@ -34,7 +34,7 @@\n \t\t\t\t\tICP_QAT_HW_CIPHER_KEY_CONVERT, \\\n \t\t\t\t\tICP_QAT_HW_CIPHER_DECRYPT)\n \n-enum qat_crypto_proto_flag {\n+enum qat_sym_proto_flag {\n \tQAT_CRYPTO_PROTO_FLAG_NONE = 0,\n \tQAT_CRYPTO_PROTO_FLAG_CCM = 1,\n \tQAT_CRYPTO_PROTO_FLAG_GCM = 2,\n@@ -43,12 +43,12 @@ enum qat_crypto_proto_flag {\n };\n \n /* Common content descriptor */\n-struct qat_alg_cd {\n+struct qat_sym_cd {\n \tstruct icp_qat_hw_cipher_algo_blk cipher;\n \tstruct icp_qat_hw_auth_algo_blk hash;\n } __rte_packed __rte_cache_aligned;\n \n-struct qat_session {\n+struct qat_sym_session {\n \tenum icp_qat_fw_la_cmd_id qat_cmd;\n \tenum icp_qat_hw_cipher_algo qat_cipher_alg;\n \tenum icp_qat_hw_cipher_dir qat_dir;\n@@ -56,7 +56,7 @@ struct qat_session {\n \tenum icp_qat_hw_auth_algo qat_hash_alg;\n \tenum icp_qat_hw_auth_op auth_op;\n \tvoid *bpi_ctx;\n-\tstruct qat_alg_cd cd;\n+\tstruct qat_sym_cd cd;\n \tuint8_t *cd_cur_ptr;\n \tphys_addr_t cd_paddr;\n \tstruct icp_qat_fw_la_bulk_req fw_req;\n@@ -87,25 +87,25 @@ qat_sym_session_set_parameters(struct rte_cryptodev *dev,\n \n int\n qat_sym_session_configure_aead(struct rte_crypto_sym_xform *xform,\n-\t\t\t\tstruct qat_session *session);\n+\t\t\t\tstruct qat_sym_session *session);\n \n int\n qat_sym_session_configure_cipher(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform,\n-\t\tstruct qat_session *session);\n+\t\tstruct qat_sym_session *session);\n \n int\n qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \t\t\t\tstruct rte_crypto_sym_xform *xform,\n-\t\t\t\tstruct qat_session *session);\n+\t\t\t\tstruct qat_sym_session *session);\n \n int\n-qat_sym_session_aead_create_cd_cipher(struct qat_session *cd,\n+qat_sym_session_aead_create_cd_cipher(struct qat_sym_session *cd,\n \t\t\t\t\t\tuint8_t *enckey,\n \t\t\t\t\t\tuint32_t enckeylen);\n \n int\n-qat_sym_session_aead_create_cd_auth(struct qat_session *cdesc,\n+qat_sym_session_aead_create_cd_auth(struct qat_sym_session *cdesc,\n \t\t\t\t\t\tuint8_t *authkey,\n \t\t\t\t\t\tuint32_t authkeylen,\n \t\t\t\t\t\tuint32_t aad_length,\n@@ -121,7 +121,7 @@ qat_sym_session_get_private_size(struct rte_cryptodev *dev);\n \n void\n qat_sym_sesssion_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,\n-\t\t\t\t\tenum qat_crypto_proto_flag proto_flags);\n+\t\t\t\t\tenum qat_sym_proto_flag proto_flags);\n int\n qat_sym_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n int\ndiff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c\nindex 42011dcd9..05cb5ef40 100644\n--- a/drivers/crypto/qat/rte_qat_cryptodev.c\n+++ b/drivers/crypto/qat/rte_qat_cryptodev.c\n@@ -15,12 +15,12 @@\n \n uint8_t cryptodev_qat_driver_id;\n \n-static const struct rte_cryptodev_capabilities qat_gen1_capabilities[] = {\n+static const struct rte_cryptodev_capabilities qat_gen1_sym_capabilities[] = {\n \tQAT_BASE_GEN1_SYM_CAPABILITIES,\n \tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n };\n \n-static const struct rte_cryptodev_capabilities qat_gen2_capabilities[] = {\n+static const struct rte_cryptodev_capabilities qat_gen2_sym_capabilities[] = {\n \tQAT_BASE_GEN1_SYM_CAPABILITIES,\n \tQAT_EXTRA_GEN2_SYM_CAPABILITIES,\n \tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n@@ -99,13 +99,13 @@ crypto_qat_create(const char *name, struct rte_pci_device *pci_dev,\n \tswitch (pci_dev->id.device_id) {\n \tcase 0x0443:\n \t\tinternals->qat_dev_gen = QAT_GEN1;\n-\t\tinternals->qat_dev_capabilities = qat_gen1_capabilities;\n+\t\tinternals->qat_dev_capabilities = qat_gen1_sym_capabilities;\n \t\tbreak;\n \tcase 0x37c9:\n \tcase 0x19e3:\n \tcase 0x6f55:\n \t\tinternals->qat_dev_gen = QAT_GEN2;\n-\t\tinternals->qat_dev_capabilities = qat_gen2_capabilities;\n+\t\tinternals->qat_dev_capabilities = qat_gen2_sym_capabilities;\n \t\tbreak;\n \tdefault:\n \t\tPMD_DRV_LOG(ERR,\n", "prefixes": [ "v3", "07/38" ] }