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{
    "id": 41038,
    "url": "http://patches.dpdk.org/api/patches/41038/",
    "web_url": "http://patches.dpdk.org/patch/41038/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<1528892062-4997-6-git-send-email-tomaszx.jozwiak@intel.com>",
    "date": "2018-06-13T12:13:49",
    "name": "[v3,05/38] crypto/qat: change filename crypto to sym",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "995c0146c0713fe402157be265413842f1eb42a7",
    "submitter": {
        "id": 949,
        "url": "http://patches.dpdk.org/api/people/949/",
        "name": "Tomasz Jozwiak",
        "email": "tomaszx.jozwiak@intel.com"
    },
    "delegate": {
        "id": 22,
        "url": "http://patches.dpdk.org/api/users/22/",
        "username": "pdelarag",
        "first_name": "Pablo",
        "last_name": "de Lara Guarch",
        "email": "pablo.de.lara.guarch@intel.com"
    },
    "mbox": "http://patches.dpdk.org/patch/41038/mbox/",
    "series": [
        {
            "id": 111,
            "url": "http://patches.dpdk.org/api/series/111/",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=111",
            "date": "2018-06-13T12:13:44",
            "name": "crypto/qat: refactor to support multiple services",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/111/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/41038/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/41038/checks/",
    "tags": {},
    "headers": {
        "X-Mailman-Version": "2.1.15",
        "X-ExtLoop1": "1",
        "Errors-To": "dev-bounces@dpdk.org",
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Mailer": "git-send-email 2.7.4",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E3C721EE58;\n\tWed, 13 Jun 2018 14:14:37 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id DF4191EE2E\n\tfor <dev@dpdk.org>; Wed, 13 Jun 2018 14:14:33 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t13 Jun 2018 05:14:33 -0700",
            "from tjozwiax-mobl.ger.corp.intel.com (HELO localhost.localdomain)\n\t([10.103.104.42])\n\tby fmsmga001.fm.intel.com with ESMTP; 13 Jun 2018 05:14:32 -0700"
        ],
        "References": "<1523040732-3290-1-git-send-email-fiona.trahe@intel.com>\n\t<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>",
        "X-BeenThere": "dev@dpdk.org",
        "Message-Id": "<1528892062-4997-6-git-send-email-tomaszx.jozwiak@intel.com>",
        "X-IronPort-AV": "E=Sophos;i=\"5.51,218,1526367600\"; d=\"scan'208\";a=\"63727658\"",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "Precedence": "list",
        "From": "Tomasz Jozwiak <tomaszx.jozwiak@intel.com>",
        "X-Original-To": "patchwork@dpdk.org",
        "List-Post": "<mailto:dev@dpdk.org>",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "In-Reply-To": "<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>",
        "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "To": "fiona.trahe@intel.com,\n\ttomaszx.jozwiak@intel.com,\n\tdev@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Date": "Wed, 13 Jun 2018 14:13:49 +0200",
        "X-Amp-File-Uploaded": "False",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "Subject": "[dpdk-dev] [PATCH v3 05/38] crypto/qat: change filename crypto to\n\tsym"
    },
    "content": "From: Fiona Trahe <fiona.trahe@intel.com>\n\nThis commit renames qat_crypto.c/h to qat_sym.c/h\nAnd makes a few whitespace changes to resolve line-length\nissues.\n\nSigned-off-by: ArkadiuszX Kusztal <arkadiuszx.kusztal@intel.com>\nSigned-off-by: Fiona Trahe <fiona.trahe@intel.com>\n---\n drivers/crypto/qat/Makefile                   |  2 +-\n drivers/crypto/qat/meson.build                |  2 +-\n drivers/crypto/qat/qat_qp.c                   |  2 +-\n .../crypto/qat/{qat_crypto.c => qat_sym.c}    | 60 +++++++++----------\n .../crypto/qat/{qat_crypto.h => qat_sym.h}    |  0\n drivers/crypto/qat/rte_qat_cryptodev.c        |  2 +-\n 6 files changed, 33 insertions(+), 35 deletions(-)\n rename drivers/crypto/qat/{qat_crypto.c => qat_sym.c} (95%)\n rename drivers/crypto/qat/{qat_crypto.h => qat_sym.h} (100%)",
    "diff": "diff --git a/drivers/crypto/qat/Makefile b/drivers/crypto/qat/Makefile\nindex c63c1515e..8cb802b9d 100644\n--- a/drivers/crypto/qat/Makefile\n+++ b/drivers/crypto/qat/Makefile\n@@ -21,7 +21,7 @@ LDLIBS += -lrte_cryptodev\n LDLIBS += -lrte_pci -lrte_bus_pci\n \n # library source files\n-SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_crypto.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_device.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_qp.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym_session.c\ndiff --git a/drivers/crypto/qat/meson.build b/drivers/crypto/qat/meson.build\nindex be4282a83..e596006da 100644\n--- a/drivers/crypto/qat/meson.build\n+++ b/drivers/crypto/qat/meson.build\n@@ -5,7 +5,7 @@ dep = dependency('libcrypto', required: false)\n if not dep.found()\n \tbuild = false\n endif\n-sources = files('qat_crypto.c', 'qat_qp.c',\n+sources = files('qat_sym.c', 'qat_qp.c',\n \t\t'qat_sym_session.c',\n \t\t'rte_qat_cryptodev.c',\n \t\t'qat_device.c')\ndiff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c\nindex ee3b30a36..794a8d7c9 100644\n--- a/drivers/crypto/qat/qat_qp.c\n+++ b/drivers/crypto/qat/qat_qp.c\n@@ -13,7 +13,7 @@\n #include <rte_prefetch.h>\n \n #include \"qat_logs.h\"\n-#include \"qat_crypto.h\"\n+#include \"qat_sym.h\"\n #include \"adf_transport_access_macros.h\"\n \n #define ADF_MAX_SYM_DESC\t\t\t4096\ndiff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_sym.c\nsimilarity index 95%\nrename from drivers/crypto/qat/qat_crypto.c\nrename to drivers/crypto/qat/qat_sym.c\nindex 96a1b78f0..f5d542ae3 100644\n--- a/drivers/crypto/qat/qat_crypto.c\n+++ b/drivers/crypto/qat/qat_sym.c\n@@ -6,15 +6,14 @@\n #include <rte_mbuf.h>\n #include <rte_hexdump.h>\n #include <rte_crypto_sym.h>\n-#include <rte_byteorder.h>\n-#include <rte_pci.h>\n #include <rte_bus_pci.h>\n+#include <rte_byteorder.h>\n \n #include <openssl/evp.h>\n \n #include \"qat_logs.h\"\n #include \"qat_sym_session.h\"\n-#include \"qat_crypto.h\"\n+#include \"qat_sym.h\"\n #include \"adf_transport_access_macros.h\"\n \n #define BYTE_LENGTH    8\n@@ -500,8 +499,6 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,\n \t\treturn -EINVAL;\n \t}\n \n-\n-\n \tqat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;\n \trte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));\n \tqat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;\n@@ -512,11 +509,11 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,\n \t\t\tctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) {\n \t\t/* AES-GCM or AES-CCM */\n \t\tif (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||\n-\t\t\t\tctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||\n-\t\t\t\t(ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128\n-\t\t\t\t&& ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE\n-\t\t\t\t&& ctx->qat_hash_alg ==\n-\t\t\t\t\t\tICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {\n+\t\t\tctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||\n+\t\t\t(ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128\n+\t\t\t&& ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE\n+\t\t\t&& ctx->qat_hash_alg ==\n+\t\t\t\t\tICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {\n \t\t\tdo_aead = 1;\n \t\t} else {\n \t\t\tdo_auth = 1;\n@@ -642,7 +639,6 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,\n \t\t\t\t\tqat_req->comn_hdr.serv_specif_flags,\n \t\t\t\t\tICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);\n \t\t\t}\n-\n \t\t\tset_cipher_iv(ctx->cipher_iv.length,\n \t\t\t\t\tctx->cipher_iv.offset,\n \t\t\t\t\tcipher_param, op, qat_req);\n@@ -650,15 +646,14 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,\n \t\t} else if (ctx->qat_hash_alg ==\n \t\t\t\tICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {\n \n-\t\t\t/* In case of AES-CCM this may point to user selected memory\n-\t\t\t * or iv offset in cypto_op\n+\t\t\t/* In case of AES-CCM this may point to user selected\n+\t\t\t * memory or iv offset in cypto_op\n \t\t\t */\n \t\t\tuint8_t *aad_data = op->sym->aead.aad.data;\n \t\t\t/* This is true AAD length, it not includes 18 bytes of\n \t\t\t * preceding data\n \t\t\t */\n \t\t\tuint8_t aad_ccm_real_len = 0;\n-\n \t\t\tuint8_t aad_len_field_sz = 0;\n \t\t\tuint32_t msg_len_be =\n \t\t\t\t\trte_bswap32(op->sym->aead.data.length);\n@@ -670,33 +665,36 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,\n \t\t\t\t\tICP_QAT_HW_CCM_AAD_LEN_INFO;\n \t\t\t} else {\n \t\t\t\t/*\n-\t\t\t\t * aad_len not greater than 18, so no actual aad data,\n-\t\t\t\t * then use IV after op for B0 block\n+\t\t\t\t * aad_len not greater than 18, so no actual aad\n+\t\t\t\t *  data, then use IV after op for B0 block\n \t\t\t\t */\n-\t\t\t\taad_data = rte_crypto_op_ctod_offset(op, uint8_t *,\n+\t\t\t\taad_data = rte_crypto_op_ctod_offset(op,\n+\t\t\t\t\t\tuint8_t *,\n \t\t\t\t\t\tctx->cipher_iv.offset);\n \t\t\t\taad_phys_addr_aead =\n \t\t\t\t\t\trte_crypto_op_ctophys_offset(op,\n-\t\t\t\t\t\t\t\tctx->cipher_iv.offset);\n+\t\t\t\t\t\t\tctx->cipher_iv.offset);\n \t\t\t}\n \n-\t\t\tuint8_t q = ICP_QAT_HW_CCM_NQ_CONST - ctx->cipher_iv.length;\n+\t\t\tuint8_t q = ICP_QAT_HW_CCM_NQ_CONST -\n+\t\t\t\t\t\t\tctx->cipher_iv.length;\n \n-\t\t\taad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(aad_len_field_sz,\n+\t\t\taad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(\n+\t\t\t\t\t\t\taad_len_field_sz,\n \t\t\t\t\t\t\tctx->digest_length, q);\n \n \t\t\tif (q > ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE) {\n \t\t\t\tmemcpy(aad_data\t+ ctx->cipher_iv.length +\n-\t\t\t\t\tICP_QAT_HW_CCM_NONCE_OFFSET\n-\t\t\t\t\t+ (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),\n-\t\t\t\t\t(uint8_t *)&msg_len_be,\n-\t\t\t\t\tICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);\n+\t\t\t\t    ICP_QAT_HW_CCM_NONCE_OFFSET +\n+\t\t\t\t    (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),\n+\t\t\t\t    (uint8_t *)&msg_len_be,\n+\t\t\t\t    ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);\n \t\t\t} else {\n \t\t\t\tmemcpy(aad_data\t+ ctx->cipher_iv.length +\n-\t\t\t\t\tICP_QAT_HW_CCM_NONCE_OFFSET,\n-\t\t\t\t\t(uint8_t *)&msg_len_be\n-\t\t\t\t\t+ (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE\n-\t\t\t\t\t- q), q);\n+\t\t\t\t    ICP_QAT_HW_CCM_NONCE_OFFSET,\n+\t\t\t\t    (uint8_t *)&msg_len_be\n+\t\t\t\t    + (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE\n+\t\t\t\t    - q), q);\n \t\t\t}\n \n \t\t\tif (aad_len_field_sz > 0) {\n@@ -709,10 +707,10 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,\n \t\t\t\t\tuint8_t pad_idx = 0;\n \n \t\t\t\t\tpad_len = ICP_QAT_HW_CCM_AAD_B0_LEN -\n-\t\t\t\t\t\t((aad_ccm_real_len + aad_len_field_sz) %\n-\t\t\t\t\t\t\tICP_QAT_HW_CCM_AAD_B0_LEN);\n+\t\t\t\t\t((aad_ccm_real_len + aad_len_field_sz) %\n+\t\t\t\t\t\tICP_QAT_HW_CCM_AAD_B0_LEN);\n \t\t\t\t\tpad_idx = ICP_QAT_HW_CCM_AAD_B0_LEN +\n-\t\t\t\t\t\taad_ccm_real_len + aad_len_field_sz;\n+\t\t\t\t\t    aad_ccm_real_len + aad_len_field_sz;\n \t\t\t\t\tmemset(&aad_data[pad_idx],\n \t\t\t\t\t\t\t0, pad_len);\n \t\t\t\t}\ndiff --git a/drivers/crypto/qat/qat_crypto.h b/drivers/crypto/qat/qat_sym.h\nsimilarity index 100%\nrename from drivers/crypto/qat/qat_crypto.h\nrename to drivers/crypto/qat/qat_sym.h\ndiff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c\nindex e425eb43f..45f8a253b 100644\n--- a/drivers/crypto/qat/rte_qat_cryptodev.c\n+++ b/drivers/crypto/qat/rte_qat_cryptodev.c\n@@ -9,7 +9,7 @@\n #include <rte_pci.h>\n #include <rte_cryptodev_pmd.h>\n \n-#include \"qat_crypto.h\"\n+#include \"qat_sym.h\"\n #include \"qat_sym_session.h\"\n #include \"qat_logs.h\"\n \n",
    "prefixes": [
        "v3",
        "05/38"
    ]
}