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GET /api/patches/367/?format=api
{ "id": 367, "url": "http://patches.dpdk.org/api/patches/367/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1410503639-10753-8-git-send-email-jijiang.liu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1410503639-10753-8-git-send-email-jijiang.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1410503639-10753-8-git-send-email-jijiang.liu@intel.com", "date": "2014-09-12T06:33:58", "name": "[dpdk-dev,v3,7/8] i40e:support VxLAN Tx checksum offload", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fbd634ae55088f52512c76c7e37060bee107dbc2", "submitter": { "id": 52, "url": "http://patches.dpdk.org/api/people/52/?format=api", "name": "Jijiang Liu", "email": "jijiang.liu@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1410503639-10753-8-git-send-email-jijiang.liu@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/367/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/367/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 53431B3AE;\n\tFri, 12 Sep 2014 08:29:08 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id 592F9B3AC\n\tfor <dev@dpdk.org>; Fri, 12 Sep 2014 08:29:06 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga101.jf.intel.com with ESMTP; 11 Sep 2014 23:34:22 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga001.jf.intel.com with ESMTP; 11 Sep 2014 23:34:20 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id s8C6YJmh005992;\n\tFri, 12 Sep 2014 14:34:19 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s8C6YGur010837; Fri, 12 Sep 2014 14:34:18 +0800", "(from jijiangl@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s8C6YG8S010833; \n\tFri, 12 Sep 2014 14:34:16 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.04,511,1406617200\"; d=\"scan'208\";a=\"572150113\"", "From": "Jijiang Liu <jijiang.liu@intel.com>", "To": "dev@dpdk.org", "Date": "Fri, 12 Sep 2014 14:33:58 +0800", "Message-Id": "<1410503639-10753-8-git-send-email-jijiang.liu@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1410503639-10753-1-git-send-email-jijiang.liu@intel.com>", "References": "<1410503639-10753-1-git-send-email-jijiang.liu@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 7/8]i40e:support VxLAN Tx checksum offload", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Support VxLAN Tx checksum offload, which include\n - outer L3(IP) checksum offload\n - inner L3(IP) checksum offload\n - inner L4(UDP, TCP and SCTP) checksum offload\n\nSigned-off-by: Jijiang Liu <jijiang.liu@intel.com>\nAcked-by: Helin Zhang <helin.zhang@intel.com>\nAcked-by: Jingjing Wu <jingjing.wu@intel.com>\nAcked-by: Jing Chen <jing.d.chen@intel.com>\n\n---\n lib/librte_mbuf/rte_mbuf.h | 2 +\n lib/librte_pmd_i40e/i40e_rxtx.c | 47 ++++++++++++++++++++++++++++++++++++--\n 2 files changed, 46 insertions(+), 3 deletions(-)", "diff": "diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h\nindex 1832e73..212ac3a 100644\n--- a/lib/librte_mbuf/rte_mbuf.h\n+++ b/lib/librte_mbuf/rte_mbuf.h\n@@ -97,6 +97,8 @@ struct rte_ctrlmbuf {\n #define PKT_RX_IEEE1588_PTP 0x0200 /**< RX IEEE1588 L2 Ethernet PT Packet. */\n #define PKT_RX_IEEE1588_TMST 0x0400 /**< RX IEEE1588 L2/L4 timestamped packet.*/\n \n+#define PKT_TX_VXLAN_CKSUM 0x0001 /**< Checksum of TX VxLAN pkt. computed by NIC.. */\n+#define PKT_TX_IVLAN_PKT 0x0002 /**< TX packet is VxLAN packet with an inner VLAN. */\n #define PKT_TX_VLAN_PKT 0x0800 /**< TX packet is a 802.1q VLAN packet. */\n #define PKT_TX_IP_CKSUM 0x1000 /**< IP cksum of TX pkt. computed by NIC. */\n #define PKT_TX_IPV4_CSUM 0x1000 /**< Alias of PKT_TX_IP_CKSUM. */\ndiff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c\nindex a1dce74..a382d74 100644\n--- a/lib/librte_pmd_i40e/i40e_rxtx.c\n+++ b/lib/librte_pmd_i40e/i40e_rxtx.c\n@@ -412,12 +412,16 @@ i40e_rxd_ptype_to_pkt_flags(uint64_t qword)\n \treturn ip_ptype_map[ptype];\n }\n \n+#define L4TUN_LEN (sizeof(struct udp_hdr) + sizeof(struct vxlan_hdr)\\\n+\t\t\t + sizeof(struct ether_hdr))\n static inline void\n i40e_txd_enable_checksum(uint32_t ol_flags,\n \t\t\tuint32_t *td_cmd,\n \t\t\tuint32_t *td_offset,\n \t\t\tuint8_t l2_len,\n-\t\t\tuint8_t l3_len)\n+\t\t\tuint8_t l3_len,\n+\t\t\tuint8_t inner_l3_len,\n+\t\t\tuint32_t *cd_tunneling)\n {\n \tif (!l2_len) {\n \t\tPMD_DRV_LOG(DEBUG, \"L2 length set to 0\\n\");\n@@ -430,6 +434,31 @@ i40e_txd_enable_checksum(uint32_t ol_flags,\n \t\treturn;\n \t}\n \n+\t/* VxLAN packet TX checksum offload */\n+\tif (unlikely(ol_flags & PKT_TX_VXLAN_CKSUM)) {\n+\t\tuint8_t l4tun_len;\n+\n+\t\t/* packet with inner VLAN */\n+\t\tif (ol_flags & PKT_TX_IVLAN_PKT)\n+\t\t\tl4tun_len = L4TUN_LEN + sizeof(struct vlan_hdr);\n+\t\telse\n+\t\t\tl4tun_len = L4TUN_LEN;\n+\n+\t\tif (ol_flags & PKT_TX_IPV4_CSUM)\n+\t\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV4;\n+\t\telse if (ol_flags & PKT_TX_IPV6)\n+\t\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV6;\n+\n+\t\t/* Now set the ctx descriptor fields */\n+\t\t*cd_tunneling |= (l3_len >> 2) <<\n+\t\t\t\tI40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT |\n+\t\t\t\tI40E_TXD_CTX_UDP_TUNNELING |\n+\t\t\t\t(l4tun_len >> 1) <<\n+\t\t\t\tI40E_TXD_CTX_QW0_NATLEN_SHIFT;\n+\n+\t\tl3_len = inner_l3_len;\n+\t}\n+\n \t/* Enable L3 checksum offloads */\n \tif (ol_flags & PKT_TX_IPV4_CSUM) {\n \t\t*td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV4_CSUM;\n@@ -1063,6 +1092,9 @@ i40e_calc_context_desc(uint16_t flags)\n {\n \tuint16_t mask = 0;\n \n+\tif (flags | PKT_TX_VXLAN_CKSUM)\n+\t\tmask |= PKT_TX_VXLAN_CKSUM;\n+\n #ifdef RTE_LIBRTE_IEEE1588\n \tmask |= PKT_TX_IEEE1588_TMST;\n #endif\n@@ -1082,6 +1114,7 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \tvolatile struct i40e_tx_desc *txr;\n \tstruct rte_mbuf *tx_pkt;\n \tstruct rte_mbuf *m_seg;\n+\tuint32_t cd_tunneling_params;\n \tuint16_t tx_id;\n \tuint16_t nb_tx;\n \tuint32_t td_cmd;\n@@ -1091,6 +1124,7 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \tuint16_t ol_flags;\n \tuint8_t l2_len;\n \tuint8_t l3_len;\n+\tuint8_t inner_l3_len;\n \tuint16_t nb_used;\n \tuint16_t nb_ctx;\n \tuint16_t tx_last;\n@@ -1120,6 +1154,12 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\tl2_len = tx_pkt->pkt.vlan_macip.f.l2_len;\n \t\tl3_len = tx_pkt->pkt.vlan_macip.f.l3_len;\n \n+\t\t/**\n+\t\t * the reserved in mbuf is used to store innel L3\n+\t\t * header length.\n+\t\t */\n+\t\tinner_l3_len = tx_pkt->reserved;\n+\n \t\t/* Calculate the number of context descriptors needed. */\n \t\tnb_ctx = i40e_calc_context_desc(ol_flags);\n \n@@ -1166,15 +1206,16 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\ttd_cmd |= I40E_TX_DESC_CMD_ICRC;\n \n \t\t/* Enable checksum offloading */\n+\t\tcd_tunneling_params = 0;\n \t\ti40e_txd_enable_checksum(ol_flags, &td_cmd, &td_offset,\n-\t\t\t\t\t\t\tl2_len, l3_len);\n+\t\t\t\t\t\tl2_len, l3_len, inner_l3_len,\n+\t\t\t\t\t\t&cd_tunneling_params);\n \n \t\tif (unlikely(nb_ctx)) {\n \t\t\t/* Setup TX context descriptor if required */\n \t\t\tvolatile struct i40e_tx_context_desc *ctx_txd =\n \t\t\t\t(volatile struct i40e_tx_context_desc *)\\\n \t\t\t\t\t\t\t&txr[tx_id];\n-\t\t\tuint32_t cd_tunneling_params = 0;\n \t\t\tuint16_t cd_l2tag2 = 0;\n \t\t\tuint64_t cd_type_cmd_tso_mss =\n \t\t\t\tI40E_TX_DESC_DTYPE_CONTEXT;\n", "prefixes": [ "dpdk-dev", "v3", "7/8" ] }