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GET /api/patches/35290/?format=api
{ "id": 35290, "url": "http://patches.dpdk.org/api/patches/35290/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-63-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1519112078-20113-63-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1519112078-20113-63-git-send-email-arybchenko@solarflare.com", "date": "2018-02-20T07:34:20", "name": "[dpdk-dev,62/80] net/sfc/base: support Medford2 event timer semantics", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "7daf94831645948e605bded3d5e0e81596cdc812", "submitter": { "id": 607, "url": "http://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-63-git-send-email-arybchenko@solarflare.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/35290/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/35290/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 1D12B1B66C;\n\tTue, 20 Feb 2018 08:36:32 +0100 (CET)", "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 87BB21B354\n\tfor <dev@dpdk.org>; Tue, 20 Feb 2018 08:35:52 +0100 (CET)", "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us1.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with\n\tESMTPS id\n\t9791278005A for <dev@dpdk.org>; Tue, 20 Feb 2018 07:35:51 +0000 (UTC)", "from sfocexch01r.SolarFlarecom.com (10.20.40.34) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:49 -0800", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tsfocexch01r.SolarFlarecom.com (10.20.40.34) with Microsoft SMTP\n\tServer (TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:16 -0800", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1044.25 via Frontend Transport; Mon, 19 Feb 2018 23:35:15 -0800", "from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com\n\t[10.17.10.10])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZEt9025186; Tue, 20 Feb 2018 07:35:14 GMT", "from uklogin.uk.solarflarecom.com (localhost.localdomain\n\t[127.0.0.1])\n\tby uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZBuE020529; Tue, 20 Feb 2018 07:35:14 GMT" ], "X-Virus-Scanned": "Proofpoint Essentials engine", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "CC": "Andy Moreton <amoreton@solarflare.com>", "Date": "Tue, 20 Feb 2018 07:34:20 +0000", "Message-ID": "<1519112078-20113-63-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.2.3", "In-Reply-To": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>", "References": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-MDID": "1519112152-Yu9c4Q2r86Hl", "Subject": "[dpdk-dev] [PATCH 62/80] net/sfc/base: support Medford2 event timer\n\tsemantics", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Andy Moreton <amoreton@solarflare.com>\n\nThe event timer interface has changed for Medford2 - for\ndetails see bug66418 comment 9. Update the common code to\nuse the new timer semantics for Medford2.\n\nSigned-off-by: Andy Moreton <amoreton@solarflare.com>\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/ef10_ev.c | 10 ++++++++--\n drivers/net/sfc/base/efx_regs_ef10.h | 6 ++++++\n 2 files changed, 14 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c\nindex 256156b..6e00099 100644\n--- a/drivers/net/sfc/base/ef10_ev.c\n+++ b/drivers/net/sfc/base/ef10_ev.c\n@@ -705,9 +705,15 @@ ef10_ev_qmoderate(\n \t\t\tEFX_BAR_VI_WRITED(enp, ER_DD_EVQ_INDIRECT,\n \t\t\t eep->ee_index, &dword, 0);\n \t\t} else {\n-\t\t\tEFX_POPULATE_DWORD_2(dword,\n+\t\t\t/*\n+\t\t\t * NOTE: The TMR_REL field introduced in Medford2 is\n+\t\t\t * ignored on earlier EF10 controllers. See bug66418\n+\t\t\t * comment 9 for details.\n+\t\t\t */\n+\t\t\tEFX_POPULATE_DWORD_3(dword,\n \t\t\t ERF_DZ_TC_TIMER_MODE, mode,\n-\t\t\t ERF_DZ_TC_TIMER_VAL, ticks);\n+\t\t\t ERF_DZ_TC_TIMER_VAL, ticks,\n+\t\t\t ERF_FZ_TC_TMR_REL_VAL, ticks);\n \t\t\tEFX_BAR_VI_WRITED(enp, ER_DZ_EVQ_TMR_REG,\n \t\t\t eep->ee_index, &dword, 0);\n \t\t}\ndiff --git a/drivers/net/sfc/base/efx_regs_ef10.h b/drivers/net/sfc/base/efx_regs_ef10.h\nindex a832ce7..2cb96e8 100644\n--- a/drivers/net/sfc/base/efx_regs_ef10.h\n+++ b/drivers/net/sfc/base/efx_regs_ef10.h\n@@ -156,6 +156,8 @@ extern \"C\" {\n #define\tER_FZ_EVQ_TMR_REG_64K_RESET 0x0\n \n \n+#define\tERF_FZ_TC_TMR_REL_VAL_LBN 16\n+#define\tERF_FZ_TC_TMR_REL_VAL_WIDTH 14\n #define\tERF_FZ_TC_TIMER_MODE_LBN 14\n #define\tERF_FZ_TC_TIMER_MODE_WIDTH 2\n #define\tERF_FZ_TC_TIMER_VAL_LBN 0\n@@ -174,6 +176,8 @@ extern \"C\" {\n #define\tER_FZ_EVQ_TMR_REG_16K_RESET 0x0\n \n \n+/* defined as ERF_FZ_TC_TMR_REL_VAL_LBN 16; */\n+/* defined as ERF_FZ_TC_TMR_REL_VAL_WIDTH 14 */\n /* defined as ERF_FZ_TC_TIMER_MODE_LBN 14; */\n /* defined as ERF_FZ_TC_TIMER_MODE_WIDTH 2 */\n /* defined as ERF_FZ_TC_TIMER_VAL_LBN 0; */\n@@ -192,6 +196,8 @@ extern \"C\" {\n #define\tER_DZ_EVQ_TMR_REG_RESET 0x0\n \n \n+/* defined as ERF_FZ_TC_TMR_REL_VAL_LBN 16; */\n+/* defined as ERF_FZ_TC_TMR_REL_VAL_WIDTH 14 */\n #define\tERF_DZ_TC_TIMER_MODE_LBN 14\n #define\tERF_DZ_TC_TIMER_MODE_WIDTH 2\n #define\tERF_DZ_TC_TIMER_VAL_LBN 0\n", "prefixes": [ "dpdk-dev", "62/80" ] }