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GET /api/patches/35260/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 35260,
    "url": "http://patches.dpdk.org/api/patches/35260/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-58-git-send-email-arybchenko@solarflare.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1519112078-20113-58-git-send-email-arybchenko@solarflare.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1519112078-20113-58-git-send-email-arybchenko@solarflare.com",
    "date": "2018-02-20T07:34:15",
    "name": "[dpdk-dev,57/80] net/sfc/base: move vector config to ef10 NIC board config",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "b7d3c3764f5348fdf7d1faa46ef58959efd16030",
    "submitter": {
        "id": 607,
        "url": "http://patches.dpdk.org/api/people/607/?format=api",
        "name": "Andrew Rybchenko",
        "email": "arybchenko@solarflare.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-58-git-send-email-arybchenko@solarflare.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/35260/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/35260/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DA5181B35E;\n\tTue, 20 Feb 2018 08:35:54 +0100 (CET)",
            "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 230DC1B1C9\n\tfor <dev@dpdk.org>; Tue, 20 Feb 2018 08:35:25 +0100 (CET)",
            "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us3.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with\n\tESMTPS id\n\t8FE826C0053 for <dev@dpdk.org>; Tue, 20 Feb 2018 07:35:20 +0000 (UTC)",
            "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:15 -0800",
            "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1044.25 via Frontend Transport; Mon, 19 Feb 2018 23:35:15 -0800",
            "from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com\n\t[10.17.10.10])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZETa025170; Tue, 20 Feb 2018 07:35:14 GMT",
            "from uklogin.uk.solarflarecom.com (localhost.localdomain\n\t[127.0.0.1])\n\tby uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZBu9020529; Tue, 20 Feb 2018 07:35:14 GMT"
        ],
        "X-Virus-Scanned": "Proofpoint Essentials engine",
        "From": "Andrew Rybchenko <arybchenko@solarflare.com>",
        "To": "<dev@dpdk.org>",
        "CC": "Andy Moreton <amoreton@solarflare.com>",
        "Date": "Tue, 20 Feb 2018 07:34:15 +0000",
        "Message-ID": "<1519112078-20113-58-git-send-email-arybchenko@solarflare.com>",
        "X-Mailer": "git-send-email 1.8.2.3",
        "In-Reply-To": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>",
        "References": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-MDID": "1519112124-Bm2F1mjk8S4R",
        "Subject": "[dpdk-dev] [PATCH 57/80] net/sfc/base: move vector config to ef10\n\tNIC board config",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Andy Moreton <amoreton@solarflare.com>\n\nSigned-off-by: Andy Moreton <amoreton@solarflare.com>\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/ef10_nic.c     | 17 ++++++++++++++++-\n drivers/net/sfc/base/hunt_nic.c     | 17 +----------------\n drivers/net/sfc/base/medford2_nic.c | 17 +----------------\n drivers/net/sfc/base/medford_nic.c  | 17 +----------------\n 4 files changed, 19 insertions(+), 49 deletions(-)",
    "diff": "diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c\nindex 974e7c0..e37a2ac 100644\n--- a/drivers/net/sfc/base/ef10_nic.c\n+++ b/drivers/net/sfc/base/ef10_nic.c\n@@ -1551,6 +1551,7 @@ ef10_nic_board_cfg(\n \tef10_link_state_t els;\n \tefx_port_t *epp = &(enp->en_port);\n \tuint32_t board_type = 0;\n+\tuint32_t base, nvec;\n \tuint32_t port;\n \tuint32_t pf;\n \tuint32_t vf;\n@@ -1667,13 +1668,27 @@ ef10_nic_board_cfg(\n \n \tencp->enc_buftbl_limit = 0xFFFFFFFF;\n \n+\t/* Get interrupt vector limits */\n+\tif ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {\n+\t\tif (EFX_PCI_FUNCTION_IS_PF(encp))\n+\t\t\tgoto fail9;\n+\n+\t\t/* Ignore error (cannot query vector limits from a VF). */\n+\t\tbase = 0;\n+\t\tnvec = 1024;\n+\t}\n+\tencp->enc_intr_vec_base = base;\n+\tencp->enc_intr_limit = nvec;\n+\n \t/* Get remaining controller-specific board config */\n \tif ((rc = enop->eno_board_cfg(enp)) != 0)\n \t\tif (rc != EACCES)\n-\t\t\tgoto fail9;\n+\t\t\tgoto fail10;\n \n \treturn (0);\n \n+fail10:\n+\tEFSYS_PROBE(fail10);\n fail9:\n \tEFSYS_PROBE(fail9);\n fail8:\ndiff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c\nindex 3c1f44a..b19b41e 100644\n--- a/drivers/net/sfc/base/hunt_nic.c\n+++ b/drivers/net/sfc/base/hunt_nic.c\n@@ -81,7 +81,6 @@ hunt_board_cfg(\n \tuint32_t mask;\n \tuint32_t flags;\n \tuint32_t sysclk, dpcpu_clk;\n-\tuint32_t base, nvec;\n \tuint32_t bandwidth;\n \tefx_rc_t rc;\n \n@@ -226,20 +225,8 @@ hunt_board_cfg(\n \t\tgoto fail5;\n \tencp->enc_privilege_mask = mask;\n \n-\t/* Get interrupt vector limits */\n-\tif ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {\n-\t\tif (EFX_PCI_FUNCTION_IS_PF(encp))\n-\t\t\tgoto fail6;\n-\n-\t\t/* Ignore error (cannot query vector limits from a VF). */\n-\t\tbase = 0;\n-\t\tnvec = 1024;\n-\t}\n-\tencp->enc_intr_vec_base = base;\n-\tencp->enc_intr_limit = nvec;\n-\n \tif ((rc = hunt_nic_get_required_pcie_bandwidth(enp, &bandwidth)) != 0)\n-\t\tgoto fail7;\n+\t\tgoto fail6;\n \tencp->enc_required_pcie_bandwidth_mbps = bandwidth;\n \n \t/* All Huntington devices have a PCIe Gen3, 8 lane connector */\n@@ -247,8 +234,6 @@ hunt_board_cfg(\n \n \treturn (0);\n \n-fail7:\n-\tEFSYS_PROBE(fail7);\n fail6:\n \tEFSYS_PROBE(fail6);\n fail5:\ndiff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c\nindex cd072e4..85431d2 100644\n--- a/drivers/net/sfc/base/medford2_nic.c\n+++ b/drivers/net/sfc/base/medford2_nic.c\n@@ -51,7 +51,6 @@ medford2_board_cfg(\n \tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n \tuint32_t mask;\n \tuint32_t sysclk, dpcpu_clk;\n-\tuint32_t base, nvec;\n \tuint32_t end_padding;\n \tuint32_t bandwidth;\n \tuint32_t vi_window_shift;\n@@ -159,18 +158,6 @@ medford2_board_cfg(\n \t\tgoto fail5;\n \tencp->enc_privilege_mask = mask;\n \n-\t/* Get interrupt vector limits */\n-\tif ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {\n-\t\tif (EFX_PCI_FUNCTION_IS_PF(encp))\n-\t\t\tgoto fail6;\n-\n-\t\t/* Ignore error (cannot query vector limits from a VF). */\n-\t\tbase = 0;\n-\t\tnvec = 1024;\n-\t}\n-\tencp->enc_intr_vec_base = base;\n-\tencp->enc_intr_limit = nvec;\n-\n \t/*\n \t * Medford2 stores a single global copy of VPD, not per-PF as on\n \t * Huntington.\n@@ -179,14 +166,12 @@ medford2_board_cfg(\n \n \trc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);\n \tif (rc != 0)\n-\t\tgoto fail7;\n+\t\tgoto fail6;\n \tencp->enc_required_pcie_bandwidth_mbps = bandwidth;\n \tencp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;\n \n \treturn (0);\n \n-fail7:\n-\tEFSYS_PROBE(fail7);\n fail6:\n \tEFSYS_PROBE(fail6);\n fail5:\ndiff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c\nindex 9d6989b..daa1478 100644\n--- a/drivers/net/sfc/base/medford_nic.c\n+++ b/drivers/net/sfc/base/medford_nic.c\n@@ -49,7 +49,6 @@ medford_board_cfg(\n \tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n \tuint32_t mask;\n \tuint32_t sysclk, dpcpu_clk;\n-\tuint32_t base, nvec;\n \tuint32_t end_padding;\n \tuint32_t bandwidth;\n \tefx_rc_t rc;\n@@ -158,18 +157,6 @@ medford_board_cfg(\n \t\tgoto fail4;\n \tencp->enc_privilege_mask = mask;\n \n-\t/* Get interrupt vector limits */\n-\tif ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {\n-\t\tif (EFX_PCI_FUNCTION_IS_PF(encp))\n-\t\t\tgoto fail5;\n-\n-\t\t/* Ignore error (cannot query vector limits from a VF). */\n-\t\tbase = 0;\n-\t\tnvec = 1024;\n-\t}\n-\tencp->enc_intr_vec_base = base;\n-\tencp->enc_intr_limit = nvec;\n-\n \t/*\n \t * Medford stores a single global copy of VPD, not per-PF as on\n \t * Huntington.\n@@ -178,14 +165,12 @@ medford_board_cfg(\n \n \trc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth);\n \tif (rc != 0)\n-\t\tgoto fail6;\n+\t\tgoto fail5;\n \tencp->enc_required_pcie_bandwidth_mbps = bandwidth;\n \tencp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;\n \n \treturn (0);\n \n-fail6:\n-\tEFSYS_PROBE(fail6);\n fail5:\n \tEFSYS_PROBE(fail5);\n fail4:\n",
    "prefixes": [
        "dpdk-dev",
        "57/80"
    ]
}