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GET /api/patches/35244/?format=api
{ "id": 35244, "url": "http://patches.dpdk.org/api/patches/35244/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-55-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1519112078-20113-55-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1519112078-20113-55-git-send-email-arybchenko@solarflare.com", "date": "2018-02-20T07:34:12", "name": "[dpdk-dev,54/80] net/sfc/base: move Rx config to ef10 NIC board config", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "43df03eab96a1679c87b208817bb7348a4138746", "submitter": { "id": 607, "url": "http://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-55-git-send-email-arybchenko@solarflare.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/35244/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/35244/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id ADBA01B303;\n\tTue, 20 Feb 2018 08:35:42 +0100 (CET)", "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 9B2E91B1AF\n\tfor <dev@dpdk.org>; Tue, 20 Feb 2018 08:35:21 +0100 (CET)", "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us3.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with\n\tESMTPS id\n\tBE0336C005B for <dev@dpdk.org>; Tue, 20 Feb 2018 07:35:20 +0000 (UTC)", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:15 -0800", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1044.25 via Frontend Transport; Mon, 19 Feb 2018 23:35:15 -0800", "from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com\n\t[10.17.10.10])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZEtC025157; Tue, 20 Feb 2018 07:35:14 GMT", "from uklogin.uk.solarflarecom.com (localhost.localdomain\n\t[127.0.0.1])\n\tby uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZBu6020529; Tue, 20 Feb 2018 07:35:14 GMT" ], "X-Virus-Scanned": "Proofpoint Essentials engine", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "CC": "Andy Moreton <amoreton@solarflare.com>", "Date": "Tue, 20 Feb 2018 07:34:12 +0000", "Message-ID": "<1519112078-20113-55-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.2.3", "In-Reply-To": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>", "References": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-MDID": "1519112121-Kn3b06+RA9ek", "Subject": "[dpdk-dev] [PATCH 54/80] net/sfc/base: move Rx config to ef10 NIC\n\tboard config", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Andy Moreton <amoreton@solarflare.com>\n\nSigned-off-by: Andy Moreton <amoreton@solarflare.com>\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/ef10_nic.c | 11 +++++++++++\n drivers/net/sfc/base/hunt_nic.c | 10 ----------\n drivers/net/sfc/base/medford2_nic.c | 10 ----------\n drivers/net/sfc/base/medford_nic.c | 10 ----------\n 4 files changed, 11 insertions(+), 30 deletions(-)", "diff": "diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c\nindex e7fa7b8..7223b21 100644\n--- a/drivers/net/sfc/base/ef10_nic.c\n+++ b/drivers/net/sfc/base/ef10_nic.c\n@@ -1635,6 +1635,17 @@ ef10_nic_board_cfg(\n \tif ((rc = ef10_get_datapath_caps(enp)) != 0)\n \t\tgoto fail8;\n \n+\t/* Alignment for WPTR updates */\n+\tencp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;\n+\n+\t/*\n+\t * Maximum number of exclusive RSS contexts. EF10 hardware supports 64\n+\t * in total, but 6 are reserved for shared contexts. They are a global\n+\t * resource so not all may be available.\n+\t */\n+\tencp->enc_rx_scale_max_exclusive_contexts = 64 - 6;\n+\n+\n \t/* Get remaining controller-specific board config */\n \tif ((rc = enop->eno_board_cfg(enp)) != 0)\n \t\tif (rc != EACCES)\ndiff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c\nindex 95b48a7..ef660f7 100644\n--- a/drivers/net/sfc/base/hunt_nic.c\n+++ b/drivers/net/sfc/base/hunt_nic.c\n@@ -205,16 +205,6 @@ hunt_board_cfg(\n \tencp->enc_rx_buf_align_start = 1;\n \tencp->enc_rx_buf_align_end = 64; /* RX DMA end padding */\n \n-\t/* Alignment for WPTR updates */\n-\tencp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;\n-\n-\t/*\n-\t * Maximum number of exclusive RSS contexts which can be allocated. The\n-\t * hardware supports 64, but 6 are reserved for shared contexts. They\n-\t * are a global resource so not all may be available.\n-\t */\n-\tencp->enc_rx_scale_max_exclusive_contexts = 58;\n-\n \tencp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);\n \t/* No boundary crossing limits */\n \tencp->enc_tx_dma_desc_boundary = 0;\ndiff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c\nindex f383b31..ee9cf68 100644\n--- a/drivers/net/sfc/base/medford2_nic.c\n+++ b/drivers/net/sfc/base/medford2_nic.c\n@@ -137,16 +137,6 @@ medford2_board_cfg(\n \t}\n \tencp->enc_rx_buf_align_end = end_padding;\n \n-\t/* Alignment for WPTR updates */\n-\tencp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;\n-\n-\t/*\n-\t * Maximum number of exclusive RSS contexts which can be allocated. The\n-\t * hardware supports 64, but 6 are reserved for shared contexts. They\n-\t * are a global resource so not all may be available.\n-\t */\n-\tencp->enc_rx_scale_max_exclusive_contexts = 58;\n-\n \tencp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);\n \t/* No boundary crossing limits */\n \tencp->enc_tx_dma_desc_boundary = 0;\ndiff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c\nindex 5e9d391..add0af0 100644\n--- a/drivers/net/sfc/base/medford_nic.c\n+++ b/drivers/net/sfc/base/medford_nic.c\n@@ -136,16 +136,6 @@ medford_board_cfg(\n \t}\n \tencp->enc_rx_buf_align_end = end_padding;\n \n-\t/* Alignment for WPTR updates */\n-\tencp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;\n-\n-\t/*\n-\t * Maximum number of exclusive RSS contexts which can be allocated. The\n-\t * hardware supports 64, but 6 are reserved for shared contexts. They\n-\t * are a global resource so not all may be available.\n-\t */\n-\tencp->enc_rx_scale_max_exclusive_contexts = 58;\n-\n \tencp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);\n \t/* No boundary crossing limits */\n \tencp->enc_tx_dma_desc_boundary = 0;\n", "prefixes": [ "dpdk-dev", "54/80" ] }