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{
    "id": 35230,
    "url": "http://patches.dpdk.org/api/patches/35230/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-33-git-send-email-arybchenko@solarflare.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1519112078-20113-33-git-send-email-arybchenko@solarflare.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1519112078-20113-33-git-send-email-arybchenko@solarflare.com",
    "date": "2018-02-20T07:33:50",
    "name": "[dpdk-dev,32/80] net/sfc/base: add support new link modes",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "7920ea70c670af8332dcbc690fc386cb98969b5c",
    "submitter": {
        "id": 607,
        "url": "http://patches.dpdk.org/api/people/607/?format=api",
        "name": "Andrew Rybchenko",
        "email": "arybchenko@solarflare.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-33-git-send-email-arybchenko@solarflare.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/35230/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/35230/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C967D1B2A7;\n\tTue, 20 Feb 2018 08:35:31 +0100 (CET)",
            "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 370571B1A2\n\tfor <dev@dpdk.org>; Tue, 20 Feb 2018 08:35:19 +0100 (CET)",
            "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us1.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with\n\tESMTPS id\n\t45244400056 for <dev@dpdk.org>; Tue, 20 Feb 2018 07:35:18 +0000 (UTC)",
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            "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1044.25 via Frontend Transport; Mon, 19 Feb 2018 23:35:14 -0800",
            "from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com\n\t[10.17.10.10])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZD9F025017; Tue, 20 Feb 2018 07:35:13 GMT",
            "from uklogin.uk.solarflarecom.com (localhost.localdomain\n\t[127.0.0.1])\n\tby uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZBti020529; Tue, 20 Feb 2018 07:35:13 GMT"
        ],
        "X-Virus-Scanned": "Proofpoint Essentials engine",
        "From": "Andrew Rybchenko <arybchenko@solarflare.com>",
        "To": "<dev@dpdk.org>",
        "CC": "Andy Moreton <amoreton@solarflare.com>",
        "Date": "Tue, 20 Feb 2018 07:33:50 +0000",
        "Message-ID": "<1519112078-20113-33-git-send-email-arybchenko@solarflare.com>",
        "X-Mailer": "git-send-email 1.8.2.3",
        "In-Reply-To": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>",
        "References": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-MDID": "1519112118-57dHGBy-Q5M0",
        "Subject": "[dpdk-dev] [PATCH 32/80] net/sfc/base: add support new link modes",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Andy Moreton <amoreton@solarflare.com>\n\nAdd basic support for new link modes for Medford2.\n\nSigned-off-by: Andy Moreton <amoreton@solarflare.com>\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/ef10_phy.c | 48 +++++++++++++++++++++++++++++++++++++++++\n drivers/net/sfc/base/efx.h      |  7 ++++++\n 2 files changed, 55 insertions(+)",
    "diff": "diff --git a/drivers/net/sfc/base/ef10_phy.c b/drivers/net/sfc/base/ef10_phy.c\nindex e47ca22..e05fe2b 100644\n--- a/drivers/net/sfc/base/ef10_phy.c\n+++ b/drivers/net/sfc/base/ef10_phy.c\n@@ -16,6 +16,26 @@ mcdi_phy_decode_cap(\n {\n \tuint32_t mask;\n \n+#define\tCHECK_CAP(_cap) \\\n+\tEFX_STATIC_ASSERT(EFX_PHY_CAP_##_cap == MC_CMD_PHY_CAP_##_cap##_LBN)\n+\n+\tCHECK_CAP(10HDX);\n+\tCHECK_CAP(10FDX);\n+\tCHECK_CAP(100HDX);\n+\tCHECK_CAP(100FDX);\n+\tCHECK_CAP(1000HDX);\n+\tCHECK_CAP(1000FDX);\n+\tCHECK_CAP(10000FDX);\n+\tCHECK_CAP(25000FDX);\n+\tCHECK_CAP(40000FDX);\n+\tCHECK_CAP(50000FDX);\n+\tCHECK_CAP(100000FDX);\n+\tCHECK_CAP(PAUSE);\n+\tCHECK_CAP(ASYM);\n+\tCHECK_CAP(AN);\n+\tCHECK_CAP(DDM);\n+#undef CHECK_CAP\n+\n \tmask = 0;\n \tif (mcdi_cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))\n \t\tmask |= (1 << EFX_PHY_CAP_10HDX);\n@@ -31,8 +51,15 @@ mcdi_phy_decode_cap(\n \t\tmask |= (1 << EFX_PHY_CAP_1000FDX);\n \tif (mcdi_cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))\n \t\tmask |= (1 << EFX_PHY_CAP_10000FDX);\n+\tif (mcdi_cap & (1 << MC_CMD_PHY_CAP_25000FDX_LBN))\n+\t\tmask |= (1 << EFX_PHY_CAP_25000FDX);\n \tif (mcdi_cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))\n \t\tmask |= (1 << EFX_PHY_CAP_40000FDX);\n+\tif (mcdi_cap & (1 << MC_CMD_PHY_CAP_50000FDX_LBN))\n+\t\tmask |= (1 << EFX_PHY_CAP_50000FDX);\n+\tif (mcdi_cap & (1 << MC_CMD_PHY_CAP_100000FDX_LBN))\n+\t\tmask |= (1 << EFX_PHY_CAP_100000FDX);\n+\n \tif (mcdi_cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))\n \t\tmask |= (1 << EFX_PHY_CAP_PAUSE);\n \tif (mcdi_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))\n@@ -61,8 +88,14 @@ mcdi_phy_decode_link_mode(\n \n \tif (!up)\n \t\t*link_modep = EFX_LINK_DOWN;\n+\telse if (speed == 100000 && fd)\n+\t\t*link_modep = EFX_LINK_100000FDX;\n+\telse if (speed == 50000 && fd)\n+\t\t*link_modep = EFX_LINK_50000FDX;\n \telse if (speed == 40000 && fd)\n \t\t*link_modep = EFX_LINK_40000FDX;\n+\telse if (speed == 25000 && fd)\n+\t\t*link_modep = EFX_LINK_25000FDX;\n \telse if (speed == 10000 && fd)\n \t\t*link_modep = EFX_LINK_10000FDX;\n \telse if (speed == 1000)\n@@ -273,7 +306,13 @@ ef10_phy_reconfigure(\n \t\tPHY_CAP_AN, (cap_mask >> EFX_PHY_CAP_AN) & 0x1);\n \t/* Too many fields for for POPULATE macros, so insert this afterwards */\n \tMCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,\n+\t    PHY_CAP_25000FDX, (cap_mask >> EFX_PHY_CAP_25000FDX) & 0x1);\n+\tMCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,\n \t    PHY_CAP_40000FDX, (cap_mask >> EFX_PHY_CAP_40000FDX) & 0x1);\n+\tMCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,\n+\t    PHY_CAP_50000FDX, (cap_mask >> EFX_PHY_CAP_50000FDX) & 0x1);\n+\tMCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,\n+\t    PHY_CAP_100000FDX, (cap_mask >> EFX_PHY_CAP_100000FDX) & 0x1);\n \n #if EFSYS_OPT_LOOPBACK\n \tMCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE,\n@@ -288,9 +327,18 @@ ef10_phy_reconfigure(\n \tcase EFX_LINK_10000FDX:\n \t\tspeed = 10000;\n \t\tbreak;\n+\tcase EFX_LINK_25000FDX:\n+\t\tspeed = 25000;\n+\t\tbreak;\n \tcase EFX_LINK_40000FDX:\n \t\tspeed = 40000;\n \t\tbreak;\n+\tcase EFX_LINK_50000FDX:\n+\t\tspeed = 50000;\n+\t\tbreak;\n+\tcase EFX_LINK_100000FDX:\n+\t\tspeed = 100000;\n+\t\tbreak;\n \tdefault:\n \t\tspeed = 0;\n \t}\ndiff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h\nindex 6149abf..1b92027 100644\n--- a/drivers/net/sfc/base/efx.h\n+++ b/drivers/net/sfc/base/efx.h\n@@ -424,6 +424,9 @@ typedef enum efx_link_mode_e {\n \tEFX_LINK_1000FDX,\n \tEFX_LINK_10000FDX,\n \tEFX_LINK_40000FDX,\n+\tEFX_LINK_25000FDX,\n+\tEFX_LINK_50000FDX,\n+\tEFX_LINK_100000FDX,\n \tEFX_LINK_NMODES\n } efx_link_mode_t;\n \n@@ -861,6 +864,10 @@ typedef enum efx_phy_cap_type_e {\n \tEFX_PHY_CAP_ASYM,\n \tEFX_PHY_CAP_AN,\n \tEFX_PHY_CAP_40000FDX,\n+\tEFX_PHY_CAP_DDM,\n+\tEFX_PHY_CAP_100000FDX,\n+\tEFX_PHY_CAP_25000FDX,\n+\tEFX_PHY_CAP_50000FDX,\n \tEFX_PHY_CAP_NTYPES\n } efx_phy_cap_type_t;\n \n",
    "prefixes": [
        "dpdk-dev",
        "32/80"
    ]
}