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Update a patch.

GET /api/patches/318/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 318,
    "url": "http://patches.dpdk.org/api/patches/318/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1410247299-4365-3-git-send-email-helin.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1410247299-4365-3-git-send-email-helin.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1410247299-4365-3-git-send-email-helin.zhang@intel.com",
    "date": "2014-09-09T07:21:26",
    "name": "[dpdk-dev,02/15] i40e: support nvmupdate by default",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "eaf7d9ff27be3f587d9fe8e1645eff73845129b0",
    "submitter": {
        "id": 14,
        "url": "http://patches.dpdk.org/api/people/14/?format=api",
        "name": "Zhang, Helin",
        "email": "helin.zhang@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1410247299-4365-3-git-send-email-helin.zhang@intel.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/318/comments/",
    "check": "pending",
    "checks": "http://patches.dpdk.org/api/patches/318/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 9A8A6B3A5;\n\tTue,  9 Sep 2014 09:17:00 +0200 (CEST)",
            "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id C0E4AB396\n\tfor <dev@dpdk.org>; Tue,  9 Sep 2014 09:16:54 +0200 (CEST)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga102.fm.intel.com with ESMTP; 09 Sep 2014 00:21:57 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby fmsmga002.fm.intel.com with ESMTP; 09 Sep 2014 00:21:55 -0700",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id s897LrfL008238;\n\tTue, 9 Sep 2014 15:21:53 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s897LpF4004414; Tue, 9 Sep 2014 15:21:53 +0800",
            "(from hzhan75@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s897LpcY004410; \n\tTue, 9 Sep 2014 15:21:51 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.04,491,1406617200\"; d=\"scan'208\";a=\"596669300\"",
        "From": "Helin Zhang <helin.zhang@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Tue,  9 Sep 2014 15:21:26 +0800",
        "Message-Id": "<1410247299-4365-3-git-send-email-helin.zhang@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1410247299-4365-1-git-send-email-helin.zhang@intel.com>",
        "References": "<1410247299-4365-1-git-send-email-helin.zhang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 02/15] i40e: support nvmupdate by default",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "'nvmupdate' is intended to support the userland NVMUpdate tool for\nFortville eeprom. These code changes is to remove the conditional\ncompile macro, and support those by default. In addition, renaming\nall 'errno' to avoid any compile warning or error.\n\nSigned-off-by: Helin Zhang <helin.zhang@intel.com>\nReviewed-by: Chen Jing <jing.d.chen@intel.com>\n---\n lib/librte_pmd_i40e/i40e/i40e_adminq.h |   2 -\n lib/librte_pmd_i40e/i40e/i40e_nvm.c    | 120 ++++++++++++++++-----------------\n 2 files changed, 59 insertions(+), 63 deletions(-)",
    "diff": "diff --git a/lib/librte_pmd_i40e/i40e/i40e_adminq.h b/lib/librte_pmd_i40e/i40e/i40e_adminq.h\nindex 3a59faa..27f2843 100644\n--- a/lib/librte_pmd_i40e/i40e/i40e_adminq.h\n+++ b/lib/librte_pmd_i40e/i40e/i40e_adminq.h\n@@ -110,7 +110,6 @@ struct i40e_adminq_info {\n \tenum i40e_admin_queue_err asq_last_status;\n \tenum i40e_admin_queue_err arq_last_status;\n };\n-#ifdef I40E_NVMUPD_SUPPORT\n \n /**\n  * i40e_aq_rc_to_posix - convert errors to user-land codes\n@@ -146,7 +145,6 @@ STATIC inline int i40e_aq_rc_to_posix(u16 aq_rc)\n \n \treturn aq_to_posix[aq_rc];\n }\n-#endif\n \n /* general information */\n #define I40E_AQ_LARGE_BUF\t\t512\ndiff --git a/lib/librte_pmd_i40e/i40e/i40e_nvm.c b/lib/librte_pmd_i40e/i40e/i40e_nvm.c\nindex 876c451..c62f5eb 100644\n--- a/lib/librte_pmd_i40e/i40e/i40e_nvm.c\n+++ b/lib/librte_pmd_i40e/i40e/i40e_nvm.c\n@@ -478,29 +478,28 @@ enum i40e_status_code i40e_validate_nvm_checksum(struct i40e_hw *hw,\n i40e_validate_nvm_checksum_exit:\n \treturn ret_code;\n }\n-#ifdef I40E_NVMUPD_SUPPORT\n \n STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,\n \t\t\t\t\t\t    struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t    u8 *bytes, int *errno);\n+\t\t\t\t\t\t    u8 *bytes, int *err);\n STATIC enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw,\n \t\t\t\t\t\t    struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t    u8 *bytes, int *errno);\n+\t\t\t\t\t\t    u8 *bytes, int *err);\n STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,\n \t\t\t\t\t\t    struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t    u8 *bytes, int *errno);\n+\t\t\t\t\t\t    u8 *bytes, int *err);\n STATIC enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,\n \t\t\t\t\t\t    struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t    int *errno);\n+\t\t\t\t\t\t    int *err);\n STATIC enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw,\n \t\t\t\t\t\t   struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t   int *errno);\n+\t\t\t\t\t\t   int *err);\n STATIC enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw,\n \t\t\t\t\t\t   struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t   u8 *bytes, int *errno);\n+\t\t\t\t\t\t   u8 *bytes, int *err);\n STATIC enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw,\n \t\t\t\t\t\t  struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t  u8 *bytes, int *errno);\n+\t\t\t\t\t\t  u8 *bytes, int *err);\n STATIC inline u8 i40e_nvmupd_get_module(u32 val)\n {\n \treturn (u8)(val & I40E_NVM_MOD_PNT_MASK);\n@@ -515,38 +514,38 @@ STATIC inline u8 i40e_nvmupd_get_transaction(u32 val)\n  * @hw: pointer to hardware structure\n  * @cmd: pointer to nvm update command\n  * @bytes: pointer to the data buffer\n- * @errno: pointer to return error code\n+ * @err: pointer to return error code\n  *\n  * Dispatches command depending on what update state is current\n  **/\n enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,\n \t\t\t\t\t  struct i40e_nvm_access *cmd,\n-\t\t\t\t\t  u8 *bytes, int *errno)\n+\t\t\t\t\t  u8 *bytes, int *err)\n {\n \tenum i40e_status_code status;\n \n \tDEBUGFUNC(\"i40e_nvmupd_command\");\n \n \t/* assume success */\n-\t*errno = 0;\n+\t*err = 0;\n \n \tswitch (hw->nvmupd_state) {\n \tcase I40E_NVMUPD_STATE_INIT:\n-\t\tstatus = i40e_nvmupd_state_init(hw, cmd, bytes, errno);\n+\t\tstatus = i40e_nvmupd_state_init(hw, cmd, bytes, err);\n \t\tbreak;\n \n \tcase I40E_NVMUPD_STATE_READING:\n-\t\tstatus = i40e_nvmupd_state_reading(hw, cmd, bytes, errno);\n+\t\tstatus = i40e_nvmupd_state_reading(hw, cmd, bytes, err);\n \t\tbreak;\n \n \tcase I40E_NVMUPD_STATE_WRITING:\n-\t\tstatus = i40e_nvmupd_state_writing(hw, cmd, bytes, errno);\n+\t\tstatus = i40e_nvmupd_state_writing(hw, cmd, bytes, err);\n \t\tbreak;\n \n \tdefault:\n \t\t/* invalid state, should never happen */\n \t\tstatus = I40E_NOT_SUPPORTED;\n-\t\t*errno = -ESRCH;\n+\t\t*err = -ESRCH;\n \t\tbreak;\n \t}\n \treturn status;\n@@ -557,29 +556,29 @@ enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,\n  * @hw: pointer to hardware structure\n  * @cmd: pointer to nvm update command buffer\n  * @bytes: pointer to the data buffer\n- * @errno: pointer to return error code\n+ * @err: pointer to return error code\n  *\n  * Process legitimate commands of the Init state and conditionally set next\n  * state. Reject all other commands.\n  **/\n STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,\n \t\t\t\t\t\t    struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t    u8 *bytes, int *errno)\n+\t\t\t\t\t\t    u8 *bytes, int *err)\n {\n \tenum i40e_status_code status = I40E_SUCCESS;\n \tenum i40e_nvmupd_cmd upd_cmd;\n \n \tDEBUGFUNC(\"i40e_nvmupd_state_init\");\n \n-\tupd_cmd = i40e_nvmupd_validate_command(hw, cmd, errno);\n+\tupd_cmd = i40e_nvmupd_validate_command(hw, cmd, err);\n \n \tswitch (upd_cmd) {\n \tcase I40E_NVMUPD_READ_SA:\n \t\tstatus = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);\n \t\tif (status) {\n-\t\t\t*errno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n+\t\t\t*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n \t\t} else {\n-\t\t\tstatus = i40e_nvmupd_nvm_read(hw, cmd, bytes, errno);\n+\t\t\tstatus = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);\n \t\t\ti40e_release_nvm(hw);\n \t\t}\n \t\tbreak;\n@@ -587,9 +586,9 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,\n \tcase I40E_NVMUPD_READ_SNT:\n \t\tstatus = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);\n \t\tif (status) {\n-\t\t\t*errno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n+\t\t\t*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n \t\t} else {\n-\t\t\tstatus = i40e_nvmupd_nvm_read(hw, cmd, bytes, errno);\n+\t\t\tstatus = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);\n \t\t\thw->nvmupd_state = I40E_NVMUPD_STATE_READING;\n \t\t}\n \t\tbreak;\n@@ -597,9 +596,9 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,\n \tcase I40E_NVMUPD_WRITE_ERA:\n \t\tstatus = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);\n \t\tif (status) {\n-\t\t\t*errno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n+\t\t\t*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n \t\t} else {\n-\t\t\tstatus = i40e_nvmupd_nvm_erase(hw, cmd, errno);\n+\t\t\tstatus = i40e_nvmupd_nvm_erase(hw, cmd, err);\n \t\t\tif (status)\n \t\t\t\ti40e_release_nvm(hw);\n \t\t\telse\n@@ -610,9 +609,9 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,\n \tcase I40E_NVMUPD_WRITE_SA:\n \t\tstatus = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);\n \t\tif (status) {\n-\t\t\t*errno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n+\t\t\t*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n \t\t} else {\n-\t\t\tstatus = i40e_nvmupd_nvm_write(hw, cmd, bytes, errno);\n+\t\t\tstatus = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);\n \t\t\tif (status)\n \t\t\t\ti40e_release_nvm(hw);\n \t\t\telse\n@@ -623,9 +622,9 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,\n \tcase I40E_NVMUPD_WRITE_SNT:\n \t\tstatus = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);\n \t\tif (status) {\n-\t\t\t*errno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n+\t\t\t*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n \t\t} else {\n-\t\t\tstatus = i40e_nvmupd_nvm_write(hw, cmd, bytes, errno);\n+\t\t\tstatus = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);\n \t\t\thw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;\n \t\t}\n \t\tbreak;\n@@ -633,11 +632,11 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,\n \tcase I40E_NVMUPD_CSUM_SA:\n \t\tstatus = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);\n \t\tif (status) {\n-\t\t\t*errno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n+\t\t\t*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n \t\t} else {\n \t\t\tstatus = i40e_update_nvm_checksum(hw);\n \t\t\tif (status) {\n-\t\t\t\t*errno = hw->aq.asq_last_status ?\n+\t\t\t\t*err = hw->aq.asq_last_status ?\n \t\t\t\t   i40e_aq_rc_to_posix(hw->aq.asq_last_status) :\n \t\t\t\t   -EIO;\n \t\t\t\ti40e_release_nvm(hw);\n@@ -649,7 +648,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,\n \n \tdefault:\n \t\tstatus = I40E_ERR_NVM;\n-\t\t*errno = -ESRCH;\n+\t\t*err = -ESRCH;\n \t\tbreak;\n \t}\n \treturn status;\n@@ -660,37 +659,37 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,\n  * @hw: pointer to hardware structure\n  * @cmd: pointer to nvm update command buffer\n  * @bytes: pointer to the data buffer\n- * @errno: pointer to return error code\n+ * @err: pointer to return error code\n  *\n  * NVM ownership is already held.  Process legitimate commands and set any\n  * change in state; reject all other commands.\n  **/\n STATIC enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw,\n \t\t\t\t\t\t    struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t    u8 *bytes, int *errno)\n+\t\t\t\t\t\t    u8 *bytes, int *err)\n {\n \tenum i40e_status_code status;\n \tenum i40e_nvmupd_cmd upd_cmd;\n \n \tDEBUGFUNC(\"i40e_nvmupd_state_reading\");\n \n-\tupd_cmd = i40e_nvmupd_validate_command(hw, cmd, errno);\n+\tupd_cmd = i40e_nvmupd_validate_command(hw, cmd, err);\n \n \tswitch (upd_cmd) {\n \tcase I40E_NVMUPD_READ_SA:\n \tcase I40E_NVMUPD_READ_CON:\n-\t\tstatus = i40e_nvmupd_nvm_read(hw, cmd, bytes, errno);\n+\t\tstatus = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);\n \t\tbreak;\n \n \tcase I40E_NVMUPD_READ_LCB:\n-\t\tstatus = i40e_nvmupd_nvm_read(hw, cmd, bytes, errno);\n+\t\tstatus = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);\n \t\ti40e_release_nvm(hw);\n \t\thw->nvmupd_state = I40E_NVMUPD_STATE_INIT;\n \t\tbreak;\n \n \tdefault:\n \t\tstatus = I40E_NOT_SUPPORTED;\n-\t\t*errno = -ESRCH;\n+\t\t*err = -ESRCH;\n \t\tbreak;\n \t}\n \treturn status;\n@@ -701,29 +700,29 @@ STATIC enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw,\n  * @hw: pointer to hardware structure\n  * @cmd: pointer to nvm update command buffer\n  * @bytes: pointer to the data buffer\n- * @errno: pointer to return error code\n+ * @err: pointer to return error code\n  *\n  * NVM ownership is already held.  Process legitimate commands and set any\n  * change in state; reject all other commands\n  **/\n STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,\n \t\t\t\t\t\t    struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t    u8 *bytes, int *errno)\n+\t\t\t\t\t\t    u8 *bytes, int *err)\n {\n \tenum i40e_status_code status;\n \tenum i40e_nvmupd_cmd upd_cmd;\n \n \tDEBUGFUNC(\"i40e_nvmupd_state_writing\");\n \n-\tupd_cmd = i40e_nvmupd_validate_command(hw, cmd, errno);\n+\tupd_cmd = i40e_nvmupd_validate_command(hw, cmd, err);\n \n \tswitch (upd_cmd) {\n \tcase I40E_NVMUPD_WRITE_CON:\n-\t\tstatus = i40e_nvmupd_nvm_write(hw, cmd, bytes, errno);\n+\t\tstatus = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);\n \t\tbreak;\n \n \tcase I40E_NVMUPD_WRITE_LCB:\n-\t\tstatus = i40e_nvmupd_nvm_write(hw, cmd, bytes, errno);\n+\t\tstatus = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);\n \t\tif (!status) {\n \t\t\thw->aq.nvm_release_on_done = true;\n \t\t\thw->nvmupd_state = I40E_NVMUPD_STATE_INIT;\n@@ -733,7 +732,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,\n \tcase I40E_NVMUPD_CSUM_CON:\n \t\tstatus = i40e_update_nvm_checksum(hw);\n \t\tif (status)\n-\t\t\t*errno = hw->aq.asq_last_status ?\n+\t\t\t*err = hw->aq.asq_last_status ?\n \t\t\t\t   i40e_aq_rc_to_posix(hw->aq.asq_last_status) :\n \t\t\t\t   -EIO;\n \t\tbreak;\n@@ -741,7 +740,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,\n \tcase I40E_NVMUPD_CSUM_LCB:\n \t\tstatus = i40e_update_nvm_checksum(hw);\n \t\tif (status) {\n-\t\t\t*errno = hw->aq.asq_last_status ?\n+\t\t\t*err = hw->aq.asq_last_status ?\n \t\t\t\t   i40e_aq_rc_to_posix(hw->aq.asq_last_status) :\n \t\t\t\t   -EIO;\n \t\t} else {\n@@ -752,7 +751,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,\n \n \tdefault:\n \t\tstatus = I40E_NOT_SUPPORTED;\n-\t\t*errno = -ESRCH;\n+\t\t*err = -ESRCH;\n \t\tbreak;\n \t}\n \treturn status;\n@@ -762,13 +761,13 @@ STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,\n  * i40e_nvmupd_validate_command - Validate given command\n  * @hw: pointer to hardware structure\n  * @cmd: pointer to nvm update command buffer\n- * @errno: pointer to return error code\n+ * @err: pointer to return error code\n  *\n  * Return one of the valid command types or I40E_NVMUPD_INVALID\n  **/\n STATIC enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,\n \t\t\t\t\t\t    struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t    int *errno)\n+\t\t\t\t\t\t    int *err)\n {\n \tenum i40e_nvmupd_cmd upd_cmd;\n \tu8 transaction, module;\n@@ -786,7 +785,7 @@ STATIC enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,\n \t    (cmd->data_size > I40E_NVMUPD_MAX_DATA)) {\n \t\tDEBUGOUT1(\"i40e_nvmupd_validate_command data_size %d\\n\",\n \t\t\tcmd->data_size);\n-\t\t*errno = -EFAULT;\n+\t\t*err = -EFAULT;\n \t\treturn I40E_NVMUPD_INVALID;\n \t}\n \n@@ -839,10 +838,10 @@ STATIC enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,\n \t}\n \n \tif (upd_cmd == I40E_NVMUPD_INVALID) {\n-\t\t*errno = -EFAULT;\n+\t\t*err = -EFAULT;\n \t\tDEBUGOUT2(\n-\t\t\t\"i40e_nvmupd_validate_command returns %d  errno: %d\\n\",\n-\t\t\tupd_cmd, *errno);\n+\t\t\t\"i40e_nvmupd_validate_command returns %d  err: %d\\n\",\n+\t\t\tupd_cmd, *err);\n \t}\n \treturn upd_cmd;\n }\n@@ -852,13 +851,13 @@ STATIC enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,\n  * @hw: pointer to hardware structure\n  * @cmd: pointer to nvm update command buffer\n  * @bytes: pointer to the data buffer\n- * @errno: pointer to return error code\n+ * @err: pointer to return error code\n  *\n  * cmd structure contains identifiers and data buffer\n  **/\n STATIC enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw,\n \t\t\t\t\t\t  struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t  u8 *bytes, int *errno)\n+\t\t\t\t\t\t  u8 *bytes, int *err)\n {\n \tenum i40e_status_code status;\n \tu8 module, transaction;\n@@ -874,7 +873,7 @@ STATIC enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw,\n \t\t\t\t  bytes, last, NULL);\n \tDEBUGOUT1(\"i40e_nvmupd_nvm_read status %d\\n\", status);\n \tif (status != I40E_SUCCESS)\n-\t\t*errno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n+\t\t*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n \n \treturn status;\n }\n@@ -883,13 +882,13 @@ STATIC enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw,\n  * i40e_nvmupd_nvm_erase - Erase an NVM module\n  * @hw: pointer to hardware structure\n  * @cmd: pointer to nvm update command buffer\n- * @errno: pointer to return error code\n+ * @err: pointer to return error code\n  *\n  * module, offset, data_size and data are in cmd structure\n  **/\n STATIC enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw,\n \t\t\t\t\t\t   struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t   int *errno)\n+\t\t\t\t\t\t   int *err)\n {\n \tenum i40e_status_code status = I40E_SUCCESS;\n \tu8 module, transaction;\n@@ -904,7 +903,7 @@ STATIC enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw,\n \t\t\t\t   last, NULL);\n \tDEBUGOUT1(\"i40e_nvmupd_nvm_erase status %d\\n\", status);\n \tif (status != I40E_SUCCESS)\n-\t\t*errno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n+\t\t*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n \n \treturn status;\n }\n@@ -914,13 +913,13 @@ STATIC enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw,\n  * @hw: pointer to hardware structure\n  * @cmd: pointer to nvm update command buffer\n  * @bytes: pointer to the data buffer\n- * @errno: pointer to return error code\n+ * @err: pointer to return error code\n  *\n  * module, offset, data_size and data are in cmd structure\n  **/\n STATIC enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw,\n \t\t\t\t\t\t   struct i40e_nvm_access *cmd,\n-\t\t\t\t\t\t   u8 *bytes, int *errno)\n+\t\t\t\t\t\t   u8 *bytes, int *err)\n {\n \tenum i40e_status_code status = I40E_SUCCESS;\n \tu8 module, transaction;\n@@ -935,8 +934,7 @@ STATIC enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw,\n \t\t\t\t    (u16)cmd->data_size, bytes, last, NULL);\n \tDEBUGOUT1(\"i40e_nvmupd_nvm_write status %d\\n\", status);\n \tif (status != I40E_SUCCESS)\n-\t\t*errno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n+\t\t*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);\n \n \treturn status;\n }\n-#endif\n",
    "prefixes": [
        "dpdk-dev",
        "02/15"
    ]
}