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GET /api/patches/31447/?format=api
{ "id": 31447, "url": "http://patches.dpdk.org/api/patches/31447/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1510852731-27555-1-git-send-email-alan.dewar@att.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1510852731-27555-1-git-send-email-alan.dewar@att.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1510852731-27555-1-git-send-email-alan.dewar@att.com", "date": "2017-11-16T17:18:51", "name": "[dpdk-dev] test: new sched WRR unit-test", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "351c7a024bcef69055b361d0d81b6319782c508e", "submitter": { "id": 817, "url": "http://patches.dpdk.org/api/people/817/?format=api", "name": "Alan Dewar", "email": "alangordondewar@gmail.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1510852731-27555-1-git-send-email-alan.dewar@att.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/31447/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/31447/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D1EB51B1A0;\n\tThu, 16 Nov 2017 18:20:06 +0100 (CET)", "from mail-wm0-f42.google.com (mail-wm0-f42.google.com\n\t[74.125.82.42]) by dpdk.org (Postfix) with ESMTP id 9AEE6325C\n\tfor <dev@dpdk.org>; Thu, 16 Nov 2017 18:20:05 +0100 (CET)", "by mail-wm0-f42.google.com with SMTP id l8so1655558wmg.4\n\tfor <dev@dpdk.org>; Thu, 16 Nov 2017 09:20:05 -0800 (PST)", "from bra-l27t7p12.brocade.com ([144.49.71.22])\n\tby smtp.gmail.com with ESMTPSA id\n\tp37sm1472144eda.96.2017.11.16.09.20.02\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tThu, 16 Nov 2017 09:20:03 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id;\n\tbh=ZFosB0+QWC8B/bxNLfCpG/qCsde1qbWOMSR0rELf0NU=;\n\tb=aYM8IaeCOYWi6sVHcBgeinvHNCb8nfKTuTyta0KbuPJpn0XhVMG/9VdAUjjWQcWSvG\n\t5kY0FahXxbpR1sPRkEecnwjPlJ4CF8ISS5jIlQ+344Lm/jmy537nYlEPzba8J+5fe+k6\n\t83/ydKPLlN9LwIprKQKBKXk6pFXw5xgv99ViGcYyUA6yDysd78NdcNpq2UII3M9/I7lz\n\trtqxOWV07y2bbNY47/fmZdfwn9G7zFateEPwBoLMeoK2utPHhDVF9ercr2OMzjl+OCDt\n\t3LhZUzGzBrq6ahkRqWsAwLvmHxQnKxm+7OdQZtQ+z16+YsmP+5HQPCCbRZGrvdGSzsYP\n\tu4Cw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id;\n\tbh=ZFosB0+QWC8B/bxNLfCpG/qCsde1qbWOMSR0rELf0NU=;\n\tb=dNlXN2bkcMCKt7wJsTOOO+YVi90h5Tsq1vua/UIU5GwqbeJKtUaN1hT14GzKW1WK0v\n\tqVX/RP3f8yOh/LeEhFhASQN+ZWkCXHvOaar/N+3xOkXU8d9oAUia0To1d8JgRa5q+MH0\n\tXjfGF7RyjLq0p2eiYIzNswZj2gJ/m2gQqTZ3tCrEpTgiSQVk2d3axvUv8WEZIr2JSLOm\n\tgzFoK6yJhBIA/6aKCBGS4e4lLm2kV82JnbAEKt1VYCxTKW/VMuCBszqbtIlz65lELLrx\n\th1a4Go4+5rAgk/aaUZGQNvNX//Ksjrm32Gs0Hf4qGCK4/VHf3fkQIDm2KJ3MhD+RJCxB\n\t8oGw==", "X-Gm-Message-State": "AJaThX4pDF00gnqqaC6ujbOsseyca+goQZHVfeNU6Kq7btHc6T6cGi+1\n\tkuTFyXTh/9bqH2glxtBSwA==", "X-Google-Smtp-Source": "AGs4zMbtaF3eiQTreOYviHFAJ6/NE6YYk0hy25pcxKc60G2+gaaZ6zS98SjmF746SO+n/KWm+ErF0g==", "X-Received": "by 10.80.150.196 with SMTP id z4mr3883389eda.110.1510852804897; \n\tThu, 16 Nov 2017 09:20:04 -0800 (PST)", "From": "alangordondewar@gmail.com", "X-Google-Original-From": "alan.dewar@att.com", "To": "cristian.dumitrescu@intel.com", "Cc": "dev@dpdk.org, chas3@att.com, luca.boccassi@att.com,\n\talan.robertson@att.com, Alan Dewar <alan.dewar@att.com>", "Date": "Thu, 16 Nov 2017 17:18:51 +0000", "Message-Id": "<1510852731-27555-1-git-send-email-alan.dewar@att.com>", "X-Mailer": "git-send-email 2.1.4", "Subject": "[dpdk-dev] [PATCH] test: new sched WRR unit-test", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Alan Dewar <alan.dewar@att.com>\n\nNew unit-test for the librte_sched WRR weighting code.\n\nWith the standard 17.11 code, the first three sub-tests pass, but\nthe last two fail due to bugs in the WRR weighting code.\n\nWith the \"sched: fix overflow errors in WRR weighting code\" patch\nall five sub-tests pass.\n\nSigned-off-by: Alan Dewar <alan.dewar@att.com>\n---\n test/test/Makefile | 1 +\n test/test/test_sched_wrr.c | 434 +++++++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 435 insertions(+)\n create mode 100644 test/test/test_sched_wrr.c", "diff": "diff --git a/test/test/Makefile b/test/test/Makefile\nindex bb54c98..0ab0ed3 100644\n--- a/test/test/Makefile\n+++ b/test/test/Makefile\n@@ -173,6 +173,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_NET) += test_crc.c\n ifeq ($(CONFIG_RTE_LIBRTE_SCHED),y)\n SRCS-y += test_red.c\n SRCS-y += test_sched.c\n+SRCS-y += test_sched_wrr.c\n endif\n \n SRCS-$(CONFIG_RTE_LIBRTE_METER) += test_meter.c\ndiff --git a/test/test/test_sched_wrr.c b/test/test/test_sched_wrr.c\nnew file mode 100644\nindex 0000000..3214091\n--- /dev/null\n+++ b/test/test/test_sched_wrr.c\n@@ -0,0 +1,434 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.\n+ * Copyright(c) 2017 ATT Intellectual Property. All rights reserved.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Intel Corporation nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+\n+#include <stdlib.h>\n+#include <stdio.h>\n+#include <string.h>\n+#include <stdint.h>\n+#include <unistd.h>\n+\n+#include \"test.h\"\n+\n+#include <rte_cycles.h>\n+#include <rte_ether.h>\n+#include <rte_ip.h>\n+#include <rte_byteorder.h>\n+#include <rte_sched.h>\n+\n+\n+#define SUBPORT 0\n+#define PIPE 1\n+#define TC 0 // 2\n+#define QUEUE 3\n+\n+static struct rte_sched_subport_params subport_param[] = {\n+\t{\n+\t\t.tb_rate = 1250000000,\n+\t\t.tb_size = 1000000,\n+\n+\t\t.tc_rate = {1250000000, 1250000000, 1250000000, 1250000000},\n+\t\t.tc_period = 10,\n+\t},\n+};\n+\n+static struct rte_sched_pipe_params pipe_profile[] = {\n+\t{ /* Profile #0 */\n+\t\t.tb_rate = 305175,\n+\t\t.tb_size = 1000000,\n+\n+\t\t.tc_rate = {305175, 305175, 305175, 305175},\n+\t\t.tc_period = 160,\n+\n+\t\t.wrr_weights = {1, 1, 1, 1,\n+\t\t\t\t1, 1, 1, 1,\n+\t\t\t\t1, 1, 1, 1,\n+\t\t\t\t1, 1, 1, 1},\n+\t},\n+};\n+\n+static struct rte_sched_port_params port_param = {\n+\t.socket = 0, /* computed */\n+\t.rate = 0, /* computed */\n+\t.mtu = 1522,\n+\t.frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT,\n+\t.n_subports_per_port = 1,\n+\t.n_pipes_per_subport = 1024,\n+\t.qsize = {32, 32, 32, 32},\n+\t.pipe_profiles = pipe_profile,\n+\t.n_pipe_profiles = 1,\n+};\n+\n+#define NB_MBUF (4 * 32)\n+#define MBUF_DATA_SZ (2048 + RTE_PKTMBUF_HEADROOM)\n+#define MEMPOOL_CACHE_SZ 0\n+#define SOCKET 0\n+\n+\n+static struct rte_mempool *\n+create_mempool(uint32_t total_packets)\n+{\n+\tstruct rte_mempool *mp;\n+\n+\tmp = rte_mempool_lookup(\"test_sched wrr\");\n+\tif (!mp)\n+\t\tmp = rte_pktmbuf_pool_create(\"test_sched wrr\", total_packets,\n+\t\t\tMEMPOOL_CACHE_SZ, 0, MBUF_DATA_SZ, SOCKET);\n+\n+\treturn mp;\n+}\n+\n+static void\n+delete_mempool(struct rte_mempool *mp)\n+{\n+\trte_mempool_free(mp);\n+}\n+\n+static void\n+prepare_pkt(struct rte_mbuf *mbuf, uint32_t tc, uint32_t queue)\n+{\n+\tstruct ether_hdr *eth_hdr;\n+\tstruct vlan_hdr *vlan1, *vlan2;\n+\tstruct ipv4_hdr *ip_hdr;\n+\n+\t/* Simulate a classifier */\n+\teth_hdr = rte_pktmbuf_mtod(mbuf, struct ether_hdr *);\n+\tvlan1 = (struct vlan_hdr *)(ð_hdr->ether_type);\n+\tvlan2 = (struct vlan_hdr *)((uintptr_t)ð_hdr->ether_type +\n+\t\t\t\t sizeof(struct vlan_hdr));\n+\teth_hdr = (struct ether_hdr *)((uintptr_t)ð_hdr->ether_type +\n+\t\t\t\t 2 * sizeof(struct vlan_hdr));\n+\tip_hdr = (struct ipv4_hdr *)((uintptr_t)eth_hdr +\n+\t\t\t\t sizeof(eth_hdr->ether_type));\n+\n+\tvlan1->vlan_tci = rte_cpu_to_be_16(SUBPORT);\n+\tvlan2->vlan_tci = rte_cpu_to_be_16(PIPE);\n+\teth_hdr->ether_type = rte_cpu_to_be_16(ETHER_TYPE_IPv4);\n+\tip_hdr->dst_addr = IPv4(0, 0, TC, QUEUE);\n+\n+\n+\trte_sched_port_pkt_write(mbuf, SUBPORT, PIPE, tc, queue,\n+\t\t\t\t e_RTE_METER_YELLOW);\n+\n+\t/* 64 byte packet */\n+\tmbuf->pkt_len = 60;\n+\tmbuf->data_len = 60;\n+}\n+\n+/*\n+ * This function carries out the core of the enqueue/dequeue testing.\n+ * This is where we should detect failures if the WRR code is broken.\n+ */\n+static int\n+test_sched_wrr_enqueue_dequeue(const char *subtest_name,\n+\t\t\t struct rte_mempool *mp,\n+\t\t\t struct rte_sched_port *port,\n+\t\t\t struct rte_mbuf **in_mbufs,\n+\t\t\t struct rte_mbuf **out_mbufs,\n+\t\t\t int32_t enqueue_packets,\n+\t\t\t int32_t dequeue_packets,\n+\t\t\t uint32_t *expected_counts)\n+{\n+\tuint32_t wrr_counts[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS] = { 0 };\n+\tuint32_t pipe;\n+\tint32_t i;\n+\tint err;\n+\n+\t/*\n+\t * Create the packets to be enqueued, spread them evenly across\n+\t * each of the four WRR queues of the test-TC\n+\t */\n+\tfor (i = 0; i < enqueue_packets; i++) {\n+\t\tin_mbufs[i] = rte_pktmbuf_alloc(mp);\n+\t\tTEST_ASSERT_NOT_NULL(in_mbufs[i],\n+\t\t\t\t \"%s: Packet allocation failed on packet \"\n+\t\t\t\t \"%d\\n\", subtest_name, i);\n+\t\tprepare_pkt(in_mbufs[i], TC, (i & 0x3));\n+\t}\n+\n+\t/*\n+\t * Queue all the enqueue packets, none should be dropped as the\n+\t * four queues should be long enough.\n+\t */\n+\terr = rte_sched_port_enqueue(port, in_mbufs, enqueue_packets);\n+\tTEST_ASSERT_EQUAL(err, enqueue_packets,\n+\t\t\t \"%s: Enqueue failed, err: %d != %d\\n\",\n+\t\t\t subtest_name, err, enqueue_packets);\n+\n+\t/*\n+\t * Dequeue the required number of packets.\n+\t */\n+\terr = rte_sched_port_dequeue(port, out_mbufs, dequeue_packets);\n+\tTEST_ASSERT_EQUAL(err, dequeue_packets,\n+\t\t\t \"%s: Dequeue failed, err: %d != %d\\n\",\n+\t\t\t subtest_name, err, dequeue_packets);\n+\n+\t/*\n+\t * Check each packet and count which WRR queue it came from.\n+\t */\n+\tfor (i = 0; i < dequeue_packets; i++) {\n+\t\tenum rte_meter_color color;\n+\t\tuint32_t subport, traffic_class, queue;\n+\n+\t\tcolor = rte_sched_port_pkt_read_color(out_mbufs[i]);\n+\t\tTEST_ASSERT_EQUAL(color, e_RTE_METER_YELLOW,\n+\t\t\t\t \"%s: Wrong color\\n\", subtest_name);\n+\n+\t\trte_sched_port_pkt_read_tree_path(out_mbufs[i],\n+\t\t\t\t&subport, &pipe, &traffic_class, &queue);\n+\n+\t\tTEST_ASSERT_EQUAL(subport, SUBPORT, \"%s: Wrong subport\\n\",\n+\t\t\t\t subtest_name);\n+\t\tTEST_ASSERT_EQUAL(pipe, PIPE, \"%s: Wrong pipe\\n\", subtest_name);\n+\t\tTEST_ASSERT_EQUAL(traffic_class, TC,\n+\t\t\t\t \"%s: Wrong traffic-class\\n\", subtest_name);\n+\t\twrr_counts[queue]++;\n+\t\trte_pktmbuf_free(out_mbufs[i]);\n+\t}\n+\n+\t/*\n+\t * Check the number of packets dequeued from each WRR queue\n+\t * against the expected counts.\n+\t */\n+\terr = 0;\n+\tfor (i = 0; i < RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS; i++) {\n+\t\tprintf(\"%s - WRR queue %d, dequeued: %u, expected: %u\\n\",\n+\t\t subtest_name, i, wrr_counts[i], expected_counts[i]);\n+\t\tif (wrr_counts[i] != expected_counts[i])\n+\t\t\terr = -1;\n+\t}\n+\treturn err;\n+}\n+\n+/*\n+ * This function does the test config set-up and tear-down.\n+ * If we see failures in here it is probably due to the test configuration.\n+ */\n+static int\n+test_sched_wrr_test(const char *subtest_name, uint16_t *tc_qlengths,\n+\t\t uint8_t *wrr_weights, int32_t enqueue_packets,\n+\t\t int32_t dequeue_packets, uint32_t *expected_counts)\n+{\n+\tstruct rte_mbuf **in_mbufs;\n+\tstruct rte_mbuf **out_mbufs;\n+\tstruct rte_mempool *mp = NULL;\n+\tstruct rte_sched_port *port = NULL;\n+\tint32_t total_expected = 0;\n+\tuint32_t pipe;\n+\tint32_t i;\n+\tint err;\n+\n+\t/*\n+\t * Some inbound argument checking\n+\t */\n+\tTEST_ASSERT_EQUAL((tc_qlengths[TC] * 4), enqueue_packets,\n+\t\t\t \"%s: Queue length/Enqueue packet mismatch\\n\",\n+\t\t\t subtest_name);\n+\tTEST_ASSERT((dequeue_packets <= enqueue_packets),\n+\t\t \"%s: Dequeue packets %d > Enqueue packets %d\\n\",\n+\t\t subtest_name, dequeue_packets, enqueue_packets);\n+\n+\tfor (i = 0; i < RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS; i++)\n+\t\ttotal_expected += expected_counts[i];\n+\n+\tTEST_ASSERT((dequeue_packets == total_expected),\n+\t\t \"%s: Dequeue packets %d != Total expected %u\\n\",\n+\t\t subtest_name, dequeue_packets, total_expected);\n+\n+\t/*\n+\t * Create the mempool and allocate arrays to hold the rte_mbuf pointers\n+\t */\n+\tmp = create_mempool(enqueue_packets);\n+\tTEST_ASSERT_NOT_NULL(mp, \"%s: Error creating mempool\\n\", subtest_name);\n+\n+\tin_mbufs = malloc(sizeof(struct rte_mbuf *) * enqueue_packets);\n+\tTEST_ASSERT_NOT_NULL(in_mbufs, \"%s: Error creating in_mbuf array\\n\",\n+\t\t\t subtest_name);\n+\n+\tout_mbufs = malloc(sizeof(struct rte_mbuf *) * dequeue_packets);\n+\tTEST_ASSERT_NOT_NULL(out_mbufs, \"%s: Error creating out_mbuf array\\n\",\n+\t\t\t subtest_name);\n+\n+\t/*\n+\t * Set up the port and pipe profiles with the TC's queue lengths\n+\t * and the WRR queue weightings\n+\t */\n+\tport_param.socket = 0;\n+\tport_param.rate = (uint64_t) 10000 * 1000 * 1000 / 8;\n+\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)\n+\t\tport_param.qsize[i] = tc_qlengths[i];\n+\n+\tfor (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++)\n+\t\tpipe_profile[0].wrr_weights[i] = wrr_weights[i];\n+\n+\tport = rte_sched_port_config(&port_param);\n+\tTEST_ASSERT_NOT_NULL(port, \"%s: Error config sched port\\n\",\n+\t\t\t subtest_name);\n+\n+\terr = rte_sched_subport_config(port, SUBPORT, subport_param);\n+\tTEST_ASSERT_SUCCESS(err, \"%s: Error config sched, err=%d\\n\",\n+\t\t\t subtest_name, err);\n+\n+\tfor (pipe = 0; pipe < port_param.n_pipes_per_subport; pipe++) {\n+\t\terr = rte_sched_pipe_config(port, SUBPORT, pipe, 0);\n+\t\tTEST_ASSERT_SUCCESS(err,\n+\t\t\t\t \"%s: Error config sched pipe %u, err=%d\\n\",\n+\t\t\t\t subtest_name, pipe, err);\n+\t}\n+\n+\t/*\n+\t * Enqueue and dequeue packets checking that each WRR queue dequeued\n+\t * the correct number of packets.\n+\t */\n+\terr = test_sched_wrr_enqueue_dequeue(subtest_name, mp, port, in_mbufs,\n+\t\t\t\t\t out_mbufs, enqueue_packets,\n+\t\t\t\t\t dequeue_packets,\n+\t\t\t\t\t expected_counts);\n+\n+\t/*\n+\t * Free up allocated resources\n+\t */\n+\tfree(in_mbufs);\n+\tfree(out_mbufs);\n+\trte_sched_port_free(port);\n+\tdelete_mempool(mp);\n+\n+\treturn err;\n+}\n+\n+static int\n+test_sched_wrr_even_weights(void)\n+{\n+\tuint16_t tc_qlengths[] = { 64, 64, 64, 64 };\n+\tuint8_t wrr_weights[] = { 1, 1, 1, 1, // TC-0\n+\t\t\t\t 1, 1, 1, 1, // TC-1\n+\t\t\t\t 1, 1, 1, 1, // TC-2\n+\t\t\t\t 1, 1, 1, 1 }; // TC-3\n+\tint32_t enqueue_packets = 64 * 4;\n+\tint32_t dequeue_packets = 32;\n+\tuint32_t expected_counts[] = { 8, 8, 8, 8 };\n+\n+\treturn test_sched_wrr_test(\"wrr-even-weights\", tc_qlengths, wrr_weights,\n+\t\t\t\t enqueue_packets, dequeue_packets,\n+\t\t\t\t expected_counts);\n+}\n+\n+static int\n+test_sched_wrr_8_4_2_1_weights(void)\n+{\n+\tuint16_t tc_qlengths[] = { 64, 64, 64, 64 };\n+\tuint8_t wrr_weights[] = { 8, 4, 2, 1, // TC-0\n+\t\t\t\t 1, 1, 1, 1,\n+\t\t\t\t 1, 1, 1, 1,\n+\t\t\t\t 1, 1, 1, 1 };\n+\tint32_t enqueue_packets = 64 * 4;\n+\tint32_t dequeue_packets = 15;\n+\tuint32_t expected_counts[] = { 8, 4, 2, 1 };\n+\n+\treturn test_sched_wrr_test(\"wrr-8-4-2-1-weights\", tc_qlengths,\n+\t\t\t\t wrr_weights, enqueue_packets,\n+\t\t\t\t dequeue_packets, expected_counts);\n+}\n+\n+static int\n+test_sched_wrr_1_2_3_4_weights(void)\n+{\n+\tuint16_t tc_qlengths[] = { 64, 64, 64, 64 };\n+\tuint8_t wrr_weights[] = { 1, 2, 3, 4,\n+\t\t\t\t 1, 1, 1, 1,\n+\t\t\t\t 1, 1, 1, 1,\n+\t\t\t\t 1, 1, 1, 1 };\n+\tint32_t enqueue_packets = 64 * 4;\n+\tint32_t dequeue_packets = 40;\n+\tuint32_t expected_counts[] = { 4, 8, 12, 16 };\n+\n+\treturn test_sched_wrr_test(\"wrr-1-2-3-4-weights\", tc_qlengths,\n+\t\t\t\t wrr_weights, enqueue_packets,\n+\t\t\t\t dequeue_packets, expected_counts);\n+}\n+\n+static int\n+test_sched_wrr_11_7_5_3_weights(void)\n+{\n+\tuint16_t tc_qlengths[] = { 64, 64, 64, 64 };\n+\tuint8_t wrr_weights[] = { 11, 7, 5, 3,\n+\t\t\t\t 1, 1, 1, 1,\n+\t\t\t\t 1, 1, 1, 1,\n+\t\t\t\t 1, 1, 1, 1 };\n+\tint32_t enqueue_packets = 64 * 4;\n+\tint32_t dequeue_packets = 26;\n+\tuint32_t expected_counts[] = { 11, 7, 5, 3 };\n+\n+\treturn test_sched_wrr_test(\"wrr-11-7-5-3-weights\", tc_qlengths,\n+\t\t\t\t wrr_weights, enqueue_packets,\n+\t\t\t\t dequeue_packets, expected_counts);\n+}\n+\n+static int\n+test_sched_wrr_100_to_97_weights(void)\n+{\n+\tuint16_t tc_qlengths[] = { 128, 1, 1, 1 };\n+\tuint8_t wrr_weights[] = { 100, 99, 98, 97,\n+\t\t\t\t 1, 1, 1, 1,\n+\t\t\t\t 1, 1, 1, 1,\n+\t\t\t\t 1, 1, 1, 1 };\n+\tint32_t enqueue_packets = 128 * 4;\n+\tint32_t dequeue_packets = 394;\n+\tuint32_t expected_counts[] = { 100, 99, 98, 97 };\n+\n+\treturn test_sched_wrr_test(\"wrr-100-to-97-weights\", tc_qlengths,\n+\t\t\t\t wrr_weights, enqueue_packets,\n+\t\t\t\t dequeue_packets, expected_counts);\n+}\n+\n+/**\n+ * WRR test main entrance for library sched\n+ */\n+static int\n+test_sched_wrr(void)\n+{\n+\tTEST_ASSERT_SUCCESS(test_sched_wrr_even_weights(),\n+\t\t\t \"even-weight test failed\\n\");\n+\tTEST_ASSERT_SUCCESS(test_sched_wrr_8_4_2_1_weights(),\n+\t\t\t \"8-4-2-1-weight test failed\\n\");\n+\tTEST_ASSERT_SUCCESS(test_sched_wrr_1_2_3_4_weights(),\n+\t\t\t \"1-2-3-4-weight test failed\\n\");\n+\tTEST_ASSERT_SUCCESS(test_sched_wrr_11_7_5_3_weights(),\n+\t\t\t \"11-7-5-3-weight test failed\\n\");\n+\tTEST_ASSERT_SUCCESS(test_sched_wrr_100_to_97_weights(),\n+\t\t\t \"100-to-97-weight test failed\\n\");\n+\treturn 0;\n+}\n+\n+REGISTER_TEST_COMMAND(sched_wrr_test, test_sched_wrr);\n", "prefixes": [ "dpdk-dev" ] }