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GET /api/patches/30317/?format=api
{ "id": 30317, "url": "http://patches.dpdk.org/api/patches/30317/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20171013000247.4158-2-thomas@monjalon.net/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20171013000247.4158-2-thomas@monjalon.net>", "list_archive_url": "https://inbox.dpdk.org/dev/20171013000247.4158-2-thomas@monjalon.net", "date": "2017-10-13T00:02:44", "name": "[dpdk-dev,1/4] timer: honor arch-specific TSC frequency query", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "4caa7a2f96bccf472c7bcb7f34d02c372fe1bb7c", "submitter": { "id": 685, "url": "http://patches.dpdk.org/api/people/685/?format=api", "name": "Thomas Monjalon", "email": "thomas@monjalon.net" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20171013000247.4158-2-thomas@monjalon.net/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/30317/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/30317/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9D30A1B3BD;\n\tFri, 13 Oct 2017 02:02:57 +0200 (CEST)", "from out2-smtp.messagingengine.com (out2-smtp.messagingengine.com\n\t[66.111.4.26]) by dpdk.org (Postfix) with ESMTP id 4EF061B395\n\tfor <dev@dpdk.org>; Fri, 13 Oct 2017 02:02:54 +0200 (CEST)", "from compute1.internal (compute1.nyi.internal [10.202.2.41])\n\tby mailout.nyi.internal (Postfix) with ESMTP id D757D2168C;\n\tThu, 12 Oct 2017 20:02:53 -0400 (EDT)", "from frontend2 ([10.202.2.161])\n\tby compute1.internal (MEProxy); Thu, 12 Oct 2017 20:02:53 -0400", "from xps.monjalon.net (184.203.134.77.rev.sfr.net [77.134.203.184])\n\tby mail.messagingengine.com (Postfix) with ESMTPA id CFABC24A6C;\n\tThu, 12 Oct 2017 20:02:52 -0400 (EDT)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h=\n\tcc:date:from:in-reply-to:message-id:references:subject:to\n\t:x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=HRtyhv6f8w7EbC\n\tgVuT2S5eA1WmToURNGMDtQMHkDIPs=; b=Sa669rAlMMDI8PMr9jkbmaMeYV5vW6\n\tUUFc0SDg5VK62o5yoDE4ZDAM1HPE1k9ragoOtRbAARAqUSZJN6DabOKsBlqfyfcS\n\tgWfD2J73q4eBbkiNErmfxjPGRsvty1fjmsVqNuGdFsK0P3cKYXiHT8GjzGCIDwCW\n\tWNYvGVibCsL2A=", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n\tmessagingengine.com; h=cc:date:from:in-reply-to:message-id\n\t:references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s=\n\tfm1; bh=HRtyhv6f8w7EbCgVuT2S5eA1WmToURNGMDtQMHkDIPs=; b=gPc9nXSl\n\txTAJEZWaUGkqxXgG3cVzauahOFlm0H47ACAB1jfW80a+4pvr7qvGGYXsCp1XldSx\n\txl8fyzwtnc9HrREIA+jJLE4grDRQ/WPEHBpVOcxlsMRZQ3TcHYrBl2ZJxryF97HY\n\tv1Nh3+ZoRWIefHuTuXBTfGRmcp0j73ywoqqssKBJAxWCDH5q5AcqLnPQ5qnjJ+UF\n\tEFWzKqaOtizJUsAIoKj9ehkGeQWEhk1PyE6HcuIzmawINQafEmGA+QW8iGL4NkqA\n\tltKbImLU6AfpXZUwWQzW4+QuhJEHSU22v3zrDzpaz3iDPdxyqV7fWGlYrmucObIp\n\t1sbEBDWLIiKl5g==" ], "X-ME-Sender": "<xms:rQLgWf0KaeYB_2U_okD8RQX-u2F-dBwRrM9zdC94aP4nG8Rbkc6J1g>", "From": "Thomas Monjalon <thomas@monjalon.net>", "To": "gowrishankar.m@linux.vnet.ibm.com, jerin.jacob@caviumnetworks.com,\n\tjianbo.liu@linaro.org, sergio.gonzalez.monroy@intel.com,\n\tbruce.richardson@intel.com", "Cc": "dev@dpdk.org", "Date": "Fri, 13 Oct 2017 02:02:44 +0200", "Message-Id": "<20171013000247.4158-2-thomas@monjalon.net>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<20171013000247.4158-1-thomas@monjalon.net>", "References": "<cover.1506058385.git.gowrishankar.m@linux.vnet.ibm.com>\n\t<20171013000247.4158-1-thomas@monjalon.net>", "Subject": "[dpdk-dev] [PATCH 1/4] timer: honor arch-specific TSC frequency\n\tquery", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jerin Jacob <jerin.jacob@caviumnetworks.com>\n\nWhen calibrating the TSC frequency, first, probe the architecture specific\nfunction. If not available, use the existing calibrate scheme.\n\nSigned-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>\nSigned-off-by: Thomas Monjalon <thomas@monjalon.net>\n---\n lib/librte_eal/bsdapp/eal/Makefile | 1 +\n lib/librte_eal/common/arch/arm/rte_cycles.c | 7 +++++++\n lib/librte_eal/common/arch/ppc_64/rte_cycles.c | 7 +++++++\n lib/librte_eal/common/arch/x86/rte_cycles.c | 7 +++++++\n lib/librte_eal/common/eal_common_timer.c | 5 ++++-\n lib/librte_eal/common/eal_private.h | 11 +++++++++++\n lib/librte_eal/linuxapp/eal/Makefile | 1 +\n 7 files changed, 38 insertions(+), 1 deletion(-)\n create mode 100644 lib/librte_eal/common/arch/arm/rte_cycles.c\n create mode 100644 lib/librte_eal/common/arch/ppc_64/rte_cycles.c\n create mode 100644 lib/librte_eal/common/arch/x86/rte_cycles.c", "diff": "diff --git a/lib/librte_eal/bsdapp/eal/Makefile b/lib/librte_eal/bsdapp/eal/Makefile\nindex 317a75ebc..b42306bc3 100644\n--- a/lib/librte_eal/bsdapp/eal/Makefile\n+++ b/lib/librte_eal/bsdapp/eal/Makefile\n@@ -92,6 +92,7 @@ SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += rte_service.c\n # from arch dir\n SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += rte_cpuflags.c\n SRCS-$(CONFIG_RTE_ARCH_X86) += rte_spinlock.c\n+SRCS-y += rte_cycles.c\n \n CFLAGS_eal_common_cpuflags.o := $(CPUFLAGS_LIST)\n \ndiff --git a/lib/librte_eal/common/arch/arm/rte_cycles.c b/lib/librte_eal/common/arch/arm/rte_cycles.c\nnew file mode 100644\nindex 000000000..851fd0255\n--- /dev/null\n+++ b/lib/librte_eal/common/arch/arm/rte_cycles.c\n@@ -0,0 +1,7 @@\n+#include \"eal_private.h\"\n+\n+uint64_t\n+get_tsc_freq_arch(void)\n+{\n+\treturn 0;\n+}\ndiff --git a/lib/librte_eal/common/arch/ppc_64/rte_cycles.c b/lib/librte_eal/common/arch/ppc_64/rte_cycles.c\nnew file mode 100644\nindex 000000000..851fd0255\n--- /dev/null\n+++ b/lib/librte_eal/common/arch/ppc_64/rte_cycles.c\n@@ -0,0 +1,7 @@\n+#include \"eal_private.h\"\n+\n+uint64_t\n+get_tsc_freq_arch(void)\n+{\n+\treturn 0;\n+}\ndiff --git a/lib/librte_eal/common/arch/x86/rte_cycles.c b/lib/librte_eal/common/arch/x86/rte_cycles.c\nnew file mode 100644\nindex 000000000..851fd0255\n--- /dev/null\n+++ b/lib/librte_eal/common/arch/x86/rte_cycles.c\n@@ -0,0 +1,7 @@\n+#include \"eal_private.h\"\n+\n+uint64_t\n+get_tsc_freq_arch(void)\n+{\n+\treturn 0;\n+}\ndiff --git a/lib/librte_eal/common/eal_common_timer.c b/lib/librte_eal/common/eal_common_timer.c\nindex ed0b16d05..5980b294e 100644\n--- a/lib/librte_eal/common/eal_common_timer.c\n+++ b/lib/librte_eal/common/eal_common_timer.c\n@@ -80,8 +80,11 @@ estimate_tsc_freq(void)\n void\n set_tsc_freq(void)\n {\n-\tuint64_t freq = get_tsc_freq();\n+\tuint64_t freq;\n \n+\tfreq = get_tsc_freq_arch();\n+\tif (!freq)\n+\t\tfreq = get_tsc_freq();\n \tif (!freq)\n \t\tfreq = estimate_tsc_freq();\n \ndiff --git a/lib/librte_eal/common/eal_private.h b/lib/librte_eal/common/eal_private.h\nindex 597d82e44..6e0f85def 100644\n--- a/lib/librte_eal/common/eal_private.h\n+++ b/lib/librte_eal/common/eal_private.h\n@@ -314,6 +314,17 @@ void set_tsc_freq(void);\n */\n uint64_t get_tsc_freq(void);\n \n+/**\n+ * Get TSC frequency if the architecture supports.\n+ *\n+ * This function is private to the EAL.\n+ *\n+ * @return\n+ * The number of TSC cycles in one second.\n+ * Returns zero if the architecture support is not available.\n+ */\n+uint64_t get_tsc_freq_arch(void);\n+\n /**\n * Prepare physical memory mapping\n * i.e. hugepages on Linux and\ndiff --git a/lib/librte_eal/linuxapp/eal/Makefile b/lib/librte_eal/linuxapp/eal/Makefile\nindex 21e0b4aad..140d1acfa 100644\n--- a/lib/librte_eal/linuxapp/eal/Makefile\n+++ b/lib/librte_eal/linuxapp/eal/Makefile\n@@ -101,6 +101,7 @@ SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += rte_service.c\n # from arch dir\n SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += rte_cpuflags.c\n SRCS-$(CONFIG_RTE_ARCH_X86) += rte_spinlock.c\n+SRCS-y += rte_cycles.c\n \n CFLAGS_eal_common_cpuflags.o := $(CPUFLAGS_LIST)\n \n", "prefixes": [ "dpdk-dev", "1/4" ] }