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{
    "id": 27967,
    "url": "http://patches.dpdk.org/api/patches/27967/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1503658183-4078-13-git-send-email-hemant.agrawal@nxp.com/",
    "project": {
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    "msgid": "<1503658183-4078-13-git-send-email-hemant.agrawal@nxp.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1503658183-4078-13-git-send-email-hemant.agrawal@nxp.com",
    "date": "2017-08-25T10:49:28",
    "name": "[dpdk-dev,12/27] config/dpaa2: change max lores to 16",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "391ef4ef61e92389eb887698ffe579f36fa0d2ca",
    "submitter": {
        "id": 477,
        "url": "http://patches.dpdk.org/api/people/477/?format=api",
        "name": "Hemant Agrawal",
        "email": "hemant.agrawal@nxp.com"
    },
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    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1503658183-4078-13-git-send-email-hemant.agrawal@nxp.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/27967/comments/",
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    "tags": {},
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        "From": "Hemant Agrawal <hemant.agrawal@nxp.com>",
        "To": "<ferruh.yigit@intel.com>",
        "CC": "<dev@dpdk.org>, <shreyansh.jain@nxp.com>",
        "Date": "Fri, 25 Aug 2017 16:19:28 +0530",
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        "Subject": "[dpdk-dev] [PATCH 12/27] config/dpaa2: change max lores to 16",
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    },
    "content": "From: Ashish Jain <ashish.jain@nxp.com>\n\nTo support new LX2 series\n\nSigned-off-by: Ashish Jain <ashish.jain@nxp.com>\n---\n config/defconfig_arm64-dpaa2-linuxapp-gcc | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)",
    "diff": "diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc\nindex 8a42944..91f4993 100644\n--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc\n+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc\n@@ -39,7 +39,7 @@ CONFIG_RTE_ARCH_ARM_TUNE=\"cortex-a72\"\n #\n # Compile Environment Abstraction Layer\n #\n-CONFIG_RTE_MAX_LCORE=8\n+CONFIG_RTE_MAX_LCORE=16\n CONFIG_RTE_MAX_NUMA_NODES=1\n CONFIG_RTE_CACHE_LINE_SIZE=64\n \n",
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