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{
    "id": 22854,
    "url": "http://patches.dpdk.org/api/patches/22854/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1490829963-106807-19-git-send-email-harry.van.haaren@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1490829963-106807-19-git-send-email-harry.van.haaren@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1490829963-106807-19-git-send-email-harry.van.haaren@intel.com",
    "date": "2017-03-29T23:26:00",
    "name": "[dpdk-dev,v6,18/21] test/eventdev: add SW xstats tests",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "b4e5d7a3e6be5da5a5d482274955b6a07f5077c4",
    "submitter": {
        "id": 317,
        "url": "http://patches.dpdk.org/api/people/317/?format=api",
        "name": "Van Haaren, Harry",
        "email": "harry.van.haaren@intel.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1490829963-106807-19-git-send-email-harry.van.haaren@intel.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/22854/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/22854/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 65AF010CEC;\n\tThu, 30 Mar 2017 02:42:28 +0200 (CEST)",
            "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id 79FA69E3\n\tfor <dev@dpdk.org>; Thu, 30 Mar 2017 01:26:40 +0200 (CEST)",
            "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t29 Mar 2017 16:26:39 -0700",
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        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=simple/simple;\n\td=intel.com; i=@intel.com; q=dns/txt; s=intel;\n\tt=1490830000; x=1522366000;\n\th=from:to:cc:subject:date:message-id:in-reply-to: references;\n\tbh=AYkr2nRF6OEFkDuW1BBGzpvFsZZ+PeUBCCf4YgGp6zE=;\n\tb=Ighyk/g+R4I6weMFru1EBEmKOW55lOT34v8bBxvkUiAz0g6V+lIXFvcw\n\tLRPKeoGs3nob9934VHomNztYZ4N64Q==;",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.36,243,1486454400\"; d=\"scan'208\";a=\"82491274\"",
        "From": "Harry van Haaren <harry.van.haaren@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "jerin.jacob@caviumnetworks.com,\n\tHarry van Haaren <harry.van.haaren@intel.com>,\n\tBruce Richardson <bruce.richardson@intel.com>,\n\tDavid Hunt <david.hunt@intel.com>",
        "Date": "Thu, 30 Mar 2017 00:26:00 +0100",
        "Message-Id": "<1490829963-106807-19-git-send-email-harry.van.haaren@intel.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1490829963-106807-1-git-send-email-harry.van.haaren@intel.com>",
        "References": "<1490374395-149320-1-git-send-email-harry.van.haaren@intel.com>\n\t<1490829963-106807-1-git-send-email-harry.van.haaren@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v6 18/21] test/eventdev: add SW xstats tests",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This commit introduces xstats tests for statistics\nand reset functionality.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\nSigned-off-by: David Hunt <david.hunt@intel.com>\nSigned-off-by: Harry van Haaren <harry.van.haaren@intel.com>\n\nAcked-by: Anatoly Burakov <anatoly.burakov@intel.com>\n---\n test/test/test_eventdev_sw.c | 806 +++++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 806 insertions(+)",
    "diff": "diff --git a/test/test/test_eventdev_sw.c b/test/test/test_eventdev_sw.c\nindex 03003e6..89e17b4 100644\n--- a/test/test/test_eventdev_sw.c\n+++ b/test/test/test_eventdev_sw.c\n@@ -742,6 +742,377 @@ abuse_inflights(struct test *t)\n }\n \n static int\n+xstats_tests(struct test *t)\n+{\n+\tconst int wrk_enq = 2;\n+\tint err;\n+\n+\t/* Create instance with 4 ports */\n+\tif (init(t, 1, 4) < 0 ||\n+\t\t\tcreate_ports(t, 4) < 0 ||\n+\t\t\tcreate_atomic_qids(t, 1) < 0) {\n+\t\tprintf(\"%d: Error initializing device\\n\", __LINE__);\n+\t\treturn -1;\n+\t}\n+\n+\t/* CQ mapping to QID */\n+\terr = rte_event_port_link(evdev, t->port[wrk_enq], NULL, NULL, 0);\n+\tif (err != 1) {\n+\t\tprintf(\"%d: error mapping lb qid\\n\", __LINE__);\n+\t\tcleanup(t);\n+\t\treturn -1;\n+\t}\n+\n+\tif (rte_event_dev_start(evdev) < 0) {\n+\t\tprintf(\"%d: Error with start call\\n\", __LINE__);\n+\t\treturn -1;\n+\t}\n+\n+\tconst uint32_t XSTATS_MAX = 1024;\n+\n+\tuint32_t i;\n+\tuint32_t ids[XSTATS_MAX];\n+\tuint64_t values[XSTATS_MAX];\n+\tstruct rte_event_dev_xstats_name xstats_names[XSTATS_MAX];\n+\n+\tfor (i = 0; i < XSTATS_MAX; i++)\n+\t\tids[i] = i;\n+\n+\t/* Device names / values */\n+\tint ret = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_DEVICE,\n+\t\t\t\t\t0, xstats_names, ids, XSTATS_MAX);\n+\tif (ret != 6) {\n+\t\tprintf(\"%d: expected 6 stats, got return %d\\n\", __LINE__, ret);\n+\t\treturn -1;\n+\t}\n+\tret = rte_event_dev_xstats_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_DEVICE,\n+\t\t\t\t\t0, ids, values, ret);\n+\tif (ret != 6) {\n+\t\tprintf(\"%d: expected 6 stats, got return %d\\n\", __LINE__, ret);\n+\t\treturn -1;\n+\t}\n+\n+\t/* Port names / values */\n+\tret = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_PORT, 0,\n+\t\t\t\t\txstats_names, ids, XSTATS_MAX);\n+\tif (ret != 21) {\n+\t\tprintf(\"%d: expected 21 stats, got return %d\\n\", __LINE__, ret);\n+\t\treturn -1;\n+\t}\n+\tret = rte_event_dev_xstats_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_PORT, 0,\n+\t\t\t\t\tids, values, ret);\n+\tif (ret != 21) {\n+\t\tprintf(\"%d: expected 21 stats, got return %d\\n\", __LINE__, ret);\n+\t\treturn -1;\n+\t}\n+\n+\t/* Queue names / values */\n+\tret = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_QUEUE,\n+\t\t\t\t\t0, xstats_names, ids, XSTATS_MAX);\n+\tif (ret != 13) {\n+\t\tprintf(\"%d: expected 13 stats, got return %d\\n\", __LINE__, ret);\n+\t\treturn -1;\n+\t}\n+\n+\t/* NEGATIVE TEST: with wrong queue passed, 0 stats should be returned */\n+\tret = rte_event_dev_xstats_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_QUEUE,\n+\t\t\t\t\t1, ids, values, ret);\n+\tif (ret != -EINVAL) {\n+\t\tprintf(\"%d: expected 0 stats, got return %d\\n\", __LINE__, ret);\n+\t\treturn -1;\n+\t}\n+\n+\tret = rte_event_dev_xstats_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_QUEUE,\n+\t\t\t\t\t0, ids, values, ret);\n+\tif (ret != 13) {\n+\t\tprintf(\"%d: expected 13 stats, got return %d\\n\", __LINE__, ret);\n+\t\treturn -1;\n+\t}\n+\n+\t/* enqueue packets to check values */\n+\tfor (i = 0; i < 3; i++) {\n+\t\tstruct rte_event ev;\n+\t\tstruct rte_mbuf *arp = rte_gen_arp(0, t->mbuf_pool);\n+\t\tif (!arp) {\n+\t\t\tprintf(\"%d: gen of pkt failed\\n\", __LINE__);\n+\t\t\treturn -1;\n+\t\t}\n+\t\tev.queue_id = t->qid[i];\n+\t\tev.op = RTE_EVENT_OP_NEW;\n+\t\tev.mbuf = arp;\n+\t\tev.flow_id = 7;\n+\t\tarp->seqn = i;\n+\n+\t\tint err = rte_event_enqueue_burst(evdev, t->port[0], &ev, 1);\n+\t\tif (err != 1) {\n+\t\t\tprintf(\"%d: Failed to enqueue\\n\", __LINE__);\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\n+\trte_event_schedule(evdev);\n+\n+\t/* Device names / values */\n+\tint num_stats = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_DEVICE, 0,\n+\t\t\t\t\txstats_names, ids, XSTATS_MAX);\n+\tif (num_stats < 0)\n+\t\tgoto fail;\n+\tret = rte_event_dev_xstats_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_DEVICE,\n+\t\t\t\t\t0, ids, values, num_stats);\n+\tstatic const uint64_t expected[] = {3, 3, 0, 1, 0, 0};\n+\tfor (i = 0; (signed int)i < ret; i++) {\n+\t\tif (expected[i] != values[i]) {\n+\t\t\tprintf(\n+\t\t\t\t\"%d Error xstat %d (id %d) %s : %\"PRIu64\n+\t\t\t\t\", expect %\"PRIu64\"\\n\",\n+\t\t\t\t__LINE__, i, ids[i], xstats_names[i].name,\n+\t\t\t\tvalues[i], expected[i]);\n+\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\n+\tret = rte_event_dev_xstats_reset(evdev, RTE_EVENT_DEV_XSTATS_DEVICE,\n+\t\t\t\t\t0, NULL, 0);\n+\n+\t/* ensure reset statistics are zero-ed */\n+\tstatic const uint64_t expected_zero[] = {0, 0, 0, 0, 0, 0};\n+\tret = rte_event_dev_xstats_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_DEVICE,\n+\t\t\t\t\t0, ids, values, num_stats);\n+\tfor (i = 0; (signed int)i < ret; i++) {\n+\t\tif (expected_zero[i] != values[i]) {\n+\t\t\tprintf(\n+\t\t\t\t\"%d Error, xstat %d (id %d) %s : %\"PRIu64\n+\t\t\t\t\", expect %\"PRIu64\"\\n\",\n+\t\t\t\t__LINE__, i, ids[i], xstats_names[i].name,\n+\t\t\t\tvalues[i], expected_zero[i]);\n+\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\n+\t/* port reset checks */\n+\tnum_stats = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_PORT, 0,\n+\t\t\t\t\txstats_names, ids, XSTATS_MAX);\n+\tif (num_stats < 0)\n+\t\tgoto fail;\n+\tret = rte_event_dev_xstats_get(evdev, RTE_EVENT_DEV_XSTATS_PORT,\n+\t\t\t\t\t0, ids, values, num_stats);\n+\n+\tstatic const uint64_t port_expected[] = {\n+\t\t3 /* rx */,\n+\t\t0 /* tx */,\n+\t\t0 /* drop */,\n+\t\t0 /* inflights */,\n+\t\t0 /* avg pkt cycles */,\n+\t\t29 /* credits */,\n+\t\t0 /* rx ring used */,\n+\t\t4096 /* rx ring free */,\n+\t\t0 /* cq ring used */,\n+\t\t32 /* cq ring free */,\n+\t\t0 /* dequeue calls */,\n+\t\t/* 10 dequeue burst buckets */\n+\t\t0, 0, 0, 0, 0,\n+\t\t0, 0, 0, 0, 0,\n+\t};\n+\tif (ret != RTE_DIM(port_expected)) {\n+\t\tprintf(\n+\t\t\t\"%s %d: wrong number of port stats (%d), expected %zu\\n\",\n+\t\t\t__func__, __LINE__, ret, RTE_DIM(port_expected));\n+\t}\n+\n+\tfor (i = 0; (signed int)i < ret; i++) {\n+\t\tif (port_expected[i] != values[i]) {\n+\t\t\tprintf(\n+\t\t\t\t\"%s : %d: Error stat %s is %\"PRIu64\n+\t\t\t\t\", expected %\"PRIu64\"\\n\",\n+\t\t\t\t__func__, __LINE__, xstats_names[i].name,\n+\t\t\t\tvalues[i], port_expected[i]);\n+\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\n+\tret = rte_event_dev_xstats_reset(evdev, RTE_EVENT_DEV_XSTATS_PORT,\n+\t\t\t\t\t0, NULL, 0);\n+\n+\t/* ensure reset statistics are zero-ed */\n+\tstatic const uint64_t port_expected_zero[] = {\n+\t\t0 /* rx */,\n+\t\t0 /* tx */,\n+\t\t0 /* drop */,\n+\t\t0 /* inflights */,\n+\t\t0 /* avg pkt cycles */,\n+\t\t29 /* credits */,\n+\t\t0 /* rx ring used */,\n+\t\t4096 /* rx ring free */,\n+\t\t0 /* cq ring used */,\n+\t\t32 /* cq ring free */,\n+\t\t0 /* dequeue calls */,\n+\t\t/* 10 dequeue burst buckets */\n+\t\t0, 0, 0, 0, 0,\n+\t\t0, 0, 0, 0, 0,\n+\t};\n+\tret = rte_event_dev_xstats_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_PORT,\n+\t\t\t\t\t0, ids, values, num_stats);\n+\tfor (i = 0; (signed int)i < ret; i++) {\n+\t\tif (port_expected_zero[i] != values[i]) {\n+\t\t\tprintf(\n+\t\t\t\t\"%d, Error, xstat %d (id %d) %s : %\"PRIu64\n+\t\t\t\t\", expect %\"PRIu64\"\\n\",\n+\t\t\t\t__LINE__, i, ids[i], xstats_names[i].name,\n+\t\t\t\tvalues[i], port_expected_zero[i]);\n+\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\n+\t/* QUEUE STATS TESTS */\n+\tnum_stats = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\t\tRTE_EVENT_DEV_XSTATS_QUEUE, 0,\n+\t\t\t\t\t\txstats_names, ids, XSTATS_MAX);\n+\tret = rte_event_dev_xstats_get(evdev, RTE_EVENT_DEV_XSTATS_QUEUE,\n+\t\t\t\t\t0, ids, values, num_stats);\n+\tif (ret < 0) {\n+\t\tprintf(\"xstats get returned %d\\n\", ret);\n+\t\tgoto fail;\n+\t}\n+\tif ((unsigned int)ret > XSTATS_MAX)\n+\t\tprintf(\"%s %d: more xstats available than space\\n\",\n+\t\t\t\t__func__, __LINE__);\n+\n+\tstatic const uint64_t queue_expected[] = {\n+\t\t3 /* rx */,\n+\t\t3 /* tx */,\n+\t\t0 /* drop */,\n+\t\t3 /* inflights */,\n+\t\t512 /* iq size */,\n+\t\t0, 0, 0, 0, /* iq 0, 1, 2, 3 used */\n+\t\t0, 0, 1, 0, /* qid_0_port_X_pinned_flows */\n+\t};\n+\tfor (i = 0; (signed int)i < ret; i++) {\n+\t\tif (queue_expected[i] != values[i]) {\n+\t\t\tprintf(\n+\t\t\t\t\"%d, Error, xstat %d (id %d) %s : %\"PRIu64\n+\t\t\t\t\", expect %\"PRIu64\"\\n\",\n+\t\t\t\t__LINE__, i, ids[i], xstats_names[i].name,\n+\t\t\t\tvalues[i], queue_expected[i]);\n+\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\n+\t/* Reset the queue stats here */\n+\tret = rte_event_dev_xstats_reset(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_QUEUE, 0,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\t0);\n+\n+\t/* Verify that the resetable stats are reset, and others are not */\n+\tstatic const uint64_t queue_expected_zero[] = {\n+\t\t0 /* rx */,\n+\t\t0 /* tx */,\n+\t\t0 /* drop */,\n+\t\t3 /* inflight */,\n+\t\t512 /* iq size */,\n+\t\t0, 0, 0, 0, /* 4 iq used */\n+\t\t0, 0, 1, 0, /* qid to port pinned flows */\n+\t};\n+\n+\tret = rte_event_dev_xstats_get(evdev, RTE_EVENT_DEV_XSTATS_QUEUE, 0,\n+\t\t\t\t\tids, values, num_stats);\n+\tint fails = 0;\n+\tfor (i = 0; (signed int)i < ret; i++) {\n+\t\tif (queue_expected_zero[i] != values[i]) {\n+\t\t\tprintf(\n+\t\t\t\t\"%d, Error, xstat %d (id %d) %s : %\"PRIu64\n+\t\t\t\t\", expect %\"PRIu64\"\\n\",\n+\t\t\t\t__LINE__, i, ids[i], xstats_names[i].name,\n+\t\t\t\tvalues[i], queue_expected_zero[i]);\n+\t\t\tfails++;\n+\t\t}\n+\t}\n+\tif (fails) {\n+\t\tprintf(\"%d : %d of values were not as expected above\\n\",\n+\t\t\t\t__LINE__, fails);\n+\t\tgoto fail;\n+\t}\n+\n+\tcleanup(t);\n+\treturn 0;\n+\n+fail:\n+\trte_event_dev_dump(0, stdout);\n+\tcleanup(t);\n+\treturn -1;\n+}\n+\n+\n+static int\n+xstats_id_abuse_tests(struct test *t)\n+{\n+\tint err;\n+\tconst uint32_t XSTATS_MAX = 1024;\n+\tconst uint32_t link_port = 2;\n+\n+\tuint32_t ids[XSTATS_MAX];\n+\tstruct rte_event_dev_xstats_name xstats_names[XSTATS_MAX];\n+\n+\t/* Create instance with 4 ports */\n+\tif (init(t, 1, 4) < 0 ||\n+\t\t\tcreate_ports(t, 4) < 0 ||\n+\t\t\tcreate_atomic_qids(t, 1) < 0) {\n+\t\tprintf(\"%d: Error initializing device\\n\", __LINE__);\n+\t\tgoto fail;\n+\t}\n+\n+\terr = rte_event_port_link(evdev, t->port[link_port], NULL, NULL, 0);\n+\tif (err != 1) {\n+\t\tprintf(\"%d: error mapping lb qid\\n\", __LINE__);\n+\t\tgoto fail;\n+\t}\n+\n+\tif (rte_event_dev_start(evdev) < 0) {\n+\t\tprintf(\"%d: Error with start call\\n\", __LINE__);\n+\t\tgoto fail;\n+\t}\n+\n+\t/* no test for device, as it ignores the port/q number */\n+\tint num_stats = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_PORT,\n+\t\t\t\t\tUINT8_MAX-1, xstats_names, ids,\n+\t\t\t\t\tXSTATS_MAX);\n+\tif (num_stats != 0) {\n+\t\tprintf(\"%d: expected %d stats, got return %d\\n\", __LINE__,\n+\t\t\t\t0, num_stats);\n+\t\tgoto fail;\n+\t}\n+\n+\tnum_stats = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_QUEUE,\n+\t\t\t\t\tUINT8_MAX-1, xstats_names, ids,\n+\t\t\t\t\tXSTATS_MAX);\n+\tif (num_stats != 0) {\n+\t\tprintf(\"%d: expected %d stats, got return %d\\n\", __LINE__,\n+\t\t\t\t0, num_stats);\n+\t\tgoto fail;\n+\t}\n+\n+\tcleanup(t);\n+\treturn 0;\n+fail:\n+\tcleanup(t);\n+\treturn -1;\n+}\n+\n+static int\n port_reconfig_credits(struct test *t)\n {\n \tif (init(t, 1, 1) < 0) {\n@@ -908,6 +1279,417 @@ port_single_lb_reconfig(struct test *t)\n }\n \n static int\n+xstats_brute_force(struct test *t)\n+{\n+\tuint32_t i;\n+\tconst uint32_t XSTATS_MAX = 1024;\n+\tuint32_t ids[XSTATS_MAX];\n+\tuint64_t values[XSTATS_MAX];\n+\tstruct rte_event_dev_xstats_name xstats_names[XSTATS_MAX];\n+\n+\n+\t/* Create instance with 4 ports */\n+\tif (init(t, 1, 4) < 0 ||\n+\t\t\tcreate_ports(t, 4) < 0 ||\n+\t\t\tcreate_atomic_qids(t, 1) < 0) {\n+\t\tprintf(\"%d: Error initializing device\\n\", __LINE__);\n+\t\treturn -1;\n+\t}\n+\n+\tint err = rte_event_port_link(evdev, t->port[0], NULL, NULL, 0);\n+\tif (err != 1) {\n+\t\tprintf(\"%d: error mapping lb qid\\n\", __LINE__);\n+\t\tgoto fail;\n+\t}\n+\n+\tif (rte_event_dev_start(evdev) < 0) {\n+\t\tprintf(\"%d: Error with start call\\n\", __LINE__);\n+\t\tgoto fail;\n+\t}\n+\n+\tfor (i = 0; i < XSTATS_MAX; i++)\n+\t\tids[i] = i;\n+\n+\tfor (i = 0; i < 3; i++) {\n+\t\tuint32_t mode = RTE_EVENT_DEV_XSTATS_DEVICE + i;\n+\t\tuint32_t j;\n+\t\tfor (j = 0; j < UINT8_MAX; j++) {\n+\t\t\trte_event_dev_xstats_names_get(evdev, mode,\n+\t\t\t\tj, xstats_names, ids, XSTATS_MAX);\n+\n+\t\t\trte_event_dev_xstats_get(evdev, mode, j, ids,\n+\t\t\t\t\t\t values, XSTATS_MAX);\n+\t\t}\n+\t}\n+\n+\tcleanup(t);\n+\treturn 0;\n+fail:\n+\tcleanup(t);\n+\treturn -1;\n+}\n+\n+static int\n+xstats_id_reset_tests(struct test *t)\n+{\n+\tconst int wrk_enq = 2;\n+\tint err;\n+\n+\t/* Create instance with 4 ports */\n+\tif (init(t, 1, 4) < 0 ||\n+\t\t\tcreate_ports(t, 4) < 0 ||\n+\t\t\tcreate_atomic_qids(t, 1) < 0) {\n+\t\tprintf(\"%d: Error initializing device\\n\", __LINE__);\n+\t\treturn -1;\n+\t}\n+\n+\t/* CQ mapping to QID */\n+\terr = rte_event_port_link(evdev, t->port[wrk_enq], NULL, NULL, 0);\n+\tif (err != 1) {\n+\t\tprintf(\"%d: error mapping lb qid\\n\", __LINE__);\n+\t\tgoto fail;\n+\t}\n+\n+\tif (rte_event_dev_start(evdev) < 0) {\n+\t\tprintf(\"%d: Error with start call\\n\", __LINE__);\n+\t\tgoto fail;\n+\t}\n+\n+#define XSTATS_MAX 1024\n+\tint ret;\n+\tuint32_t i;\n+\tuint32_t ids[XSTATS_MAX];\n+\tuint64_t values[XSTATS_MAX];\n+\tstruct rte_event_dev_xstats_name xstats_names[XSTATS_MAX];\n+\n+\tfor (i = 0; i < XSTATS_MAX; i++)\n+\t\tids[i] = i;\n+\n+#define NUM_DEV_STATS 6\n+\t/* Device names / values */\n+\tint num_stats = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_DEVICE,\n+\t\t\t\t\t0, xstats_names, ids, XSTATS_MAX);\n+\tif (num_stats != NUM_DEV_STATS) {\n+\t\tprintf(\"%d: expected %d stats, got return %d\\n\", __LINE__,\n+\t\t\t\tNUM_DEV_STATS, num_stats);\n+\t\tgoto fail;\n+\t}\n+\tret = rte_event_dev_xstats_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_DEVICE,\n+\t\t\t\t\t0, ids, values, num_stats);\n+\tif (ret != NUM_DEV_STATS) {\n+\t\tprintf(\"%d: expected %d stats, got return %d\\n\", __LINE__,\n+\t\t\t\tNUM_DEV_STATS, ret);\n+\t\tgoto fail;\n+\t}\n+\n+#define NPKTS 7\n+\tfor (i = 0; i < NPKTS; i++) {\n+\t\tstruct rte_event ev;\n+\t\tstruct rte_mbuf *arp = rte_gen_arp(0, t->mbuf_pool);\n+\t\tif (!arp) {\n+\t\t\tprintf(\"%d: gen of pkt failed\\n\", __LINE__);\n+\t\t\tgoto fail;\n+\t\t}\n+\t\tev.queue_id = t->qid[i];\n+\t\tev.op = RTE_EVENT_OP_NEW;\n+\t\tev.mbuf = arp;\n+\t\tarp->seqn = i;\n+\n+\t\tint err = rte_event_enqueue_burst(evdev, t->port[0], &ev, 1);\n+\t\tif (err != 1) {\n+\t\t\tprintf(\"%d: Failed to enqueue\\n\", __LINE__);\n+\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\n+\trte_event_schedule(evdev);\n+\n+\tstatic const char * const dev_names[] = {\n+\t\t\"dev_rx\", \"dev_tx\", \"dev_drop\", \"dev_sched_calls\",\n+\t\t\"dev_sched_no_iq_enq\", \"dev_sched_no_cq_enq\",\n+\t};\n+\tuint64_t dev_expected[] = {NPKTS, NPKTS, 0, 1, 0, 0};\n+\tfor (i = 0; (int)i < ret; i++) {\n+\t\tunsigned int id;\n+\t\tuint64_t val = rte_event_dev_xstats_by_name_get(evdev,\n+\t\t\t\t\t\t\t\tdev_names[i],\n+\t\t\t\t\t\t\t\t&id);\n+\t\tif (id != i) {\n+\t\t\tprintf(\"%d: %s id incorrect, expected %d got %d\\n\",\n+\t\t\t\t\t__LINE__, dev_names[i], i, id);\n+\t\t\tgoto fail;\n+\t\t}\n+\t\tif (val != dev_expected[i]) {\n+\t\t\tprintf(\"%d: %s value incorrect, expected %\"\n+\t\t\t\tPRIu64\" got %d\\n\", __LINE__, dev_names[i],\n+\t\t\t\tdev_expected[i], id);\n+\t\t\tgoto fail;\n+\t\t}\n+\t\t/* reset to zero */\n+\t\tint reset_ret = rte_event_dev_xstats_reset(evdev,\n+\t\t\t\t\t\tRTE_EVENT_DEV_XSTATS_DEVICE, 0,\n+\t\t\t\t\t\t&id,\n+\t\t\t\t\t\t1);\n+\t\tif (reset_ret) {\n+\t\t\tprintf(\"%d: failed to reset successfully\\n\", __LINE__);\n+\t\t\tgoto fail;\n+\t\t}\n+\t\tdev_expected[i] = 0;\n+\t\t/* check value again */\n+\t\tval = rte_event_dev_xstats_by_name_get(evdev, dev_names[i], 0);\n+\t\tif (val != dev_expected[i]) {\n+\t\t\tprintf(\"%d: %s value incorrect, expected %\"PRIu64\n+\t\t\t\t\" got %\"PRIu64\"\\n\", __LINE__, dev_names[i],\n+\t\t\t\tdev_expected[i], val);\n+\t\t\tgoto fail;\n+\t\t}\n+\t};\n+\n+/* 48 is stat offset from start of the devices whole xstats.\n+ * This WILL break every time we add a statistic to a port\n+ * or the device, but there is no other way to test\n+ */\n+#define PORT_OFF 48\n+/* num stats for the tested port. CQ size adds more stats to a port */\n+#define NUM_PORT_STATS 21\n+/* the port to test. */\n+#define PORT 2\n+\tnum_stats = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_PORT, PORT,\n+\t\t\t\t\txstats_names, ids, XSTATS_MAX);\n+\tif (num_stats != NUM_PORT_STATS) {\n+\t\tprintf(\"%d: expected %d stats, got return %d\\n\",\n+\t\t\t__LINE__, NUM_PORT_STATS, num_stats);\n+\t\tgoto fail;\n+\t}\n+\tret = rte_event_dev_xstats_get(evdev, RTE_EVENT_DEV_XSTATS_PORT, PORT,\n+\t\t\t\t\tids, values, num_stats);\n+\n+\tif (ret != NUM_PORT_STATS) {\n+\t\tprintf(\"%d: expected %d stats, got return %d\\n\",\n+\t\t\t\t__LINE__, NUM_PORT_STATS, ret);\n+\t\tgoto fail;\n+\t}\n+\tstatic const char * const port_names[] = {\n+\t\t\"port_2_rx\",\n+\t\t\"port_2_tx\",\n+\t\t\"port_2_drop\",\n+\t\t\"port_2_inflight\",\n+\t\t\"port_2_avg_pkt_cycles\",\n+\t\t\"port_2_credits\",\n+\t\t\"port_2_rx_ring_used\",\n+\t\t\"port_2_rx_ring_free\",\n+\t\t\"port_2_cq_ring_used\",\n+\t\t\"port_2_cq_ring_free\",\n+\t\t\"port_2_dequeue_calls\",\n+\t\t\"port_2_dequeues_returning_0\",\n+\t\t\"port_2_dequeues_returning_1-4\",\n+\t\t\"port_2_dequeues_returning_5-8\",\n+\t\t\"port_2_dequeues_returning_9-12\",\n+\t\t\"port_2_dequeues_returning_13-16\",\n+\t\t\"port_2_dequeues_returning_17-20\",\n+\t\t\"port_2_dequeues_returning_21-24\",\n+\t\t\"port_2_dequeues_returning_25-28\",\n+\t\t\"port_2_dequeues_returning_29-32\",\n+\t\t\"port_2_dequeues_returning_33-36\",\n+\t};\n+\tuint64_t port_expected[] = {\n+\t\t0, /* rx */\n+\t\tNPKTS, /* tx */\n+\t\t0, /* drop */\n+\t\tNPKTS, /* inflight */\n+\t\t0, /* avg pkt cycles */\n+\t\t0, /* credits */\n+\t\t0, /* rx ring used */\n+\t\t4096, /* rx ring free */\n+\t\tNPKTS,  /* cq ring used */\n+\t\t25, /* cq ring free */\n+\t\t0, /* dequeue zero calls */\n+\t\t0, 0, 0, 0, 0, /* 10 dequeue buckets */\n+\t\t0, 0, 0, 0, 0,\n+\t};\n+\tuint64_t port_expected_zero[] = {\n+\t\t0, /* rx */\n+\t\t0, /* tx */\n+\t\t0, /* drop */\n+\t\tNPKTS, /* inflight */\n+\t\t0, /* avg pkt cycles */\n+\t\t0, /* credits */\n+\t\t0, /* rx ring used */\n+\t\t4096, /* rx ring free */\n+\t\tNPKTS,  /* cq ring used */\n+\t\t25, /* cq ring free */\n+\t\t0, /* dequeue zero calls */\n+\t\t0, 0, 0, 0, 0, /* 10 dequeue buckets */\n+\t\t0, 0, 0, 0, 0,\n+\t};\n+\tif (RTE_DIM(port_expected) != NUM_PORT_STATS ||\n+\t\t\tRTE_DIM(port_names) != NUM_PORT_STATS) {\n+\t\tprintf(\"%d: port array of wrong size\\n\", __LINE__);\n+\t\tgoto fail;\n+\t}\n+\n+\tint failed = 0;\n+\tfor (i = 0; (int)i < ret; i++) {\n+\t\tunsigned int id;\n+\t\tuint64_t val = rte_event_dev_xstats_by_name_get(evdev,\n+\t\t\t\t\t\t\t\tport_names[i],\n+\t\t\t\t\t\t\t\t&id);\n+\t\tif (id != i + PORT_OFF) {\n+\t\t\tprintf(\"%d: %s id incorrect, expected %d got %d\\n\",\n+\t\t\t\t\t__LINE__, port_names[i], i+PORT_OFF,\n+\t\t\t\t\tid);\n+\t\t\tfailed = 1;\n+\t\t}\n+\t\tif (val != port_expected[i]) {\n+\t\t\tprintf(\"%d: %s value incorrect, expected %\"PRIu64\n+\t\t\t\t\" got %d\\n\", __LINE__, port_names[i],\n+\t\t\t\tport_expected[i], id);\n+\t\t\tfailed = 1;\n+\t\t}\n+\t\t/* reset to zero */\n+\t\tint reset_ret = rte_event_dev_xstats_reset(evdev,\n+\t\t\t\t\t\tRTE_EVENT_DEV_XSTATS_PORT, PORT,\n+\t\t\t\t\t\t&id,\n+\t\t\t\t\t\t1);\n+\t\tif (reset_ret) {\n+\t\t\tprintf(\"%d: failed to reset successfully\\n\", __LINE__);\n+\t\t\tfailed = 1;\n+\t\t}\n+\t\t/* check value again */\n+\t\tval = rte_event_dev_xstats_by_name_get(evdev, port_names[i], 0);\n+\t\tif (val != port_expected_zero[i]) {\n+\t\t\tprintf(\"%d: %s value incorrect, expected %\"PRIu64\n+\t\t\t\t\" got %\"PRIu64\"\\n\", __LINE__, port_names[i],\n+\t\t\t\tport_expected_zero[i], val);\n+\t\t\tfailed = 1;\n+\t\t}\n+\t};\n+\tif (failed)\n+\t\tgoto fail;\n+\n+/* num queue stats */\n+#define NUM_Q_STATS 13\n+/* queue offset from start of the devices whole xstats.\n+ * This will break every time we add a statistic to a device/port/queue\n+ */\n+#define QUEUE_OFF 90\n+\tconst uint32_t queue = 0;\n+\tnum_stats = rte_event_dev_xstats_names_get(evdev,\n+\t\t\t\t\tRTE_EVENT_DEV_XSTATS_QUEUE, queue,\n+\t\t\t\t\txstats_names, ids, XSTATS_MAX);\n+\tif (num_stats != NUM_Q_STATS) {\n+\t\tprintf(\"%d: expected %d stats, got return %d\\n\",\n+\t\t\t__LINE__, NUM_Q_STATS, num_stats);\n+\t\tgoto fail;\n+\t}\n+\tret = rte_event_dev_xstats_get(evdev, RTE_EVENT_DEV_XSTATS_QUEUE,\n+\t\t\t\t\tqueue, ids, values, num_stats);\n+\tif (ret != NUM_Q_STATS) {\n+\t\tprintf(\"%d: expected 21 stats, got return %d\\n\", __LINE__, ret);\n+\t\tgoto fail;\n+\t}\n+\tstatic const char * const queue_names[] = {\n+\t\t\"qid_0_rx\",\n+\t\t\"qid_0_tx\",\n+\t\t\"qid_0_drop\",\n+\t\t\"qid_0_inflight\",\n+\t\t\"qid_0_iq_size\",\n+\t\t\"qid_0_iq_0_used\",\n+\t\t\"qid_0_iq_1_used\",\n+\t\t\"qid_0_iq_2_used\",\n+\t\t\"qid_0_iq_3_used\",\n+\t\t\"qid_0_port_0_pinned_flows\",\n+\t\t\"qid_0_port_1_pinned_flows\",\n+\t\t\"qid_0_port_2_pinned_flows\",\n+\t\t\"qid_0_port_3_pinned_flows\",\n+\t};\n+\tuint64_t queue_expected[] = {\n+\t\t7, /* rx */\n+\t\t7, /* tx */\n+\t\t0, /* drop */\n+\t\t7, /* inflight */\n+\t\t512, /* iq size */\n+\t\t0, /* iq 0 used */\n+\t\t0, /* iq 1 used */\n+\t\t0, /* iq 2 used */\n+\t\t0, /* iq 3 used */\n+\t\t0, /* qid 0 port 0 pinned flows */\n+\t\t0, /* qid 0 port 1 pinned flows */\n+\t\t1, /* qid 0 port 2 pinned flows */\n+\t\t0, /* qid 0 port 4 pinned flows */\n+\t};\n+\tuint64_t queue_expected_zero[] = {\n+\t\t0, /* rx */\n+\t\t0, /* tx */\n+\t\t0, /* drop */\n+\t\t7, /* inflight */\n+\t\t512, /* iq size */\n+\t\t0, /* iq 0 used */\n+\t\t0, /* iq 1 used */\n+\t\t0, /* iq 2 used */\n+\t\t0, /* iq 3 used */\n+\t\t0, /* qid 0 port 0 pinned flows */\n+\t\t0, /* qid 0 port 1 pinned flows */\n+\t\t1, /* qid 0 port 2 pinned flows */\n+\t\t0, /* qid 0 port 4 pinned flows */\n+\t};\n+\tif (RTE_DIM(queue_expected) != NUM_Q_STATS ||\n+\t\t\tRTE_DIM(queue_names) != NUM_Q_STATS) {\n+\t\tprintf(\"%d : queue array of wrong size\\n\", __LINE__);\n+\t\tgoto fail;\n+\t}\n+\n+\tfailed = 0;\n+\tfor (i = 0; (int)i < ret; i++) {\n+\t\tunsigned int id;\n+\t\tuint64_t val = rte_event_dev_xstats_by_name_get(evdev,\n+\t\t\t\t\t\t\t\tqueue_names[i],\n+\t\t\t\t\t\t\t\t&id);\n+\t\tif (id != i + QUEUE_OFF) {\n+\t\t\tprintf(\"%d: %s id incorrect, expected %d got %d\\n\",\n+\t\t\t\t\t__LINE__, queue_names[i], i+QUEUE_OFF,\n+\t\t\t\t\tid);\n+\t\t\tfailed = 1;\n+\t\t}\n+\t\tif (val != queue_expected[i]) {\n+\t\t\tprintf(\"%d: %s value incorrect, expected %\"PRIu64\n+\t\t\t\t\" got %d\\n\", __LINE__, queue_names[i],\n+\t\t\t\tqueue_expected[i], id);\n+\t\t\tfailed = 1;\n+\t\t}\n+\t\t/* reset to zero */\n+\t\tint reset_ret = rte_event_dev_xstats_reset(evdev,\n+\t\t\t\t\t\tRTE_EVENT_DEV_XSTATS_QUEUE,\n+\t\t\t\t\t\tqueue, &id, 1);\n+\t\tif (reset_ret) {\n+\t\t\tprintf(\"%d: failed to reset successfully\\n\", __LINE__);\n+\t\t\tfailed = 1;\n+\t\t}\n+\t\t/* check value again */\n+\t\tval = rte_event_dev_xstats_by_name_get(evdev, queue_names[i],\n+\t\t\t\t\t\t\t0);\n+\t\tif (val != queue_expected_zero[i]) {\n+\t\t\tprintf(\"%d: %s value incorrect, expected %\"PRIu64\n+\t\t\t\t\" got %\"PRIu64\"\\n\", __LINE__, queue_names[i],\n+\t\t\t\tqueue_expected_zero[i], val);\n+\t\t\tfailed = 1;\n+\t\t}\n+\t};\n+\n+\tif (failed)\n+\t\tgoto fail;\n+\n+\tcleanup(t);\n+\treturn 0;\n+fail:\n+\tcleanup(t);\n+\treturn -1;\n+}\n+\n+static int\n ordered_reconfigure(struct test *t)\n {\n \tif (init(t, 1, 1) < 0 ||\n@@ -1948,6 +2730,30 @@ test_sw_eventdev(void)\n \t\tprintf(\"ERROR - Abuse Inflights test FAILED.\\n\");\n \t\treturn ret;\n \t}\n+\tprintf(\"*** Running XStats test...\\n\");\n+\tret = xstats_tests(t);\n+\tif (ret != 0) {\n+\t\tprintf(\"ERROR - XStats test FAILED.\\n\");\n+\t\treturn ret;\n+\t}\n+\tprintf(\"*** Running XStats ID Reset test...\\n\");\n+\tret = xstats_id_reset_tests(t);\n+\tif (ret != 0) {\n+\t\tprintf(\"ERROR - XStats ID Reset test FAILED.\\n\");\n+\t\treturn ret;\n+\t}\n+\tprintf(\"*** Running XStats Brute Force test...\\n\");\n+\tret = xstats_brute_force(t);\n+\tif (ret != 0) {\n+\t\tprintf(\"ERROR - XStats Brute Force test FAILED.\\n\");\n+\t\treturn ret;\n+\t}\n+\tprintf(\"*** Running XStats ID Abuse test...\\n\");\n+\tret = xstats_id_abuse_tests(t);\n+\tif (ret != 0) {\n+\t\tprintf(\"ERROR - XStats ID Abuse test FAILED.\\n\");\n+\t\treturn ret;\n+\t}\n \tprintf(\"*** Running QID Priority test...\\n\");\n \tret = qid_priorities(t);\n \tif (ret != 0) {\n",
    "prefixes": [
        "dpdk-dev",
        "v6",
        "18/21"
    ]
}