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GET /api/patches/22631/?format=api
{ "id": 22631, "url": "http://patches.dpdk.org/api/patches/22631/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1490718059-380-3-git-send-email-bernard.iremonger@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1490718059-380-3-git-send-email-bernard.iremonger@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1490718059-380-3-git-send-email-bernard.iremonger@intel.com", "date": "2017-03-28T16:20:56", "name": "[dpdk-dev,v3,2/5] net/i40e: parse QinQ pattern", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d68840a750058533685fb70788e34a755a6102ef", "submitter": { "id": 91, "url": "http://patches.dpdk.org/api/people/91/?format=api", "name": "Iremonger, Bernard", "email": "bernard.iremonger@intel.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1490718059-380-3-git-send-email-bernard.iremonger@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/22631/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/22631/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 748B2695D;\n\tTue, 28 Mar 2017 18:21:41 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby dpdk.org (Postfix) with ESMTP id 12D3C29C7\n\tfor <dev@dpdk.org>; Tue, 28 Mar 2017 18:21:17 +0200 (CEST)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby fmsmga105.fm.intel.com with ESMTP; 28 Mar 2017 09:21:11 -0700", "from sivswdev01.ir.intel.com (HELO localhost.localdomain)\n\t([10.237.217.45])\n\tby orsmga003.jf.intel.com with ESMTP; 28 Mar 2017 09:21:09 -0700" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.36,237,1486454400\"; d=\"scan'208\";a=\"949070121\"", "From": "Bernard Iremonger <bernard.iremonger@intel.com>", "To": "dev@dpdk.org,\n\tbeilei.xing@intel.com,\n\tjingjing.wu@intel.com", "Cc": "helin.zhang@intel.com, wenzhuo.lu@intel.com,\n\tBernard Iremonger <bernard.iremonger@intel.com>", "Date": "Tue, 28 Mar 2017 17:20:56 +0100", "Message-Id": "<1490718059-380-3-git-send-email-bernard.iremonger@intel.com>", "X-Mailer": "git-send-email 1.7.0.7", "In-Reply-To": "<1490287113-8895-1-git-send-email-bernard.iremonger@intel.com>", "References": "<1490287113-8895-1-git-send-email-bernard.iremonger@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 2/5] net/i40e: parse QinQ pattern", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "add QinQ pattern.\nadd i40e_flow_parse_qinq_pattern function.\nadd i40e_flow_parse_qinq_filter function.\n\nSigned-off-by: Bernard Iremonger <bernard.iremonger@intel.com>\n---\n drivers/net/i40e/i40e_flow.c | 187 ++++++++++++++++++++++++++++++++++++++++++-\n 1 file changed, 185 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c\nindex be243e172..39b09ead5 100644\n--- a/drivers/net/i40e/i40e_flow.c\n+++ b/drivers/net/i40e/i40e_flow.c\n@@ -1,7 +1,7 @@\n /*-\n * BSD LICENSE\n *\n- * Copyright (c) 2016 Intel Corporation. All rights reserved.\n+ * Copyright (c) 2016-2017 Intel Corporation. All rights reserved.\n *\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions\n@@ -128,6 +128,18 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf,\n static int i40e_flow_flush_fdir_filter(struct i40e_pf *pf);\n static int i40e_flow_flush_ethertype_filter(struct i40e_pf *pf);\n static int i40e_flow_flush_tunnel_filter(struct i40e_pf *pf);\n+static int\n+i40e_flow_parse_qinq_filter(struct rte_eth_dev *dev,\n+\t\t\t const struct rte_flow_attr *attr,\n+\t\t\t const struct rte_flow_item pattern[],\n+\t\t\t const struct rte_flow_action actions[],\n+\t\t\t struct rte_flow_error *error,\n+\t\t\t union i40e_filter_t *filter);\n+static int\n+i40e_flow_parse_qinq_pattern(__rte_unused struct rte_eth_dev *dev,\n+\t\t\t const struct rte_flow_item *pattern,\n+\t\t\t struct rte_flow_error *error,\n+\t\t\t struct i40e_tunnel_filter_conf *filter);\n \n const struct rte_flow_ops i40e_flow_ops = {\n \t.validate = i40e_flow_validate,\n@@ -318,6 +330,14 @@ static enum rte_flow_item_type pattern_mpls_4[] = {\n \tRTE_FLOW_ITEM_TYPE_END,\n };\n \n+/* Pattern matched QINQ */\n+static enum rte_flow_item_type pattern_qinq_1[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_VLAN,\n+\tRTE_FLOW_ITEM_TYPE_VLAN,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n static struct i40e_valid_pattern i40e_supported_patterns[] = {\n \t/* Ethertype */\n \t{ pattern_ethertype, i40e_flow_parse_ethertype_filter },\n@@ -348,6 +368,8 @@ static struct i40e_valid_pattern i40e_supported_patterns[] = {\n \t{ pattern_mpls_2, i40e_flow_parse_mpls_filter },\n \t{ pattern_mpls_3, i40e_flow_parse_mpls_filter },\n \t{ pattern_mpls_4, i40e_flow_parse_mpls_filter },\n+\t/* QINQ */\n+\t{ pattern_qinq_1, i40e_flow_parse_qinq_filter },\n };\n \n #define NEXT_ITEM_OF_ACTION(act, actions, index) \\\n@@ -1171,7 +1193,7 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n-/* Parse to get the action info of a tunnle filter\n+/* Parse to get the action info of a tunnel filter\n * Tunnel action only supports PF, VF and QUEUE.\n */\n static int\n@@ -1748,6 +1770,167 @@ i40e_flow_parse_mpls_filter(struct rte_eth_dev *dev,\n }\n \n static int\n+i40e_flow_parse_qinq_pattern(__rte_unused struct rte_eth_dev *dev,\n+\t\t\t const struct rte_flow_item *pattern,\n+\t\t\t struct rte_flow_error *error,\n+\t\t\t struct i40e_tunnel_filter_conf *filter)\n+{\n+\tconst struct rte_flow_item *item = pattern;\n+\tconst struct rte_flow_item_eth *eth_spec;\n+\tconst struct rte_flow_item_eth *eth_mask;\n+\tconst struct rte_flow_item_eth *i_eth_spec = NULL;\n+\tconst struct rte_flow_item_eth *i_eth_mask = NULL;\n+\tconst struct rte_flow_item_vlan *vlan_spec = NULL;\n+\tconst struct rte_flow_item_vlan *vlan_mask = NULL;\n+\tconst struct rte_flow_item_vlan *i_vlan_spec = NULL;\n+\tconst struct rte_flow_item_vlan *o_vlan_spec = NULL;\n+\n+\tenum rte_flow_item_type item_type;\n+\tbool vlan_flag = 0;\n+\n+\tfor (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {\n+\t\tif (item->last) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t item,\n+\t\t\t\t\t \"Not support range\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\titem_type = item->type;\n+\t\tswitch (item_type) {\n+\t\tcase RTE_FLOW_ITEM_TYPE_ETH:\n+\t\t\teth_spec = (const struct rte_flow_item_eth *)item->spec;\n+\t\t\teth_mask = (const struct rte_flow_item_eth *)item->mask;\n+\t\t\tif ((!eth_spec && eth_mask) ||\n+\t\t\t (eth_spec && !eth_mask)) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid ether spec/mask\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tif (eth_spec && eth_mask) {\n+\t\t\t\t/* DST address of inner MAC shouldn't be masked.\n+\t\t\t\t * SRC address of Inner MAC should be masked.\n+\t\t\t\t */\n+\t\t\t\tif (!is_broadcast_ether_addr(ð_mask->dst) ||\n+\t\t\t\t !is_zero_ether_addr(ð_mask->src) ||\n+\t\t\t\t eth_mask->type) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid ether spec/mask\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\n+\t\t\t\trte_memcpy(&filter->outer_mac,\n+\t\t\t\t\t\t ð_spec->dst,\n+\t\t\t\t\t\t ETHER_ADDR_LEN);\n+\t\t\t}\n+\n+\t\t\ti_eth_spec = eth_spec;\n+\t\t\ti_eth_mask = eth_mask;\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_VLAN:\n+\t\t\tvlan_spec =\n+\t\t\t\t(const struct rte_flow_item_vlan *)item->spec;\n+\t\t\tvlan_mask =\n+\t\t\t\t(const struct rte_flow_item_vlan *)item->mask;\n+\n+\t\t\tif (!(vlan_spec && vlan_mask)) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t item,\n+\t\t\t\t\t \"Invalid vlan item\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tif (!vlan_flag) {\n+\t\t\t\to_vlan_spec = vlan_spec;\n+\t\t\t\tvlan_flag = 1;\n+\t\t\t} else {\n+\t\t\t\ti_vlan_spec = vlan_spec;\n+\t\t\t\tvlan_flag = 0;\n+\t\t\t}\n+\t\t\tbreak;\n+\n+\t\tdefault:\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\t/* Check specification and mask to get the filter type */\n+\tif (vlan_spec && vlan_mask &&\n+\t (vlan_mask->tci == rte_cpu_to_be_16(I40E_TCI_MASK))) {\n+\t\t\t/* There is an inner and outer vlan */\n+\t\tfilter->outer_vlan = rte_be_to_cpu_16(o_vlan_spec->tci)\n+\t\t\t& I40E_TCI_MASK;\n+\t\tfilter->inner_vlan = rte_be_to_cpu_16(i_vlan_spec->tci)\n+\t\t\t& I40E_TCI_MASK;\n+\t\tif (i_eth_spec && i_eth_mask)\n+\t\t\tfilter->filter_type =\n+\t\t\t\tI40E_TUNNEL_FILTER_CUSTOM_QINQ;\n+\t\telse {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t NULL,\n+\t\t\t\t\t \"Invalid filter type\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t} else if ((!vlan_spec && !vlan_mask) ||\n+\t\t (vlan_spec && vlan_mask && vlan_mask->tci == 0x0)) {\n+\t\tif (i_eth_spec && i_eth_mask) {\n+\t\t\tfilter->filter_type = I40E_TUNNEL_FILTER_CUSTOM_QINQ;\n+\t\t} else {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM, NULL,\n+\t\t\t\t \"Invalid filter type\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t} else {\n+\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM, NULL,\n+\t\t\t\t \"Not supported by tunnel filter.\");\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tfilter->tunnel_type = I40E_TUNNEL_TYPE_QINQ;\n+\n+\treturn 0;\n+}\n+\n+static int\n+i40e_flow_parse_qinq_filter(struct rte_eth_dev *dev,\n+\t\t\t const struct rte_flow_attr *attr,\n+\t\t\t const struct rte_flow_item pattern[],\n+\t\t\t const struct rte_flow_action actions[],\n+\t\t\t struct rte_flow_error *error,\n+\t\t\t union i40e_filter_t *filter)\n+{\n+\tstruct i40e_tunnel_filter_conf *tunnel_filter =\n+\t\t&filter->consistent_tunnel_filter;\n+\tint ret;\n+\n+\tret = i40e_flow_parse_qinq_pattern(dev, pattern,\n+\t\t\t\t\t error, tunnel_filter);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tret = i40e_flow_parse_tunnel_action(dev, actions, error, tunnel_filter);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tret = i40e_flow_parse_attr(attr, error);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tcons_filter_type = RTE_ETH_FILTER_TUNNEL;\n+\n+\treturn ret;\n+}\n+\n+static int\n i40e_flow_validate(struct rte_eth_dev *dev,\n \t\t const struct rte_flow_attr *attr,\n \t\t const struct rte_flow_item pattern[],\n", "prefixes": [ "dpdk-dev", "v3", "2/5" ] }