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{
    "id": 223,
    "url": "http://patches.dpdk.org/api/patches/223/",
    "web_url": "http://patches.dpdk.org/patch/223/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<1409038294-21693-7-git-send-email-jijiang.liu@intel.com>",
    "date": "2014-08-26T07:31:33",
    "name": "[dpdk-dev,v2,6/7] i40e:support VxLAN Tx checksum offload",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "e1c9b42d717a4d8f456a3f5f4ea6866761b42ade",
    "submitter": {
        "id": 52,
        "url": "http://patches.dpdk.org/api/people/52/",
        "name": "Jijiang Liu",
        "email": "jijiang.liu@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/patch/223/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/223/comments/",
    "check": "pending",
    "checks": "http://patches.dpdk.org/api/patches/223/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "<jijiangl@shecgisg004.sh.intel.com>",
        "References": "<1409038294-21693-1-git-send-email-jijiang.liu@intel.com>",
        "X-Mailman-Version": "2.1.15",
        "X-IronPort-AV": "E=Sophos;i=\"5.04,402,1406617200\"; d=\"scan'208\";a=\"472638979\"",
        "From": "Jijiang Liu <jijiang.liu@intel.com>",
        "X-List-Received-Date": "Tue, 26 Aug 2014 07:27:58 -0000",
        "X-BeenThere": "dev@dpdk.org",
        "Message-Id": "<1409038294-21693-7-git-send-email-jijiang.liu@intel.com>",
        "Received": [
            "from mga03.intel.com (mga03.intel.com [143.182.124.21])\n\tby dpdk.org (Postfix) with ESMTP id 5D560B378\n\tfor <dev@dpdk.org>; Tue, 26 Aug 2014 09:27:57 +0200 (CEST)",
            "from azsmga001.ch.intel.com ([10.2.17.19])\n\tby azsmga101.ch.intel.com with ESMTP; 26 Aug 2014 00:31:55 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby azsmga001.ch.intel.com with ESMTP; 26 Aug 2014 00:31:54 -0700",
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            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s7Q7VneZ021848; Tue, 26 Aug 2014 15:31:51 +0800",
            "(from jijiangl@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s7Q7VnXE021844; \n\tTue, 26 Aug 2014 15:31:49 +0800"
        ],
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "X-Mailer": "git-send-email 1.7.0.7",
        "Precedence": "list",
        "Date": "Tue, 26 Aug 2014 15:31:33 +0800",
        "Subject": "[dpdk-dev] [PATCH v2 6/7]i40e:support VxLAN Tx checksum offload",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "X-ExtLoop1": "1",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "In-Reply-To": "<1409038294-21693-1-git-send-email-jijiang.liu@intel.com>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "To": "dev@dpdk.org"
    },
    "content": "Support VxLAN Tx checksum offload, which include \n  - outer L3(IP) checksum offload\n  - inner L3(IP) checksum offload\n  - inner L4(UDP, TCP and SCTP) checksum offload\n\nSigned-off-by: jijiangl <jijiang.liu@intel.com>\n---\n lib/librte_mbuf/rte_mbuf.h      |    4 +++\n lib/librte_pmd_i40e/i40e_rxtx.c |   58 +++++++++++++++++++++++++++++++++++++--\n 2 files changed, 59 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h\nindex 2735f37..212ac3a 100644\n--- a/lib/librte_mbuf/rte_mbuf.h\n+++ b/lib/librte_mbuf/rte_mbuf.h\n@@ -97,6 +97,8 @@ struct rte_ctrlmbuf {\n #define PKT_RX_IEEE1588_PTP  0x0200 /**< RX IEEE1588 L2 Ethernet PT Packet. */\n #define PKT_RX_IEEE1588_TMST 0x0400 /**< RX IEEE1588 L2/L4 timestamped packet.*/\n \n+#define PKT_TX_VXLAN_CKSUM   0x0001 /**< Checksum of TX VxLAN pkt. computed by NIC.. */\n+#define PKT_TX_IVLAN_PKT     0x0002 /**< TX packet is VxLAN packet with an inner VLAN. */\n #define PKT_TX_VLAN_PKT      0x0800 /**< TX packet is a 802.1q VLAN packet. */\n #define PKT_TX_IP_CKSUM      0x1000 /**< IP cksum of TX pkt. computed by NIC. */\n #define PKT_TX_IPV4_CSUM     0x1000 /**< Alias of PKT_TX_IP_CKSUM. */\n@@ -594,6 +596,7 @@ static inline void rte_pktmbuf_reset(struct rte_mbuf *m)\n \tm->pkt.in_port = 0xff;\n \n \tm->ol_flags = 0;\n+\tm->reserved = 0;\n \tbuf_ofs = (RTE_PKTMBUF_HEADROOM <= m->buf_len) ?\n \t\t\tRTE_PKTMBUF_HEADROOM : m->buf_len;\n \tm->pkt.data = (char*) m->buf_addr + buf_ofs;\n@@ -658,6 +661,7 @@ static inline void rte_pktmbuf_attach(struct rte_mbuf *mi, struct rte_mbuf *md)\n \tmi->pkt.pkt_len = mi->pkt.data_len;\n \tmi->pkt.nb_segs = 1;\n \tmi->ol_flags = md->ol_flags;\n+\tmi->reserved = md->reserved;\n \n \t__rte_mbuf_sanity_check(mi, RTE_MBUF_PKT, 1);\n \t__rte_mbuf_sanity_check(md, RTE_MBUF_PKT, 0);\ndiff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c\nindex f153844..a382d74 100644\n--- a/lib/librte_pmd_i40e/i40e_rxtx.c\n+++ b/lib/librte_pmd_i40e/i40e_rxtx.c\n@@ -412,12 +412,16 @@ i40e_rxd_ptype_to_pkt_flags(uint64_t qword)\n \treturn ip_ptype_map[ptype];\n }\n \n+#define L4TUN_LEN (sizeof(struct udp_hdr) + sizeof(struct vxlan_hdr)\\\n+\t\t\t + sizeof(struct ether_hdr))\n static inline void\n i40e_txd_enable_checksum(uint32_t ol_flags,\n \t\t\tuint32_t *td_cmd,\n \t\t\tuint32_t *td_offset,\n \t\t\tuint8_t l2_len,\n-\t\t\tuint8_t l3_len)\n+\t\t\tuint8_t l3_len,\n+\t\t\tuint8_t inner_l3_len,\n+\t\t\tuint32_t *cd_tunneling)\n {\n \tif (!l2_len) {\n \t\tPMD_DRV_LOG(DEBUG, \"L2 length set to 0\\n\");\n@@ -430,6 +434,31 @@ i40e_txd_enable_checksum(uint32_t ol_flags,\n \t\treturn;\n \t}\n \n+\t/* VxLAN packet TX checksum offload */\n+\tif (unlikely(ol_flags & PKT_TX_VXLAN_CKSUM)) {\n+\t\tuint8_t l4tun_len;\n+\n+\t\t/* packet with inner VLAN */\n+\t\tif (ol_flags  & PKT_TX_IVLAN_PKT)\n+\t\t\tl4tun_len = L4TUN_LEN + sizeof(struct vlan_hdr);\n+\t\telse\n+\t\t\tl4tun_len = L4TUN_LEN;\n+\n+\t\tif (ol_flags & PKT_TX_IPV4_CSUM)\n+\t\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV4;\n+\t\telse if (ol_flags & PKT_TX_IPV6)\n+\t\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV6;\n+\n+\t\t/* Now set the ctx descriptor fields */\n+\t\t*cd_tunneling |= (l3_len >> 2) <<\n+\t\t\t\tI40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT |\n+\t\t\t\tI40E_TXD_CTX_UDP_TUNNELING |\n+\t\t\t\t(l4tun_len >> 1) <<\n+\t\t\t\tI40E_TXD_CTX_QW0_NATLEN_SHIFT;\n+\n+\t\tl3_len = inner_l3_len;\n+\t}\n+\n \t/* Enable L3 checksum offloads */\n \tif (ol_flags & PKT_TX_IPV4_CSUM) {\n \t\t*td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV4_CSUM;\n@@ -611,6 +640,12 @@ i40e_rx_scan_hw_ring(struct i40e_rx_queue *rxq)\n \t\t\t\t\t\tI40E_RXD_QW1_STATUS_SHIFT;\n \t\t\tpkt_len = ((qword1 & I40E_RXD_QW1_LENGTH_PBUF_MASK) >>\n \t\t\t\tI40E_RXD_QW1_LENGTH_PBUF_SHIFT) - rxq->crc_len;\n+\n+\t\t\t/* reserved is used to store packet type for RX side */\n+\t\t\tmb->reserved = (uint8_t)((qword1 &\n+\t\t\t\t\tI40E_RXD_QW1_PTYPE_MASK) >>\n+\t\t\t\t\tI40E_RXD_QW1_PTYPE_SHIFT);\n+\n \t\t\tmb->pkt.data_len = pkt_len;\n \t\t\tmb->pkt.pkt_len = pkt_len;\n \t\t\tmb->pkt.vlan_macip.f.vlan_tci = rx_status &\n@@ -857,6 +892,8 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \t\tpkt_flags = i40e_rxd_status_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_error_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1);\n+\t\trxm->reserved = (uint8_t)((qword1 & I40E_RXD_QW1_PTYPE_MASK) >>\n+\t\t\t\tI40E_RXD_QW1_PTYPE_SHIFT);\n \t\trxm->ol_flags = pkt_flags;\n \t\tif (pkt_flags & PKT_RX_RSS_HASH)\n \t\t\trxm->pkt.hash.rss =\n@@ -1010,6 +1047,9 @@ i40e_recv_scattered_pkts(void *rx_queue,\n \t\tpkt_flags = i40e_rxd_status_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_error_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1);\n+\t\tfirst_seg->reserved = (uint8_t)((qword1 &\n+\t\t\t\t\tI40E_RXD_QW1_PTYPE_MASK) >>\n+\t\t\t\t\tI40E_RXD_QW1_PTYPE_SHIFT);\n \t\tfirst_seg->ol_flags = pkt_flags;\n \t\tif (pkt_flags & PKT_RX_RSS_HASH)\n \t\t\trxm->pkt.hash.rss =\n@@ -1052,6 +1092,9 @@ i40e_calc_context_desc(uint16_t flags)\n {\n \tuint16_t mask = 0;\n \n+\tif (flags | PKT_TX_VXLAN_CKSUM)\n+\t\tmask |= PKT_TX_VXLAN_CKSUM;\n+\n #ifdef RTE_LIBRTE_IEEE1588\n \tmask |= PKT_TX_IEEE1588_TMST;\n #endif\n@@ -1071,6 +1114,7 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \tvolatile struct i40e_tx_desc *txr;\n \tstruct rte_mbuf *tx_pkt;\n \tstruct rte_mbuf *m_seg;\n+\tuint32_t cd_tunneling_params;\n \tuint16_t tx_id;\n \tuint16_t nb_tx;\n \tuint32_t td_cmd;\n@@ -1080,6 +1124,7 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \tuint16_t ol_flags;\n \tuint8_t l2_len;\n \tuint8_t l3_len;\n+\tuint8_t inner_l3_len;\n \tuint16_t nb_used;\n \tuint16_t nb_ctx;\n \tuint16_t tx_last;\n@@ -1109,6 +1154,12 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\tl2_len = tx_pkt->pkt.vlan_macip.f.l2_len;\n \t\tl3_len = tx_pkt->pkt.vlan_macip.f.l3_len;\n \n+\t\t/**\n+\t\t * the reserved in mbuf is used to store innel L3\n+\t\t * header length.\n+\t\t */\n+\t\tinner_l3_len = tx_pkt->reserved;\n+\n \t\t/* Calculate the number of context descriptors needed. */\n \t\tnb_ctx = i40e_calc_context_desc(ol_flags);\n \n@@ -1155,15 +1206,16 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\ttd_cmd |= I40E_TX_DESC_CMD_ICRC;\n \n \t\t/* Enable checksum offloading */\n+\t\tcd_tunneling_params = 0;\n \t\ti40e_txd_enable_checksum(ol_flags, &td_cmd, &td_offset,\n-\t\t\t\t\t\t\tl2_len, l3_len);\n+\t\t\t\t\t\tl2_len, l3_len, inner_l3_len,\n+\t\t\t\t\t\t&cd_tunneling_params);\n \n \t\tif (unlikely(nb_ctx)) {\n \t\t\t/* Setup TX context descriptor if required */\n \t\t\tvolatile struct i40e_tx_context_desc *ctx_txd =\n \t\t\t\t(volatile struct i40e_tx_context_desc *)\\\n \t\t\t\t\t\t\t&txr[tx_id];\n-\t\t\tuint32_t cd_tunneling_params = 0;\n \t\t\tuint16_t cd_l2tag2 = 0;\n \t\t\tuint64_t cd_type_cmd_tso_mss =\n \t\t\t\tI40E_TX_DESC_DTYPE_CONTEXT;\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "6/7"
    ]
}