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{
    "id": 201,
    "url": "http://patches.dpdk.org/api/patches/201/",
    "web_url": "http://patches.dpdk.org/patch/201/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<1408932572-10343-2-git-send-email-changchun.ouyang@intel.com>",
    "date": "2014-08-25T02:09:28",
    "name": "[dpdk-dev,1/5] ethdev: Add new config field to config VMDQ offload register",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "d070d92237a30a9380e4fbc910eacc5f0277106e",
    "submitter": {
        "id": 31,
        "url": "http://patches.dpdk.org/api/people/31/",
        "name": "Ouyang Changchun",
        "email": "changchun.ouyang@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/patch/201/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/201/comments/",
    "check": "pending",
    "checks": "http://patches.dpdk.org/api/patches/201/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "<couyang@shecgisg004.sh.intel.com>",
        "References": "<1408932572-10343-1-git-send-email-changchun.ouyang@intel.com>",
        "X-Mailman-Version": "2.1.15",
        "X-IronPort-AV": "E=Sophos;i=\"5.04,393,1406617200\"; d=\"scan'208\";a=\"581150010\"",
        "From": "Ouyang Changchun <changchun.ouyang@intel.com>",
        "X-List-Received-Date": "Mon, 25 Aug 2014 02:06:10 -0000",
        "X-BeenThere": "dev@dpdk.org",
        "Message-Id": "<1408932572-10343-2-git-send-email-changchun.ouyang@intel.com>",
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        ],
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "X-Mailer": "git-send-email 1.7.0.7",
        "Precedence": "list",
        "Date": "Mon, 25 Aug 2014 10:09:28 +0800",
        "Subject": "[dpdk-dev] [PATCH 1/5] ethdev: Add new config field to config VMDQ\n\toffload register",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "X-ExtLoop1": "1",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "In-Reply-To": "<1408932572-10343-1-git-send-email-changchun.ouyang@intel.com>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "To": "dev@dpdk.org"
    },
    "content": "This patch adds new field of rx mode in VMDQ config; and set the register PFVML2FLT\nfor IXGBE PMD, this makes VMDQ receive multicast and broadcast packets.\n\nSigned-off-by: Changchun Ouyang <changchun.ouyang@intel.com>\nAcked-by: Huawei Xie <huawei.xie@intel.com>\nAcked-by: Cunming Liang <cunming.liang@intel.com>\n\n---\n lib/librte_ether/rte_ethdev.h     |  1 +\n lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 16 ++++++++++++++++\n 2 files changed, 17 insertions(+)",
    "diff": "diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h\nindex 50df654..f44dd2d 100644\n--- a/lib/librte_ether/rte_ethdev.h\n+++ b/lib/librte_ether/rte_ethdev.h\n@@ -575,6 +575,7 @@ struct rte_eth_vmdq_rx_conf {\n \tuint8_t default_pool; /**< The default pool, if applicable */\n \tuint8_t enable_loop_back; /**< Enable VT loop back */\n \tuint8_t nb_pool_maps; /**< We can have up to 64 filters/mappings */\n+\tuint32_t rx_mode; /**< RX mode for vmdq */\n \tstruct {\n \t\tuint16_t vlan_id; /**< The vlan id of the received frame */\n \t\tuint64_t pools;   /**< Bitmask of pools for packet rx */\ndiff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\nindex dfc2076..9efdbfb 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n@@ -3084,6 +3084,7 @@ ixgbe_vmdq_rx_hw_configure(struct rte_eth_dev *dev)\n \tstruct ixgbe_hw *hw;\n \tenum rte_eth_nb_pools num_pools;\n \tuint32_t mrqc, vt_ctl, vlanctrl;\n+\tuint32_t vmolr = 0;\n \tint i;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -3106,6 +3107,21 @@ ixgbe_vmdq_rx_hw_configure(struct rte_eth_dev *dev)\n \n \tIXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl);\n \n+\tfor (i = 0; i < (int)num_pools; i++) {\n+\t\tif (cfg->rx_mode & ETH_VMDQ_ACCEPT_UNTAG)\n+\t\t\tvmolr |= IXGBE_VMOLR_AUPE;\n+\t\tif (cfg->rx_mode & ETH_VMDQ_ACCEPT_HASH_MC)\n+\t\t\tvmolr |= IXGBE_VMOLR_ROMPE;\n+\t\tif (cfg->rx_mode & ETH_VMDQ_ACCEPT_HASH_UC)\n+\t\t\tvmolr |= IXGBE_VMOLR_ROPE;\n+\t\tif (cfg->rx_mode & ETH_VMDQ_ACCEPT_BROADCAST)\n+\t\t\tvmolr |= IXGBE_VMOLR_BAM;\n+\t\tif (cfg->rx_mode & ETH_VMDQ_ACCEPT_MULTICAST)\n+\t\t\tvmolr |= IXGBE_VMOLR_MPE;\n+\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VMOLR(i), vmolr);\n+\t}\n+\n \t/* VLNCTRL: enable vlan filtering and allow all vlan tags through */\n \tvlanctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);\n \tvlanctrl |= IXGBE_VLNCTRL_VFE ; /* enable vlan filters */\n",
    "prefixes": [
        "dpdk-dev",
        "1/5"
    ]
}