Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/139754/?format=api
{ "id": 139754, "url": "http://patches.dpdk.org/api/patches/139754/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240430202144.49899-10-andrew.boyer@amd.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240430202144.49899-10-andrew.boyer@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240430202144.49899-10-andrew.boyer@amd.com", "date": "2024-04-30T20:21:44", "name": "[v2,9/9] crypto/ionic: add stats support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "ee2ed37937ca26b890fdfebfe97d07777c1b03ba", "submitter": { "id": 2861, "url": "http://patches.dpdk.org/api/people/2861/?format=api", "name": "Andrew Boyer", "email": "Andrew.Boyer@amd.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240430202144.49899-10-andrew.boyer@amd.com/mbox/", "series": [ { "id": 31850, "url": "http://patches.dpdk.org/api/series/31850/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31850", "date": "2024-04-30T20:21:35", "name": "crypto/ionic: introduce AMD Pensando ionic crypto driver", "version": 2, "mbox": "http://patches.dpdk.org/series/31850/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/139754/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/139754/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3D56F43F56;\n\tTue, 30 Apr 2024 22:23:00 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 985C5402E1;\n\tTue, 30 Apr 2024 22:22:22 +0200 (CEST)", "from NAM10-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam10on2064.outbound.protection.outlook.com [40.107.93.64])\n by mails.dpdk.org (Postfix) with ESMTP id 17E1A402F0\n for <dev@dpdk.org>; Tue, 30 Apr 2024 22:22:17 +0200 (CEST)", "from SN7PR04CA0010.namprd04.prod.outlook.com (2603:10b6:806:f2::15)\n by DS0PR12MB9399.namprd12.prod.outlook.com (2603:10b6:8:1b8::9) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7519.34; Tue, 30 Apr\n 2024 20:22:14 +0000", "from SN1PEPF00026369.namprd02.prod.outlook.com\n (2603:10b6:806:f2:cafe::16) by SN7PR04CA0010.outlook.office365.com\n (2603:10b6:806:f2::15) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7519.36 via Frontend\n Transport; Tue, 30 Apr 2024 20:22:14 +0000", "from SATLEXMB04.amd.com (165.204.84.17) by\n SN1PEPF00026369.mail.protection.outlook.com (10.167.241.134) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.20.7544.18 via Frontend Transport; Tue, 30 Apr 2024 20:22:14 +0000", "from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com\n (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 30 Apr\n 2024 15:22:13 -0500" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=JtIKZNtYdCekDnBCI13du1mMVUQzNU803RKA/U9X4MoqmqYEnYZPcQ+sutnezrxkcyABkuyZwIjtDHNi0x8nKa5XKi3EtGhHTCRjh06U0OfUNhi3gVe1qT1r9lCefLQ30F8K9px5J1o8BLuOmwn7XdxiqWB+gWOuiVrFdkOBwIzWwBLU/1vxSf7laX+c5Z8ltg5+MYREcdbyVjMuCouN36n0qR7EIXvv7smc04qcdWhjox37MqbfLuehkdpx5Qary4V5tuaPB3eDb9CWXjOQJ3EXtPWaPh/GJ/3FBovcTwV5tM+pt95XAwGcUVlHSEJoHtrEHVWgzydHQksKFBJFqQ==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=NlGTlwh/Ra902MR98IWmuBAbYP/wNGTMpEPqcpjqqVE=;\n b=AjMHqzswtwktKotU75i6/PRPhnXtlRCRLgZQErUVCqDHXgiysRS5TSYRUkek0FJWuo9aVLNJtCs/oMXP/d45hayjMWEf8kmT6comus6Tf6ISe7YAjhV00pW9LAiK0j7sbYBarJ/uG39g9OQAF3WOuGvq2hfls2Y1bwwzZ5JZPJbs4+pjL07LqdwwXQeWU5paERHsEwfH+y9+tjBguScdv+77GHvmujirG5W8bTsKv3LtoWsiN+QA6TstszvwTNDmBclZTDZ6a+C7dCyHXdXKuhAIodxbcuRqM9UAS0invLMIT7FJaiA+sDkOFZSuooGlYZKHe2VgZ9ZqC8sOZRGkXw==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 165.204.84.17) smtp.rcpttodomain=dpdk.org smtp.mailfrom=amd.com; dmarc=pass\n (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com;\n dkim=none (message not signed); arc=none (0)", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=NlGTlwh/Ra902MR98IWmuBAbYP/wNGTMpEPqcpjqqVE=;\n b=GvB1Op7AgLB4TjhcBopXTLxtVeo0iAq3jHt44hEEZIyjgi8sbZPmsOsX01e1E4TTD9qijW/eVITm/SoaIy2/PDLAm4e3lcLoh896xRW0c3MLToMpaCjWd0wP5oRmMsZlBom4RgSD8dRvt3suKph47hq/ZoTMit/Nn3ntvsqOiLc=", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 165.204.84.17)\n smtp.mailfrom=amd.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=amd.com;", "Received-SPF": "Pass (protection.outlook.com: domain of amd.com designates\n 165.204.84.17 as permitted sender) receiver=protection.outlook.com;\n client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C", "From": "Andrew Boyer <andrew.boyer@amd.com>", "To": "<dev@dpdk.org>", "CC": "Andrew Boyer <andrew.boyer@amd.com>", "Subject": "[PATCH v2 9/9] crypto/ionic: add stats support", "Date": "Tue, 30 Apr 2024 13:21:44 -0700", "Message-ID": "<20240430202144.49899-10-andrew.boyer@amd.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20240430202144.49899-1-andrew.boyer@amd.com>", "References": "<20240419195310.21432-1-andrew.boyer@amd.com>\n <20240430202144.49899-1-andrew.boyer@amd.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.180.168.240]", "X-ClientProxiedBy": "SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com\n (10.181.40.145)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "SN1PEPF00026369:EE_|DS0PR12MB9399:EE_", "X-MS-Office365-Filtering-Correlation-Id": "5c2ea0d5-7483-42bc-30d6-08dc6953394b", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230031|376005|82310400014|36860700004|1800799015;", "X-Microsoft-Antispam-Message-Info": "\n ejh1ktY3Ce9cW48cCw74rGwiMigHWYAnZyEhYvOGpETZJq4jolHIvJvcaw64pRSqwAoRQXsfdxf86SGoJvKwHlVnjdoNcLDVRVcEuWqypEsrS347oEIZUxJnGhnz7PqbJQ7vYFy3RtLiEYQNHldi3mITgsSx2IRlWvZpOhl2g2T85z1vu7y8HL6NMMtlmwFeSL+fxwEKAgYErkPTXr5JivyUI/VYeX0bCOWBTj7lwrj5GVPqJr66XJQ+pkGSXSrwMJTOmUfC8rwfx0A8uydC8StiBozDpozYqBxbkHrQzRgxaUVykr3F9kee3O8/2PdJTA6nvoAQQjiorsvAvoVgQ/rKf5QTHG0FXUK/He4muufKPJsnTY+4yZWsPExfRa449grHrpQaj6VUTmXXF7SYj97572AsBfsz/eNKp1yFQcZu3+5cV5/qf0E0sHDDw1meG7vUDWQkdxpVfukEfLnW/emc6ZM+GpI4h7Mxjht9fnjHAXh5JD9gEZfQnLkkKf/VtzD9pVeJygzuWhLHt5Tpmmx2YQj+MXW52xjN5JC/PcMH0pS+71jlai3uHi0OVV4v3uysL8HKqUdy1Lxmo3yyE1epUsiV3LKpFOBj8ZJoJUdRh+HIn5x3PA+vMzyqEhAwQ3P6lHjYneY6Z5fKa7SZ9ZXtEZIw82Cg1bBqNqn0mRHymaQX1ZlmemLLY09eQDuqef42emBZm85TQ+yGFOPghY1Fhl7tqZZ9bifjtXcFjWeXuIcP/N8JVB/R05sXVhI783IDep5BotCvcJnJ6CuQ5FQY8N8XogAiITMkV/mpCV3pY7SCh1jt2Aew10wsV2+j4FUbhEdwR6tijMnSTgtJLkePDG6X1MHQ7sxzIfe131tp10Yx7bwcZwiAG3TwDLPouSkDf3SPS90H4vPUtpgTChfAmIYx4tfxkJVTNxtnbtu+KrPQlY3DpmtNsQiLsaK8flh2ilgHP3mn4yVEmF3OZrgcqA8uoqS/WZLd/5GP3oCnH/91QuBDUnevvvCsocGDUsImhnC8eXEWfgi1CweCfdqttp1lHr0HSc9JXkTgiFW6kAykFdFVjq6D1AZgZAtuQX3UtcatXFt4yF4d9nXQx+w8sLJpV2vwk3RcvWzaxSE47lDG654Dbj22As+Vk6woMKFvkg21o7wzjhzWrCbClL4fVGSrPLTpmilo5vsKBGL0UFBzwpaJOoZVjtJclsqlYK1OdBP2ROEmVxXca9BZ7M9hn3/M2WU5I7Lm294hGgchcbCUISyId6BvtkxJza6NqbPpbpSIYFJuyIBo1We2MMUoAZQ737rc7suesNv6SJZTIzwc1eAWylUFykpu9W9Xjn2EgAkFQ71/39lm51KhgfUlvBLWEtApoZNdhgM5EQ8=", "X-Forefront-Antispam-Report": "CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE;\n SFS:(13230031)(376005)(82310400014)(36860700004)(1800799015); DIR:OUT;\n SFP:1101;", "X-OriginatorOrg": "amd.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Apr 2024 20:22:14.3573 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 5c2ea0d5-7483-42bc-30d6-08dc6953394b", "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];\n Helo=[SATLEXMB04.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n SN1PEPF00026369.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DS0PR12MB9399", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This defines the stats handlers and exposes them to the stack.\n\nSigned-off-by: Andrew Boyer <andrew.boyer@amd.com>\n---\n drivers/crypto/ionic/ionic_crypto.h | 8 ++++\n drivers/crypto/ionic/ionic_crypto_main.c | 48 ++++++++++++++++++++++++\n drivers/crypto/ionic/ionic_crypto_ops.c | 33 +++++++++++++++-\n 3 files changed, 87 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/crypto/ionic/ionic_crypto.h b/drivers/crypto/ionic/ionic_crypto.h\nindex 69c17887fb..db87ea0490 100644\n--- a/drivers/crypto/ionic/ionic_crypto.h\n+++ b/drivers/crypto/ionic/ionic_crypto.h\n@@ -174,6 +174,8 @@ struct iocpt_crypto_q {\n \tuint16_t flags;\n \n \t/* cacheline3 */\n+\tstruct rte_cryptodev_stats stats;\n+\n \tuint64_t enqueued_wdogs;\n \tuint64_t dequeued_wdogs;\n \tuint8_t wdog_iv[IOCPT_Q_WDOG_IV_LEN];\n@@ -252,6 +254,8 @@ struct iocpt_dev {\n \n \tstruct iocpt_qtype_info qtype_info[IOCPT_QTYPE_MAX];\n \tuint8_t qtype_ver[IOCPT_QTYPE_MAX];\n+\n+\tstruct rte_cryptodev_stats stats_base;\n };\n \n struct iocpt_dev_intf {\n@@ -313,6 +317,10 @@ typedef bool (*iocpt_cq_cb)(struct iocpt_cq *cq, uint16_t cq_desc_index,\n uint32_t iocpt_cq_service(struct iocpt_cq *cq, uint32_t work_to_do,\n \tiocpt_cq_cb cb, void *cb_arg);\n \n+void iocpt_get_stats(const struct iocpt_dev *dev,\n+\tstruct rte_cryptodev_stats *stats);\n+void iocpt_reset_stats(struct iocpt_dev *dev);\n+\n static inline uint16_t\n iocpt_q_space_avail(struct iocpt_queue *q)\n {\ndiff --git a/drivers/crypto/ionic/ionic_crypto_main.c b/drivers/crypto/ionic/ionic_crypto_main.c\nindex 113347c57a..0685ddd457 100644\n--- a/drivers/crypto/ionic/ionic_crypto_main.c\n+++ b/drivers/crypto/ionic/ionic_crypto_main.c\n@@ -128,6 +128,52 @@ iocpt_q_free(struct iocpt_queue *q)\n \t}\n }\n \n+static void\n+iocpt_get_abs_stats(const struct iocpt_dev *dev,\n+\t\tstruct rte_cryptodev_stats *stats)\n+{\n+\tuint32_t i;\n+\n+\tmemset(stats, 0, sizeof(*stats));\n+\n+\t/* Sum up the per-queue stats counters */\n+\tfor (i = 0; i < dev->crypto_dev->data->nb_queue_pairs; i++) {\n+\t\tstruct rte_cryptodev_stats *q_stats = &dev->cryptoqs[i]->stats;\n+\n+\t\tstats->enqueued_count += q_stats->enqueued_count;\n+\t\tstats->dequeued_count += q_stats->dequeued_count;\n+\t\tstats->enqueue_err_count += q_stats->enqueue_err_count;\n+\t\tstats->dequeue_err_count += q_stats->dequeue_err_count;\n+\t}\n+}\n+\n+void\n+iocpt_get_stats(const struct iocpt_dev *dev, struct rte_cryptodev_stats *stats)\n+{\n+\t/* Retrieve the new absolute stats values */\n+\tiocpt_get_abs_stats(dev, stats);\n+\n+\t/* Subtract the base stats values to get relative values */\n+\tstats->enqueued_count -= dev->stats_base.enqueued_count;\n+\tstats->dequeued_count -= dev->stats_base.dequeued_count;\n+\tstats->enqueue_err_count -= dev->stats_base.enqueue_err_count;\n+\tstats->dequeue_err_count -= dev->stats_base.dequeue_err_count;\n+}\n+\n+void\n+iocpt_reset_stats(struct iocpt_dev *dev)\n+{\n+\tuint32_t i;\n+\n+\t/* Erase the per-queue stats counters */\n+\tfor (i = 0; i < dev->crypto_dev->data->nb_queue_pairs; i++)\n+\t\tmemset(&dev->cryptoqs[i]->stats, 0,\n+\t\t\tsizeof(dev->cryptoqs[i]->stats));\n+\n+\t/* Update the base stats values */\n+\tiocpt_get_abs_stats(dev, &dev->stats_base);\n+}\n+\n static int\n iocpt_session_write(struct iocpt_session_priv *priv,\n \t\tenum iocpt_sess_control_oper oper)\n@@ -669,6 +715,8 @@ iocpt_init(struct iocpt_dev *dev)\n {\n \tint err;\n \n+\tmemset(&dev->stats_base, 0, sizeof(dev->stats_base));\n+\n \t/* Uses dev_cmds */\n \terr = iocpt_dev_init(dev, dev->info_pa);\n \tif (err != 0)\ndiff --git a/drivers/crypto/ionic/ionic_crypto_ops.c b/drivers/crypto/ionic/ionic_crypto_ops.c\nindex 0330fd76ad..839bbf69d1 100644\n--- a/drivers/crypto/ionic/ionic_crypto_ops.c\n+++ b/drivers/crypto/ionic/ionic_crypto_ops.c\n@@ -65,6 +65,23 @@ iocpt_op_info_get(struct rte_cryptodev *cdev, struct rte_cryptodev_info *info)\n \tinfo->min_mbuf_tailroom_req = 0;\n }\n \n+static void\n+iocpt_op_stats_get(struct rte_cryptodev *cdev,\n+\t\tstruct rte_cryptodev_stats *stats)\n+{\n+\tstruct iocpt_dev *dev = cdev->data->dev_private;\n+\n+\tiocpt_get_stats(dev, stats);\n+}\n+\n+static void\n+iocpt_op_stats_reset(struct rte_cryptodev *cdev)\n+{\n+\tstruct iocpt_dev *dev = cdev->data->dev_private;\n+\n+\tiocpt_reset_stats(dev);\n+}\n+\n static int\n iocpt_op_queue_release(struct rte_cryptodev *cdev, uint16_t queue_id)\n {\n@@ -350,6 +367,7 @@ iocpt_enqueue_sym(void *qp, struct rte_crypto_op **ops, uint16_t nb_ops)\n \tstruct iocpt_crypto_q *cptq = qp;\n \tstruct rte_crypto_op *op;\n \tstruct iocpt_session_priv *priv;\n+\tstruct rte_cryptodev_stats *stats = &cptq->stats;\n \tuint16_t avail, count;\n \tint err;\n \n@@ -375,6 +393,7 @@ iocpt_enqueue_sym(void *qp, struct rte_crypto_op **ops, uint16_t nb_ops)\n \t\terr = iocpt_enq_one_aead(cptq, priv, op);\n \t\tif (unlikely(err != 0)) {\n \t\t\top->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;\n+\t\t\tstats->enqueue_err_count++;\n \t\t\tbreak;\n \t\t}\n \n@@ -386,6 +405,8 @@ iocpt_enqueue_sym(void *qp, struct rte_crypto_op **ops, uint16_t nb_ops)\n \n \t\t/* Restart timer if ops are being enqueued */\n \t\tcptq->last_wdog_cycles = rte_get_timer_cycles();\n+\n+\t\tstats->enqueued_count += count;\n \t}\n \n \treturn count;\n@@ -439,8 +460,8 @@ iocpt_enqueue_wdog(struct iocpt_crypto_q *cptq)\n \tq->info[q->head_idx] = wdog_op;\n \tq->head_idx = Q_NEXT_TO_POST(q, 1);\n \n-\tIOCPT_PRINT(DEBUG, \"Queue %u wdog enq %p\",\n-\t\tq->index, wdog_op);\n+\tIOCPT_PRINT(DEBUG, \"Queue %u wdog enq %p ops %\"PRIu64,\n+\t\tq->index, wdog_op, cptq->stats.enqueued_count);\n \tcptq->enqueued_wdogs++;\n \n out_flush:\n@@ -456,6 +477,7 @@ iocpt_dequeue_sym(void *qp, struct rte_crypto_op **ops, uint16_t nb_ops)\n \tstruct rte_crypto_op *op;\n \tstruct iocpt_crypto_comp *cq_desc_base = cq->base;\n \tvolatile struct iocpt_crypto_comp *cq_desc;\n+\tstruct rte_cryptodev_stats *stats = &cptq->stats;\n \tuint64_t then, now, hz, delta;\n \tuint16_t count = 0;\n \n@@ -515,6 +537,9 @@ iocpt_dequeue_sym(void *qp, struct rte_crypto_op **ops, uint16_t nb_ops)\n \t\t\tcontinue;\n \t\t}\n \n+\t\tif (unlikely(op->status != RTE_CRYPTO_OP_STATUS_SUCCESS))\n+\t\t\tstats->dequeue_err_count++;\n+\n \t\tops[count] = op;\n \t\tq->info[q->tail_idx] = NULL;\n \n@@ -542,6 +567,8 @@ iocpt_dequeue_sym(void *qp, struct rte_crypto_op **ops, uint16_t nb_ops)\n \t\t/* Restart timer if the queue is making progress */\n \t\tcptq->last_wdog_cycles = rte_get_timer_cycles();\n \n+\tstats->dequeued_count += count;\n+\n \treturn count;\n }\n \n@@ -552,6 +579,8 @@ static struct rte_cryptodev_ops iocpt_ops = {\n \t.dev_close = iocpt_op_close,\n \t.dev_infos_get = iocpt_op_info_get,\n \n+\t.stats_get = iocpt_op_stats_get,\n+\t.stats_reset = iocpt_op_stats_reset,\n \t.queue_pair_setup = iocpt_op_queue_setup,\n \t.queue_pair_release = iocpt_op_queue_release,\n \n", "prefixes": [ "v2", "9/9" ] }