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GET /api/patches/139732/?format=api
{ "id": 139732, "url": "http://patches.dpdk.org/api/patches/139732/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240430095523.108688-5-mattias.ronnblom@ericsson.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240430095523.108688-5-mattias.ronnblom@ericsson.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240430095523.108688-5-mattias.ronnblom@ericsson.com", "date": "2024-04-30T09:55:21", "name": "[RFC,v4,4/6] eal: add unit tests for exactly-once bit access functions", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "66673a3a3022be4f7533ffe2d48d8a83ed1a3908", "submitter": { "id": 1077, "url": "http://patches.dpdk.org/api/people/1077/?format=api", "name": "Mattias Rönnblom", "email": "mattias.ronnblom@ericsson.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240430095523.108688-5-mattias.ronnblom@ericsson.com/mbox/", "series": [ { "id": 31842, "url": "http://patches.dpdk.org/api/series/31842/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31842", "date": "2024-04-30T09:55:17", "name": "Improve EAL bit operations API", "version": 4, "mbox": "http://patches.dpdk.org/series/31842/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/139732/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/139732/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C385F43F3A;\n\tTue, 30 Apr 2024 12:06:54 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7A4FE4064A;\n\tTue, 30 Apr 2024 12:06:04 +0200 (CEST)", "from EUR01-VE1-obe.outbound.protection.outlook.com\n (mail-ve1eur01on2054.outbound.protection.outlook.com [40.107.14.54])\n by mails.dpdk.org (Postfix) with ESMTP id DC08F402EB\n for <dev@dpdk.org>; Tue, 30 Apr 2024 12:06:01 +0200 (CEST)", "from DUZPR01CA0236.eurprd01.prod.exchangelabs.com\n (2603:10a6:10:4b5::15) by AS2PR07MB9328.eurprd07.prod.outlook.com\n (2603:10a6:20b:608::7) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7519.34; Tue, 30 Apr\n 2024 10:05:57 +0000", "from DB3PEPF0000885A.eurprd02.prod.outlook.com\n (2603:10a6:10:4b5:cafe::8f) by DUZPR01CA0236.outlook.office365.com\n (2603:10a6:10:4b5::15) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7519.34 via Frontend\n Transport; Tue, 30 Apr 2024 10:05:54 +0000", "from oa.msg.ericsson.com (192.176.1.74) by\n DB3PEPF0000885A.mail.protection.outlook.com (10.167.242.5) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.7544.18 via Frontend Transport; Tue, 30 Apr 2024 10:05:54 +0000", "from seliicinfr00050.seli.gic.ericsson.se (153.88.142.248) by\n smtp-central.internal.ericsson.com (100.87.178.69) with Microsoft SMTP Server\n id 15.2.1544.9; Tue, 30 Apr 2024 12:05:53 +0200", "from breslau.. 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helo=oa.msg.ericsson.com; pr=C", "From": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>", "To": "<dev@dpdk.org>", "CC": "<hofors@lysator.liu.se>, Heng Wang <heng.wang@ericsson.com>,\n \"Stephen Hemminger\" <stephen@networkplumber.org>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>,\n =?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>, =?utf-8?q?Mattia?=\n\t=?utf-8?q?s_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>", "Subject": "[RFC v4 4/6] eal: add unit tests for exactly-once bit access\n functions", "Date": "Tue, 30 Apr 2024 11:55:21 +0200", "Message-ID": "<20240430095523.108688-5-mattias.ronnblom@ericsson.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20240430095523.108688-1-mattias.ronnblom@ericsson.com>", "References": "<20240429095138.106849-2-mattias.ronnblom@ericsson.com>\n <20240430095523.108688-1-mattias.ronnblom@ericsson.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"UTF-8\"", "Content-Transfer-Encoding": "8bit", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DB3PEPF0000885A:EE_|AS2PR07MB9328:EE_", "X-MS-Office365-Filtering-Correlation-Id": "bf57ba10-05dc-4358-48ab-08dc68fd1f7d", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230031|82310400014|376005|1800799015|36860700004;", "X-Microsoft-Antispam-Message-Info": "=?utf-8?q?gWdEAwWmhcWRfaK43feQhpIgW2PZG7d?=\n\t=?utf-8?q?9IUdjf4fNYvaX/Op+1OnJqIjKbiRqFxigED6hzvwFXgZZxCgZZYubNyv0/Anozs2R?=\n\t=?utf-8?q?8CtNFAFbI3oLf5nqw2RNxjtMb0+rCNgrfN2CVWDJcgBkoOLs+02qx6l6LinD1ayBV?=\n\t=?utf-8?q?URa3eI8jtJELotuYa415xmlJ6bO/+uAK4EAVPDaw2odafNQcb2KBE23dBJCFqduEl?=\n\t=?utf-8?q?YP6JfHfP2fWhKUjXsT9X9EyA15MY2/SzaIerUjiT0XroVhjUhU+x3pXqq1ZDJobA8?=\n\t=?utf-8?q?M4MSSMOMLTTlYrqNj3IfvtsPBjKo9TS99lV83wUx3rYtjTFnpqwT29usE2nl2j5/M?=\n\t=?utf-8?q?PMgGepxA3XNittdebQsUUL4gEyS1RWPjQS8YhdtCuPCY18tPYmGH5HS8V39r3iF9d?=\n\t=?utf-8?q?k3aWzfyOppcVgb17RFMYa1Mve1VHUV6tIIj8HxEfXEAbflsONjiFsaxHSMNDJZ9ht?=\n\t=?utf-8?q?mogFqUy4zNemmLpx+Dj34CGL94/p6aPIqWQnG3vAwSCCcTyxg1YcOtOdhFbnjYfX2?=\n\t=?utf-8?q?WGEnK/wkcai2QsFQ6Iz0TkV+D8baSz4xBSpqs5YtUm/NpuBRt4XU6QvEDByvblRQw?=\n\t=?utf-8?q?/7WO0NIu3iYT1chxQIiuKjH/NA+45QEQJRQVBafs9iAFuGTNIWRVFHzq8REMS1zO5?=\n\t=?utf-8?q?MNg34VPq90TMVn2YcRa15NUcKsw1Yeh0wnvL+LWVhvoSfClBfHM5+S7vPmh6dNmCt?=\n\t=?utf-8?q?ST4hJtKxlxhHOSangE8sSxO5XfsGElYoxn9x0/7kuvYa5W5By3R9G0wV9c8deevvT?=\n\t=?utf-8?q?Es9mJoPzTUTQi/P9sOitdV/9UL6m5DGqm9wxP2wJ8txiIWWftSZyyWFWiQvZodaY5?=\n\t=?utf-8?q?rdWOqkDxFiLNB8BB5hCC3bRGGYQb2F/jL5zhMANB+/FW08KOIA2rAxMVh28qOsEnZ?=\n\t=?utf-8?q?gfyq+wXvewL6bNK1jpIQ9XasnFhLzQ7WDXqFp7+kv10EhUynmYIZuwdYxKzyTdHZo?=\n\t=?utf-8?q?XfXHkslYHeIMSUfsq5d5nLWF8JaOyuDHcBfBFjYewG+1tRTMQuo5CfRBcl3e8ADhY?=\n\t=?utf-8?q?qhtDYI2xFubG9EiFSv99SpF2Q4EPPgm5WDmCvpbNjYfi8LxTA2XgJ0XCMXhe/9bI/?=\n\t=?utf-8?q?+LpR86WK3tNY36tMsKOZVpTidMdV6QJ1fGCRyhHbI5n8TSVbqC8QuI57G+5ByMASy?=\n\t=?utf-8?q?g2LfvkPMVz+0fveD7jll8YbMY8IwSGeAa7TBOmHHMHGCdXwlOHYZske9i9E728Jlj?=\n\t=?utf-8?q?tbEv0K8i6mO9V/bzaU9bMyamAcCOePX1n/CrL1Cbb9WiPhuO2WGI+6xbG5XzzMeuL?=\n\t=?utf-8?q?MIf7WI7OHujXnIEtP9Vy13Pc2dbkFRlueTzgA32n36x7UK5nXR7i189upcLJBaE8Q?=\n\t=?utf-8?q?uV7gyACqrQ5t?=", "X-Forefront-Antispam-Report": "CIP:192.176.1.74; CTRY:SE; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:oa.msg.ericsson.com; PTR:office365.se.ericsson.net;\n CAT:NONE; SFS:(13230031)(82310400014)(376005)(1800799015)(36860700004);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "ericsson.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Apr 2024 10:05:54.3305 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n bf57ba10-05dc-4358-48ab-08dc68fd1f7d", "X-MS-Exchange-CrossTenant-Id": "92e84ceb-fbfd-47ab-be52-080c6b87953f", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=92e84ceb-fbfd-47ab-be52-080c6b87953f; Ip=[192.176.1.74];\n Helo=[oa.msg.ericsson.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DB3PEPF0000885A.eurprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AS2PR07MB9328", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Extend bitops tests to cover the\nrte_bit_once_[set|clear|assign|test]() family of functions.\n\nRFC v4:\n * Remove redundant continuations.\n\nSigned-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>\nAcked-by: Morten Brørup <mb@smartsharesystems.com>\nAcked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n app/test/test_bitops.c | 10 +\n lib/eal/include/rte_bitops.h | 425 +++++++++++++++++++++++++++++++++++\n 2 files changed, 435 insertions(+)", "diff": "diff --git a/app/test/test_bitops.c b/app/test/test_bitops.c\nindex 111f9b328e..615ec6e563 100644\n--- a/app/test/test_bitops.c\n+++ b/app/test/test_bitops.c\n@@ -56,6 +56,14 @@ GEN_TEST_BIT_ACCESS(test_bit_access32, rte_bit_set, rte_bit_clear,\n GEN_TEST_BIT_ACCESS(test_bit_access64, rte_bit_set, rte_bit_clear,\n \t\t rte_bit_assign, rte_bit_flip, rte_bit_test, 64)\n \n+GEN_TEST_BIT_ACCESS(test_bit_once_access32, rte_bit_once_set,\n+\t\t rte_bit_once_clear, rte_bit_once_assign,\n+\t\t rte_bit_once_flip, rte_bit_once_test, 32)\n+\n+GEN_TEST_BIT_ACCESS(test_bit_once_access64, rte_bit_once_set,\n+\t\t rte_bit_once_clear, rte_bit_once_assign,\n+\t\t rte_bit_once_flip, rte_bit_once_test, 64)\n+\n static uint32_t val32;\n static uint64_t val64;\n \n@@ -172,6 +180,8 @@ static struct unit_test_suite test_suite = {\n \t.unit_test_cases = {\n \t\tTEST_CASE(test_bit_access32),\n \t\tTEST_CASE(test_bit_access64),\n+\t\tTEST_CASE(test_bit_once_access32),\n+\t\tTEST_CASE(test_bit_once_access64),\n \t\tTEST_CASE(test_bit_relaxed_set),\n \t\tTEST_CASE(test_bit_relaxed_clear),\n \t\tTEST_CASE(test_bit_relaxed_test_set_clear),\ndiff --git a/lib/eal/include/rte_bitops.h b/lib/eal/include/rte_bitops.h\nindex f77bd83e97..abfe96d531 100644\n--- a/lib/eal/include/rte_bitops.h\n+++ b/lib/eal/include/rte_bitops.h\n@@ -21,6 +21,7 @@\n \n #include <rte_compat.h>\n #include <rte_debug.h>\n+#include <rte_stdatomic.h>\n \n #ifdef __cplusplus\n extern \"C\" {\n@@ -395,6 +396,199 @@ extern \"C\" {\n \t\t uint32_t *: __rte_bit_once_flip32,\t\t\\\n \t\t uint64_t *: __rte_bit_once_flip64)(addr, nr)\n \n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Test if a particular bit in a word is set with a particular memory\n+ * order.\n+ *\n+ * Test a bit with the resulting memory load ordered as per the\n+ * specified memory order.\n+ *\n+ * @param addr\n+ * A pointer to the word to query.\n+ * @param nr\n+ * The index of the bit.\n+ * @param memory_order\n+ * The memory order to use. See <rte_stdatomics.h> for details.\n+ * @return\n+ * Returns true if the bit is set, and false otherwise.\n+ */\n+#define rte_bit_atomic_test(addr, nr, memory_order)\t\t\t\\\n+\t_Generic((addr),\t\t\t\t\t\t\\\n+\t\t uint32_t *: __rte_bit_atomic_test32,\t\t\t\\\n+\t\t uint64_t *: __rte_bit_atomic_test64)(addr, nr, memory_order)\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Atomically set bit in word.\n+ *\n+ * Atomically set bit specified by @c nr in the word pointed to by @c\n+ * addr to '1', with the memory ordering as specified by @c\n+ * memory_order.\n+ *\n+ * @param addr\n+ * A pointer to the word to modify.\n+ * @param nr\n+ * The index of the bit.\n+ * @param memory_order\n+ * The memory order to use. See <rte_stdatomics.h> for details.\n+ */\n+#define rte_bit_atomic_set(addr, nr, memory_order)\t\t\t\\\n+\t_Generic((addr),\t\t\t\t\t\t\\\n+\t\t uint32_t *: __rte_bit_atomic_set32,\t\t\t\\\n+\t\t uint64_t *: __rte_bit_atomic_set64)(addr, nr, memory_order)\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Atomically clear bit in word.\n+ *\n+ * Atomically set bit specified by @c nr in the word pointed to by @c\n+ * addr to '0', with the memory ordering as specified by @c\n+ * memory_order.\n+ *\n+ * @param addr\n+ * A pointer to the word to modify.\n+ * @param nr\n+ * The index of the bit.\n+ * @param memory_order\n+ * The memory order to use. See <rte_stdatomics.h> for details.\n+ */\n+#define rte_bit_atomic_clear(addr, nr, memory_order)\t\t\t\\\n+\t_Generic((addr),\t\t\t\t\t\t\\\n+\t\t uint32_t *: __rte_bit_atomic_clear32,\t\t\t\\\n+\t\t uint64_t *: __rte_bit_atomic_clear64)(addr, nr, memory_order)\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Atomically assign a value to bit in word.\n+ *\n+ * Atomically set bit specified by @c nr in the word pointed to by @c\n+ * addr to the value indicated by @c value, with the memory ordering\n+ * as specified with @c memory_order.\n+ *\n+ * @param addr\n+ * A pointer to the word to modify.\n+ * @param nr\n+ * The index of the bit.\n+ * @param value\n+ * The new value of the bit - true for '1', or false for '0'.\n+ * @param memory_order\n+ * The memory order to use. See <rte_stdatomics.h> for details.\n+ */\n+#define rte_bit_atomic_assign(addr, nr, value, memory_order)\t\t\\\n+\t_Generic((addr),\t\t\t\t\t\t\\\n+\t\t uint32_t *: __rte_bit_atomic_assign32,\t\t\t\\\n+\t\t uint64_t *: __rte_bit_atomic_assign64)(addr, nr, value, \\\n+\t\t\t\t\t\t\tmemory_order)\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Atomically flip bit in word.\n+ *\n+ * Atomically negate the value of the bit specified by @c nr in the\n+ * word pointed to by @c addr to the value indicated by @c value, with\n+ * the memory ordering as specified with @c memory_order.\n+ *\n+ * @param addr\n+ * A pointer to the word to modify.\n+ * @param nr\n+ * The index of the bit.\n+ * @param memory_order\n+ * The memory order to use. See <rte_stdatomics.h> for details.\n+ */\n+#define rte_bit_atomic_flip(addr, nr, memory_order)\t\t\t\\\n+\t_Generic((addr),\t\t\t\t\t\t\\\n+\t\t uint32_t *: __rte_bit_atomic_flip32,\t\t\t\\\n+\t\t uint64_t *: __rte_bit_atomic_flip64)(addr, nr, memory_order)\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Atomically test and set a bit in word.\n+ *\n+ * Atomically test and set bit specified by @c nr in the word pointed\n+ * to by @c addr to '1', with the memory ordering as specified with @c\n+ * memory_order.\n+ *\n+ * @param addr\n+ * A pointer to the word to modify.\n+ * @param nr\n+ * The index of the bit.\n+ * @param memory_order\n+ * The memory order to use. See <rte_stdatomics.h> for details.\n+ * @return\n+ * Returns true if the bit was set, and false otherwise.\n+ */\n+#define rte_bit_atomic_test_and_set(addr, nr, memory_order)\t\t\\\n+\t_Generic((addr),\t\t\t\t\t\t\\\n+\t\t uint32_t *: __rte_bit_atomic_test_and_set32,\t\t\\\n+\t\t uint64_t *: __rte_bit_atomic_test_and_set64)(addr, nr,\t\\\n+\t\t\t\t\t\t\t memory_order)\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Atomically test and clear a bit in word.\n+ *\n+ * Atomically test and clear bit specified by @c nr in the word\n+ * pointed to by @c addr to '0', with the memory ordering as specified\n+ * with @c memory_order.\n+ *\n+ * @param addr\n+ * A pointer to the word to modify.\n+ * @param nr\n+ * The index of the bit.\n+ * @param memory_order\n+ * The memory order to use. See <rte_stdatomics.h> for details.\n+ * @return\n+ * Returns true if the bit was set, and false otherwise.\n+ */\n+#define rte_bit_atomic_test_and_clear(addr, nr, memory_order)\t\t\\\n+\t_Generic((addr),\t\t\t\t\t\t\\\n+\t\t uint32_t *: __rte_bit_atomic_test_and_clear32,\t\t\\\n+\t\t uint64_t *: __rte_bit_atomic_test_and_clear64)(addr, nr, \\\n+\t\t\t\t\t\t\t\tmemory_order)\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Atomically test and assign a bit in word.\n+ *\n+ * Atomically test and assign bit specified by @c nr in the word\n+ * pointed to by @c addr the value specified by @c value, with the\n+ * memory ordering as specified with @c memory_order.\n+ *\n+ * @param addr\n+ * A pointer to the word to modify.\n+ * @param nr\n+ * The index of the bit.\n+ * @param value\n+ * The new value of the bit - true for '1', or false for '0'.\n+ * @param memory_order\n+ * The memory order to use. See <rte_stdatomics.h> for details.\n+ * @return\n+ * Returns true if the bit was set, and false otherwise.\n+ */\n+#define rte_bit_atomic_test_and_assign(addr, nr, value, memory_order)\t\\\n+\t_Generic((addr),\t\t\t\t\t\t\\\n+\t\t uint32_t *: __rte_bit_atomic_test_and_assign32,\t\\\n+\t\t uint64_t *: __rte_bit_atomic_test_and_assign64)(addr, nr, \\\n+\t\t\t\t\t\t\t\t value, \\\n+\t\t\t\t\t\t\t\t memory_order)\n+\n #define __RTE_GEN_BIT_TEST(family, fun, qualifier, size)\t\t\\\n \t__rte_experimental\t\t\t\t\t\t\\\n \tstatic inline bool\t\t\t\t\t\t\\\n@@ -479,6 +673,162 @@ __RTE_GEN_BIT_CLEAR(once_, clear, volatile, 64)\n __RTE_GEN_BIT_ASSIGN(once_, assign, volatile, 64)\n __RTE_GEN_BIT_FLIP(once_, flip, volatile, 64)\n \n+#define __RTE_GEN_BIT_ATOMIC_TEST(size)\t\t\t\t\t\\\n+\t__rte_experimental\t\t\t\t\t\t\\\n+\tstatic inline bool\t\t\t\t\t\t\\\n+\t__rte_bit_atomic_test ## size(const uint ## size ## _t *addr,\t\\\n+\t\t\t\t unsigned int nr, int memory_order) \\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\tRTE_ASSERT(nr < size);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tconst RTE_ATOMIC(uint ## size ## _t) *a_addr =\t\t\\\n+\t\t\t(const RTE_ATOMIC(uint ## size ## _t) *)addr;\t\\\n+\t\tuint ## size ## _t mask = (uint ## size ## _t)1 << nr;\t\\\n+\t\treturn rte_atomic_load_explicit(a_addr, memory_order) & mask; \\\n+\t}\n+\n+#define __RTE_GEN_BIT_ATOMIC_SET(size)\t\t\t\t\t\\\n+\t__rte_experimental\t\t\t\t\t\t\\\n+\tstatic inline void\t\t\t\t\t\t\\\n+\t__rte_bit_atomic_set ## size(uint ## size ## _t *addr,\t\t\\\n+\t\t\t\t unsigned int nr, int memory_order)\t\\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\tRTE_ASSERT(nr < size);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tRTE_ATOMIC(uint ## size ## _t) *a_addr =\t\t\\\n+\t\t\t(RTE_ATOMIC(uint ## size ## _t) *)addr;\t\t\\\n+\t\tuint ## size ## _t mask = (uint ## size ## _t)1 << nr;\t\\\n+\t\trte_atomic_fetch_or_explicit(a_addr, mask, memory_order); \\\n+\t}\n+\n+#define __RTE_GEN_BIT_ATOMIC_CLEAR(size)\t\t\t\t\\\n+\t__rte_experimental\t\t\t\t\t\t\\\n+\tstatic inline void\t\t\t\t\t\t\\\n+\t__rte_bit_atomic_clear ## size(uint ## size ## _t *addr,\t\\\n+\t\t\t\t unsigned int nr, int memory_order) \\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\tRTE_ASSERT(nr < size);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tRTE_ATOMIC(uint ## size ## _t) *a_addr =\t\t\\\n+\t\t\t(RTE_ATOMIC(uint ## size ## _t) *)addr;\t\t\\\n+\t\tuint ## size ## _t mask = (uint ## size ## _t)1 << nr;\t\\\n+\t\trte_atomic_fetch_and_explicit(a_addr, ~mask, memory_order); \\\n+\t}\n+\n+#define __RTE_GEN_BIT_ATOMIC_ASSIGN(size)\t\t\t\t\\\n+\t__rte_experimental\t\t\t\t\t\t\\\n+\tstatic inline void\t\t\t\t\t\t\\\n+\t__rte_bit_atomic_assign ## size(uint ## size ## _t *addr,\t\\\n+\t\t\t\t\tunsigned int nr, bool value,\t\\\n+\t\t\t\t\tint memory_order)\t\t\\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\tif (value)\t\t\t\t\t\t\\\n+\t\t\t__rte_bit_atomic_set ## size(addr, nr, memory_order); \\\n+\t\telse\t\t\t\t\t\t\t\\\n+\t\t\t__rte_bit_atomic_clear ## size(addr, nr,\t\\\n+\t\t\t\t\t\t memory_order);\t\\\n+\t}\n+\n+#define __RTE_GEN_BIT_ATOMIC_TEST_AND_ASSIGN(size)\t\t\t\\\n+\t__rte_experimental\t\t\t\t\t\t\\\n+\tstatic inline bool\t\t\t\t\t\t\\\n+\t__rte_bit_atomic_test_and_assign ## size(uint ## size ## _t *addr, \\\n+\t\t\t\t\t\t unsigned int nr,\t\\\n+\t\t\t\t\t\t bool value,\t\t\\\n+\t\t\t\t\t\t int memory_order)\t\\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\tRTE_ASSERT(nr < size);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tRTE_ATOMIC(uint ## size ## _t) *a_addr =\t\t\\\n+\t\t\t(RTE_ATOMIC(uint ## size ## _t) *)addr;\t\t\\\n+\t\tuint ## size ## _t before;\t\t\t\t\\\n+\t\tuint ## size ## _t target;\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tbefore = rte_atomic_load_explicit(a_addr,\t\t\\\n+\t\t\t\t\t\t rte_memory_order_relaxed); \\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tdo {\t\t\t\t\t\t\t\\\n+\t\t\ttarget = before;\t\t\t\t\\\n+\t\t\t__rte_bit_assign ## size(&target, nr, value);\t\\\n+\t\t} while (!rte_atomic_compare_exchange_weak_explicit(\t\\\n+\t\t\t\ta_addr, &before, target,\t\t\\\n+\t\t\t\trte_memory_order_relaxed,\t\t\\\n+\t\t\t\tmemory_order));\t\t\t\t\\\n+\t\treturn __rte_bit_test ## size(&before, nr);\t\t\\\n+\t}\n+\n+#define __RTE_GEN_BIT_ATOMIC_FLIP(size)\t\t\t\t\t\\\n+\t__rte_experimental\t\t\t\t\t\t\\\n+\tstatic inline void\t\t\t\t\t\t\\\n+\t__rte_bit_atomic_flip ## size(uint ## size ## _t *addr,\t\t\\\n+\t\t\t\t unsigned int nr, int memory_order) \\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\tRTE_ASSERT(nr < size);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tRTE_ATOMIC(uint ## size ## _t) *a_addr =\t\t\\\n+\t\t\t(RTE_ATOMIC(uint ## size ## _t) *)addr;\t\t\\\n+\t\tuint ## size ## _t before;\t\t\t\t\\\n+\t\tuint ## size ## _t target;\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tbefore = rte_atomic_load_explicit(a_addr,\t\t\\\n+\t\t\t\t\t\t rte_memory_order_relaxed); \\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tdo {\t\t\t\t\t\t\t\\\n+\t\t\ttarget = before;\t\t\t\t\\\n+\t\t\t__rte_bit_flip ## size(&target, nr);\t\t\\\n+\t\t} while (!rte_atomic_compare_exchange_weak_explicit(\t\\\n+\t\t\t\ta_addr, &before, target,\t\t\\\n+\t\t\t\trte_memory_order_relaxed,\t\t\\\n+\t\t\t\tmemory_order));\t\t\t\t\\\n+\t}\n+\n+#define __RTE_GEN_BIT_ATOMIC_OPS(size)\t\t\t\\\n+\t__RTE_GEN_BIT_ATOMIC_TEST(size)\t\t\t\\\n+\t__RTE_GEN_BIT_ATOMIC_SET(size)\t\t\t\\\n+\t__RTE_GEN_BIT_ATOMIC_CLEAR(size)\t\t\\\n+\t__RTE_GEN_BIT_ATOMIC_ASSIGN(size)\t\t\\\n+\t__RTE_GEN_BIT_ATOMIC_TEST_AND_ASSIGN(size)\t\\\n+\t__RTE_GEN_BIT_ATOMIC_FLIP(size)\n+\n+__RTE_GEN_BIT_ATOMIC_OPS(32)\n+__RTE_GEN_BIT_ATOMIC_OPS(64)\n+\n+__rte_experimental\n+static inline bool\n+__rte_bit_atomic_test_and_set32(uint32_t *addr, unsigned int nr,\n+\t\t\t int memory_order)\n+{\n+\treturn __rte_bit_atomic_test_and_assign32(addr, nr, true,\n+\t\t\t\t\t\t memory_order);\n+}\n+\n+__rte_experimental\n+static inline bool\n+__rte_bit_atomic_test_and_clear32(uint32_t *addr, unsigned int nr,\n+\t\t\t\tint memory_order)\n+{\n+\treturn __rte_bit_atomic_test_and_assign32(addr, nr, false,\n+\t\t\t\t\t\t memory_order);\n+}\n+\n+__rte_experimental\n+static inline bool\n+__rte_bit_atomic_test_and_set64(uint64_t *addr, unsigned int nr,\n+\t\t\t int memory_order)\n+{\n+\treturn __rte_bit_atomic_test_and_assign64(addr, nr, true,\n+\t\t\t\t\t\t memory_order);\n+}\n+\n+__rte_experimental\n+static inline bool\n+__rte_bit_atomic_test_and_clear64(uint64_t *addr, unsigned int nr,\n+\t\t\t int memory_order)\n+{\n+\treturn __rte_bit_atomic_test_and_assign64(addr, nr, false,\n+\t\t\t\t\t\t memory_order);\n+}\n+\n /*------------------------ 32-bit relaxed operations ------------------------*/\n \n /**\n@@ -1180,6 +1530,14 @@ rte_log2_u64(uint64_t v)\n #undef rte_bit_once_assign\n #undef rte_bit_once_flip\n \n+#undef rte_bit_atomic_test\n+#undef rte_bit_atomic_set\n+#undef rte_bit_atomic_clear\n+#undef rte_bit_atomic_assign\n+#undef rte_bit_atomic_test_and_set\n+#undef rte_bit_atomic_test_and_clear\n+#undef rte_bit_atomic_test_and_assign\n+\n #define __RTE_BIT_OVERLOAD_SZ_2(fun, qualifier, size, arg1_type, arg1_name) \\\n \tstatic inline void\t\t\t\t\t\t\\\n \trte_bit_ ## fun(qualifier uint ## size ## _t *addr,\t\t\\\n@@ -1223,6 +1581,59 @@ rte_log2_u64(uint64_t v)\n \t__RTE_BIT_OVERLOAD_SZ_3(fun, qualifier, 64, arg1_type, arg1_name, \\\n \t\t\t\targ2_type, arg2_name)\n \n+#define __RTE_BIT_OVERLOAD_SZ_3R(fun, qualifier, size, ret_type, arg1_type, \\\n+\t\t\t\t arg1_name, arg2_type, arg2_name)\t\\\n+\tstatic inline ret_type\t\t\t\t\t\t\\\n+\trte_bit_ ## fun(uint ## size ## _t *addr, arg1_type arg1_name,\t\\\n+\t\t\targ2_type arg2_name)\t\t\t\t\\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\treturn __rte_bit_ ## fun ## size(addr, arg1_name, arg2_name); \\\n+\t}\n+\n+#define __RTE_BIT_OVERLOAD_3R(fun, qualifier, ret_type, arg1_type, arg1_name, \\\n+\t\t\t arg2_type, arg2_name)\t\t\t\\\n+\t__RTE_BIT_OVERLOAD_SZ_3R(fun, qualifier, 32, ret_type, arg1_type, \\\n+\t\t\t\t arg1_name, arg2_type, arg2_name)\t\\\n+\t__RTE_BIT_OVERLOAD_SZ_3R(fun, qualifier, 64, ret_type, arg1_type, \\\n+\t\t\t\t arg1_name, arg2_type, arg2_name)\n+\n+#define __RTE_BIT_OVERLOAD_SZ_4(fun, qualifier, size, arg1_type, arg1_name, \\\n+\t\t\t\targ2_type, arg2_name, arg3_type, arg3_name) \\\n+\tstatic inline void\t\t\t\t\t\t\\\n+\trte_bit_ ## fun(uint ## size ## _t *addr, arg1_type arg1_name,\t\\\n+\t\t\targ2_type arg2_name, arg3_type arg3_name)\t\\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\t__rte_bit_ ## fun ## size(addr, arg1_name, arg2_name,\t\\\n+\t\t\t\t\t arg3_name);\t\t \\\n+\t}\n+\n+#define __RTE_BIT_OVERLOAD_4(fun, qualifier, arg1_type, arg1_name, arg2_type, \\\n+\t\t\t arg2_name, arg3_type, arg3_name)\t\t\\\n+\t__RTE_BIT_OVERLOAD_SZ_4(fun, qualifier, 32, arg1_type, arg1_name, \\\n+\t\t\t\targ2_type, arg2_name, arg3_type, arg3_name) \\\n+\t__RTE_BIT_OVERLOAD_SZ_4(fun, qualifier, 64, arg1_type, arg1_name, \\\n+\t\t\t\targ2_type, arg2_name, arg3_type, arg3_name)\n+\n+#define __RTE_BIT_OVERLOAD_SZ_4R(fun, qualifier, size, ret_type, arg1_type, \\\n+\t\t\t\t arg1_name, arg2_type, arg2_name, arg3_type, \\\n+\t\t\t\t arg3_name)\t\t\t\t\\\n+\tstatic inline ret_type\t\t\t\t\t\t\\\n+\trte_bit_ ## fun(uint ## size ## _t *addr, arg1_type arg1_name,\t\\\n+\t\t\targ2_type arg2_name, arg3_type arg3_name)\t\\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\treturn __rte_bit_ ## fun ## size(addr, arg1_name, arg2_name, \\\n+\t\t\t\t\t\t arg3_name);\t\t\\\n+\t}\n+\n+#define __RTE_BIT_OVERLOAD_4R(fun, qualifier, ret_type, arg1_type, arg1_name, \\\n+\t\t\t arg2_type, arg2_name, arg3_type, arg3_name) \\\n+\t__RTE_BIT_OVERLOAD_SZ_4R(fun, qualifier, 32, ret_type, arg1_type, \\\n+\t\t\t\t arg1_name, arg2_type, arg2_name, arg3_type, \\\n+\t\t\t\t arg3_name)\t\t\t\t\\\n+\t__RTE_BIT_OVERLOAD_SZ_4R(fun, qualifier, 64, ret_type, arg1_type, \\\n+\t\t\t\t arg1_name, arg2_type, arg2_name, arg3_type, \\\n+\t\t\t\t arg3_name)\n+\n __RTE_BIT_OVERLOAD_2R(test, const, bool, unsigned int, nr)\n __RTE_BIT_OVERLOAD_2(set,, unsigned int, nr)\n __RTE_BIT_OVERLOAD_2(clear,, unsigned int, nr)\n@@ -1235,6 +1646,20 @@ __RTE_BIT_OVERLOAD_2(once_clear, volatile, unsigned int, nr)\n __RTE_BIT_OVERLOAD_3(once_assign, volatile, unsigned int, nr, bool, value)\n __RTE_BIT_OVERLOAD_2(once_flip, volatile, unsigned int, nr)\n \n+__RTE_BIT_OVERLOAD_3R(atomic_test, const, bool, unsigned int, nr,\n+\t\t int, memory_order)\n+__RTE_BIT_OVERLOAD_3(atomic_set,, unsigned int, nr, int, memory_order)\n+__RTE_BIT_OVERLOAD_3(atomic_clear,, unsigned int, nr, int, memory_order)\n+__RTE_BIT_OVERLOAD_4(atomic_assign,, unsigned int, nr, bool, value,\n+\t\t int, memory_order)\n+__RTE_BIT_OVERLOAD_3(atomic_flip,, unsigned int, nr, int, memory_order)\n+__RTE_BIT_OVERLOAD_3R(atomic_test_and_set,, bool, unsigned int, nr,\n+\t\t int, memory_order)\n+__RTE_BIT_OVERLOAD_3R(atomic_test_and_clear,, bool, unsigned int, nr,\n+\t\t int, memory_order)\n+__RTE_BIT_OVERLOAD_4R(atomic_test_and_assign,, bool, unsigned int, nr,\n+\t\t bool, value, int, memory_order)\n+\n #endif\n \n #endif /* _RTE_BITOPS_H_ */\n", "prefixes": [ "RFC", "v4", "4/6" ] }