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GET /api/patches/139534/?format=api
{ "id": 139534, "url": "http://patches.dpdk.org/api/patches/139534/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240419064319.149-2-anoobj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240419064319.149-2-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240419064319.149-2-anoobj@marvell.com", "date": "2024-04-19T06:43:13", "name": "[v3,1/7] dma/odm: add framework for ODM DMA device", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f4e0585cf4027f37806e73426662079658647be3", "submitter": { "id": 1205, "url": "http://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240419064319.149-2-anoobj@marvell.com/mbox/", "series": [ { "id": 31789, "url": "http://patches.dpdk.org/api/series/31789/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31789", "date": "2024-04-19T06:43:12", "name": "Add ODM DMA device", "version": 3, "mbox": "http://patches.dpdk.org/series/31789/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/139534/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/139534/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 11DCE43EAC;\n\tFri, 19 Apr 2024 08:43:32 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9EC70402D0;\n\tFri, 19 Apr 2024 08:43:29 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 5DB84402D0\n for <dev@dpdk.org>; Fri, 19 Apr 2024 08:43:28 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id\n 43ILYmcS010585; Thu, 18 Apr 2024 23:43:27 -0700", "from dc6wp-exch02.marvell.com ([4.21.29.225])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3xjhecq8sm-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Thu, 18 Apr 2024 23:43:27 -0700 (PDT)", "from DC6WP-EXCH02.marvell.com (10.76.176.209) by\n DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1544.4; Thu, 18 Apr 2024 23:43:26 -0700", "from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com\n (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend\n Transport; Thu, 18 Apr 2024 23:43:26 -0700", "from BG-LT92004.corp.innovium.com (BG-LT92004.marvell.com\n [10.28.163.189])\n by maili.marvell.com (Postfix) with ESMTP id C85685B6933;\n Thu, 18 Apr 2024 23:43:23 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding:content-type; s=\n pfpt0220; bh=QzcoaOH0E1c/LE6mRk0SKwXq0LEGBs9fRh039ohMhL8=; b=M+B\n c104pxDw55MSvW9fD4Jgqb/+WCqKQl5lbAaJHTETPeGXYvuPmQ52Amab6RuNLS0+\n UYoje7DHK3MmDOFcUZ260VEpNFEF5HedhqkzGQqE86UrHZz8lOL2s9U8twjSKWTy\n R+zrBV3Klb/DPgPLNWS7TslB1W/FW/Ycv21vRs77FC5F9B/Df83wS39r4FJ+7NkE\n XmVQanCB5QDJD/86c4wK7TlmTk9z1g+ch0gsHdkSGtjrE5guQinvJ/+GmdAQ6oZv\n U/siFu29h6dwBqJCmQVeZDp/UTendr/WtigaLGFGP5DBrlQQcsZhVPipEg9wl9zD\n WdGwWs2UZzbT03zzf/w==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Chengwen Feng <fengchengwen@huawei.com>, Kevin Laatz\n <kevin.laatz@intel.com>, Bruce Richardson <bruce.richardson@intel.com>,\n \"Jerin Jacob\" <jerinj@marvell.com>, Thomas Monjalon <thomas@monjalon.net>", "CC": "Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>, \"Vidya Sagar\n Velumuri\" <vvelumuri@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH v3 1/7] dma/odm: add framework for ODM DMA device", "Date": "Fri, 19 Apr 2024 12:13:13 +0530", "Message-ID": "<20240419064319.149-2-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20240419064319.149-1-anoobj@marvell.com>", "References": "<20240417072708.322-1-anoobj@marvell.com>\n <20240419064319.149-1-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "jQJPpKKIGCYDo9bGlX0xIay_CBerLHQZ", "X-Proofpoint-GUID": "jQJPpKKIGCYDo9bGlX0xIay_CBerLHQZ", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-04-19_04,2024-04-17_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add framework for Odyssey ODM DMA device.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>\nSigned-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n---\n MAINTAINERS | 6 +++\n drivers/dma/meson.build | 1 +\n drivers/dma/odm/meson.build | 14 +++++++\n drivers/dma/odm/odm.h | 29 ++++++++++++++\n drivers/dma/odm/odm_dmadev.c | 74 ++++++++++++++++++++++++++++++++++++\n 5 files changed, 124 insertions(+)\n create mode 100644 drivers/dma/odm/meson.build\n create mode 100644 drivers/dma/odm/odm.h\n create mode 100644 drivers/dma/odm/odm_dmadev.c", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 7abb3aee49..b8d2f7b3d8 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -1268,6 +1268,12 @@ T: git://dpdk.org/next/dpdk-next-net-mrvl\n F: drivers/dma/cnxk/\n F: doc/guides/dmadevs/cnxk.rst\n \n+Marvell Odyssey ODM DMA\n+M: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>\n+M: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n+T: git://dpdk.org/next/dpdk-next-net-mrvl\n+F: drivers/dma/odm/\n+\n NXP DPAA DMA\n M: Gagandeep Singh <g.singh@nxp.com>\n M: Sachin Saxena <sachin.saxena@oss.nxp.com>\ndiff --git a/drivers/dma/meson.build b/drivers/dma/meson.build\nindex 582654ea1b..358132759a 100644\n--- a/drivers/dma/meson.build\n+++ b/drivers/dma/meson.build\n@@ -8,6 +8,7 @@ drivers = [\n 'hisilicon',\n 'idxd',\n 'ioat',\n+ 'odm',\n 'skeleton',\n ]\n std_deps = ['dmadev']\ndiff --git a/drivers/dma/odm/meson.build b/drivers/dma/odm/meson.build\nnew file mode 100644\nindex 0000000000..227b10c890\n--- /dev/null\n+++ b/drivers/dma/odm/meson.build\n@@ -0,0 +1,14 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright(C) 2024 Marvell.\n+\n+if not is_linux or not dpdk_conf.get('RTE_ARCH_64')\n+ build = false\n+ reason = 'only supported on 64-bit Linux'\n+ subdir_done()\n+endif\n+\n+deps += ['bus_pci', 'dmadev', 'eal', 'mempool', 'pci']\n+\n+sources = files('odm_dmadev.c')\n+\n+pmd_supports_disable_iova_as_pa = true\ndiff --git a/drivers/dma/odm/odm.h b/drivers/dma/odm/odm.h\nnew file mode 100644\nindex 0000000000..aeeb6f9e9a\n--- /dev/null\n+++ b/drivers/dma/odm/odm.h\n@@ -0,0 +1,29 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+\n+#ifndef _ODM_H_\n+#define _ODM_H_\n+\n+#include <rte_log.h>\n+\n+extern int odm_logtype;\n+\n+#define odm_err(...) \\\n+\trte_log(RTE_LOG_ERR, odm_logtype, \\\n+\t\tRTE_FMT(\"%s(): %u\" RTE_FMT_HEAD(__VA_ARGS__, ), __func__, __LINE__, \\\n+\t\t\tRTE_FMT_TAIL(__VA_ARGS__, )))\n+#define odm_info(...) \\\n+\trte_log(RTE_LOG_INFO, odm_logtype, \\\n+\t\tRTE_FMT(\"%s(): %u\" RTE_FMT_HEAD(__VA_ARGS__, ), __func__, __LINE__, \\\n+\t\t\tRTE_FMT_TAIL(__VA_ARGS__, )))\n+\n+struct __rte_cache_aligned odm_dev {\n+\tstruct rte_pci_device *pci_dev;\n+\tuint8_t *rbase;\n+\tuint16_t vfid;\n+\tuint8_t max_qs;\n+\tuint8_t num_qs;\n+};\n+\n+#endif /* _ODM_H_ */\ndiff --git a/drivers/dma/odm/odm_dmadev.c b/drivers/dma/odm/odm_dmadev.c\nnew file mode 100644\nindex 0000000000..cc3342cf7b\n--- /dev/null\n+++ b/drivers/dma/odm/odm_dmadev.c\n@@ -0,0 +1,74 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+\n+#include <string.h>\n+\n+#include <bus_pci_driver.h>\n+#include <rte_bus_pci.h>\n+#include <rte_common.h>\n+#include <rte_dmadev.h>\n+#include <rte_dmadev_pmd.h>\n+#include <rte_pci.h>\n+\n+#include \"odm.h\"\n+\n+#define PCI_VENDOR_ID_CAVIUM\t 0x177D\n+#define PCI_DEVID_ODYSSEY_ODM_VF 0xA08C\n+#define PCI_DRIVER_NAME\t\t dma_odm\n+\n+static int\n+odm_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_device *pci_dev)\n+{\n+\tchar name[RTE_DEV_NAME_MAX_LEN];\n+\tstruct odm_dev *odm = NULL;\n+\tstruct rte_dma_dev *dmadev;\n+\n+\tif (!pci_dev->mem_resource[0].addr)\n+\t\treturn -ENODEV;\n+\n+\tmemset(name, 0, sizeof(name));\n+\trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n+\n+\tdmadev = rte_dma_pmd_allocate(name, pci_dev->device.numa_node, sizeof(*odm));\n+\tif (dmadev == NULL) {\n+\t\todm_err(\"DMA device allocation failed for %s\", name);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\todm_info(\"DMA device %s probed\", name);\n+\n+\treturn 0;\n+}\n+\n+static int\n+odm_dmadev_remove(struct rte_pci_device *pci_dev)\n+{\n+\tchar name[RTE_DEV_NAME_MAX_LEN];\n+\n+\tmemset(name, 0, sizeof(name));\n+\trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n+\n+\treturn rte_dma_pmd_release(name);\n+}\n+\n+static const struct rte_pci_id odm_dma_pci_map[] = {\n+\t{\n+\t\tRTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_ODYSSEY_ODM_VF)\n+\t},\n+\t{\n+\t\t.vendor_id = 0,\n+\t},\n+};\n+\n+static struct rte_pci_driver odm_dmadev = {\n+\t.id_table = odm_dma_pci_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING,\n+\t.probe = odm_dmadev_probe,\n+\t.remove = odm_dmadev_remove,\n+};\n+\n+RTE_PMD_REGISTER_PCI(PCI_DRIVER_NAME, odm_dmadev);\n+RTE_PMD_REGISTER_PCI_TABLE(PCI_DRIVER_NAME, odm_dma_pci_map);\n+RTE_PMD_REGISTER_KMOD_DEP(PCI_DRIVER_NAME, \"vfio-pci\");\n+RTE_LOG_REGISTER_DEFAULT(odm_logtype, NOTICE);\n", "prefixes": [ "v3", "1/7" ] }