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GET /api/patches/139440/?format=api
{ "id": 139440, "url": "http://patches.dpdk.org/api/patches/139440/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240417072708.322-4-anoobj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240417072708.322-4-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240417072708.322-4-anoobj@marvell.com", "date": "2024-04-17T07:27:04", "name": "[v2,3/7] dma/odm: add dev init and fini", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "a820f3b7bef78c96c3cfb6107f16734dee6abd63", "submitter": { "id": 1205, "url": "http://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240417072708.322-4-anoobj@marvell.com/mbox/", "series": [ { "id": 31766, "url": "http://patches.dpdk.org/api/series/31766/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31766", "date": "2024-04-17T07:27:01", "name": "Add ODM DMA device", "version": 2, "mbox": "http://patches.dpdk.org/series/31766/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/139440/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/139440/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EF98943E8E;\n\tWed, 17 Apr 2024 09:27:47 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4035F40A7D;\n\tWed, 17 Apr 2024 09:27:37 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 8596540A6D\n for <dev@dpdk.org>; Wed, 17 Apr 2024 09:27:34 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id\n 43GK1xuj017063; Wed, 17 Apr 2024 00:27:34 -0700", "from dc5-exch05.marvell.com ([199.233.59.128])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3xhfdn5btq-12\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Wed, 17 Apr 2024 00:27:33 -0700 (PDT)", "from DC5-EXCH05.marvell.com (10.69.176.209) by\n DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1544.4; Wed, 17 Apr 2024 00:27:23 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com\n (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend\n Transport; Wed, 17 Apr 2024 00:27:23 -0700", "from BG-LT92004.corp.innovium.com (unknown [10.193.69.67])\n by maili.marvell.com (Postfix) with ESMTP id 0B9DF3F707E;\n Wed, 17 Apr 2024 00:27:19 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding:content-type; s=\n pfpt0220; bh=T7W4R3WQAcmYT0v5Sgs8JWFuRm5unoc8OuWUtlLLAh8=; b=UbS\n lh3tZtXmqCcMLfNSl3hLq82J3aDj9kVRL4sqI3esYT+B1lAjf371A08uYy7LT9i5\n xzKQX1fE1G1PcFiOMNptTMfmFunT+2157o+gEjQm+gEdXHB0vo4MaKhRnTkzCWMQ\n 9HG7h05JjxGuR4Rep8bZD+A8w7ya02UaObIuSPDSscJ9GsBM+PnzGHw1N2qvhuei\n Gnq4T7At8iOZlah9LB/i/5eCABYC1Aae8cKLkkEfjre8YszSxR8m+tG7h8ZdAaW4\n bK233LFte+kdyEmg/N4jOTHwsmYK32piE/pv3Eu1vzGwn1YVOheU9mLkZqbpBsSQ\n 3Rs9LYceFqsQwfWABMQ==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Chengwen Feng <fengchengwen@huawei.com>, Kevin Laatz\n <kevin.laatz@intel.com>, Bruce Richardson <bruce.richardson@intel.com>,\n \"Jerin Jacob\" <jerinj@marvell.com>, Thomas Monjalon <thomas@monjalon.net>", "CC": "Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>, \"Vidya Sagar\n Velumuri\" <vvelumuri@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH v2 3/7] dma/odm: add dev init and fini", "Date": "Wed, 17 Apr 2024 12:57:04 +0530", "Message-ID": "<20240417072708.322-4-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20240417072708.322-1-anoobj@marvell.com>", "References": "<20240415153159.86-1-anoobj@marvell.com>\n <20240417072708.322-1-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "Ubj0LJvD-01cOSZxnwFVDEGyXT870ELT", "X-Proofpoint-ORIG-GUID": "Ubj0LJvD-01cOSZxnwFVDEGyXT870ELT", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-04-17_06,2024-04-16_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>\n\nAdd ODM device init and fini.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>\nSigned-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n---\n drivers/dma/odm/meson.build | 2 +-\n drivers/dma/odm/odm.c | 97 ++++++++++++++++++++++++++++++++++++\n drivers/dma/odm/odm.h | 10 ++++\n drivers/dma/odm/odm_dmadev.c | 13 +++++\n 4 files changed, 121 insertions(+), 1 deletion(-)\n create mode 100644 drivers/dma/odm/odm.c", "diff": "diff --git a/drivers/dma/odm/meson.build b/drivers/dma/odm/meson.build\nindex 227b10c890..d597762d37 100644\n--- a/drivers/dma/odm/meson.build\n+++ b/drivers/dma/odm/meson.build\n@@ -9,6 +9,6 @@ endif\n \n deps += ['bus_pci', 'dmadev', 'eal', 'mempool', 'pci']\n \n-sources = files('odm_dmadev.c')\n+sources = files('odm_dmadev.c', 'odm.c')\n \n pmd_supports_disable_iova_as_pa = true\ndiff --git a/drivers/dma/odm/odm.c b/drivers/dma/odm/odm.c\nnew file mode 100644\nindex 0000000000..c0963da451\n--- /dev/null\n+++ b/drivers/dma/odm/odm.c\n@@ -0,0 +1,97 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+\n+#include <stdint.h>\n+\n+#include <bus_pci_driver.h>\n+\n+#include <rte_io.h>\n+\n+#include \"odm.h\"\n+#include \"odm_priv.h\"\n+\n+static void\n+odm_vchan_resc_free(struct odm_dev *odm, int qno)\n+{\n+\tRTE_SET_USED(odm);\n+\tRTE_SET_USED(qno);\n+}\n+\n+static int\n+send_mbox_to_pf(struct odm_dev *odm, union odm_mbox_msg *msg, union odm_mbox_msg *rsp)\n+{\n+\tint retry_cnt = ODM_MBOX_RETRY_CNT;\n+\tunion odm_mbox_msg pf_msg;\n+\n+\tmsg->d.err = ODM_MBOX_ERR_CODE_MAX;\n+\todm_write64(msg->u[0], odm->rbase + ODM_MBOX_VF_PF_DATA(0));\n+\todm_write64(msg->u[1], odm->rbase + ODM_MBOX_VF_PF_DATA(1));\n+\n+\tpf_msg.u[0] = 0;\n+\tpf_msg.u[1] = 0;\n+\tpf_msg.u[0] = odm_read64(odm->rbase + ODM_MBOX_VF_PF_DATA(0));\n+\n+\twhile (pf_msg.d.rsp == 0 && retry_cnt > 0) {\n+\t\tpf_msg.u[0] = odm_read64(odm->rbase + ODM_MBOX_VF_PF_DATA(0));\n+\t\t--retry_cnt;\n+\t}\n+\n+\tif (retry_cnt <= 0)\n+\t\treturn -EBADE;\n+\n+\tpf_msg.u[1] = odm_read64(odm->rbase + ODM_MBOX_VF_PF_DATA(1));\n+\n+\tif (rsp) {\n+\t\trsp->u[0] = pf_msg.u[0];\n+\t\trsp->u[1] = pf_msg.u[1];\n+\t}\n+\n+\tif (pf_msg.d.rsp == msg->d.err && pf_msg.d.err != 0)\n+\t\treturn -EBADE;\n+\n+\treturn 0;\n+}\n+\n+int\n+odm_dev_init(struct odm_dev *odm)\n+{\n+\tstruct rte_pci_device *pci_dev = odm->pci_dev;\n+\tunion odm_mbox_msg mbox_msg;\n+\tuint16_t vfid;\n+\tint rc;\n+\n+\todm->rbase = pci_dev->mem_resource[0].addr;\n+\tvfid = ((pci_dev->addr.devid & 0x1F) << 3) | (pci_dev->addr.function & 0x7);\n+\tvfid -= 1;\n+\todm->vfid = vfid;\n+\todm->num_qs = 0;\n+\n+\tmbox_msg.u[0] = 0;\n+\tmbox_msg.u[1] = 0;\n+\tmbox_msg.q.vfid = odm->vfid;\n+\tmbox_msg.q.cmd = ODM_DEV_INIT;\n+\trc = send_mbox_to_pf(odm, &mbox_msg, &mbox_msg);\n+\tif (!rc)\n+\t\todm->max_qs = 1 << (4 - mbox_msg.d.nvfs);\n+\n+\treturn rc;\n+}\n+\n+int\n+odm_dev_fini(struct odm_dev *odm)\n+{\n+\tunion odm_mbox_msg mbox_msg;\n+\tint qno, rc = 0;\n+\n+\tmbox_msg.u[0] = 0;\n+\tmbox_msg.u[1] = 0;\n+\tmbox_msg.q.vfid = odm->vfid;\n+\tmbox_msg.q.cmd = ODM_DEV_CLOSE;\n+\trc = send_mbox_to_pf(odm, &mbox_msg, &mbox_msg);\n+\n+\tfor (qno = 0; qno < odm->num_qs; qno++)\n+\t\todm_vchan_resc_free(odm, qno);\n+\n+\treturn rc;\n+}\ndiff --git a/drivers/dma/odm/odm.h b/drivers/dma/odm/odm.h\nindex 7564ffbed4..9fd3e30ad8 100644\n--- a/drivers/dma/odm/odm.h\n+++ b/drivers/dma/odm/odm.h\n@@ -5,6 +5,10 @@\n #ifndef _ODM_H_\n #define _ODM_H_\n \n+#include <stdint.h>\n+\n+#include <rte_common.h>\n+#include <rte_compat.h>\n #include <rte_log.h>\n \n extern int odm_logtype;\n@@ -50,6 +54,9 @@ extern int odm_logtype;\n \n #define ODM_MAX_QUEUES_PER_DEV 16\n \n+#define odm_read64(addr) rte_read64_relaxed((volatile void *)(addr))\n+#define odm_write64(val, addr) rte_write64_relaxed((val), (volatile void *)(addr))\n+\n #define odm_err(...) \\\n \trte_log(RTE_LOG_ERR, odm_logtype, \\\n \t\tRTE_FMT(\"%s(): %u\" RTE_FMT_HEAD(__VA_ARGS__, ), __func__, __LINE__, \\\n@@ -142,4 +149,7 @@ struct __rte_cache_aligned odm_dev {\n \tuint8_t num_qs;\n };\n \n+int odm_dev_init(struct odm_dev *odm);\n+int odm_dev_fini(struct odm_dev *odm);\n+\n #endif /* _ODM_H_ */\ndiff --git a/drivers/dma/odm/odm_dmadev.c b/drivers/dma/odm/odm_dmadev.c\nindex cc3342cf7b..bef335c10c 100644\n--- a/drivers/dma/odm/odm_dmadev.c\n+++ b/drivers/dma/odm/odm_dmadev.c\n@@ -23,6 +23,7 @@ odm_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_dev\n \tchar name[RTE_DEV_NAME_MAX_LEN];\n \tstruct odm_dev *odm = NULL;\n \tstruct rte_dma_dev *dmadev;\n+\tint rc;\n \n \tif (!pci_dev->mem_resource[0].addr)\n \t\treturn -ENODEV;\n@@ -37,8 +38,20 @@ odm_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_dev\n \t}\n \n \todm_info(\"DMA device %s probed\", name);\n+\todm = dmadev->data->dev_private;\n+\n+\todm->pci_dev = pci_dev;\n+\n+\trc = odm_dev_init(odm);\n+\tif (rc < 0)\n+\t\tgoto dma_pmd_release;\n \n \treturn 0;\n+\n+dma_pmd_release:\n+\trte_dma_pmd_release(name);\n+\n+\treturn rc;\n }\n \n static int\n", "prefixes": [ "v2", "3/7" ] }