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GET /api/patches/139374/?format=api
{ "id": 139374, "url": "http://patches.dpdk.org/api/patches/139374/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1713211485-9021-71-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1713211485-9021-71-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1713211485-9021-71-git-send-email-roretzla@linux.microsoft.com", "date": "2024-04-15T20:04:32", "name": "[v2,70/83] common/mlx5: move alignment attribute on types", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "8e0f15acf6bf27d308abf83ac35ff7c9c3a307d1", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1713211485-9021-71-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31746, "url": "http://patches.dpdk.org/api/series/31746/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31746", "date": "2024-04-15T20:03:22", "name": "move alignment attribute on types", "version": 2, "mbox": "http://patches.dpdk.org/series/31746/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/139374/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/139374/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A01CF43E7E;\n\tMon, 15 Apr 2024 22:13:50 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6936B40DF8;\n\tMon, 15 Apr 2024 22:06:44 +0200 (CEST)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id EEBB840E72\n for <dev@dpdk.org>; Mon, 15 Apr 2024 22:05:08 +0200 (CEST)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 6E4A020FDC22; Mon, 15 Apr 2024 13:04:47 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 6E4A020FDC22", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1713211492;\n bh=bMbn70t/kVx7ckq2BFTk3cYf0c28OzcnHd4K6/NSaaw=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=plNqvRAvoWXoKZDwsxqij6Nn7wIvIIJdpXb8U0vkAdQrqhL8WLPqYJnAEdXAZqKe9\n qywR8YHro994CgZ9YKPuduHIiKizpF9B++f9MrI4NwViIuo/1HkfflP0Wp2YCIW7u3\n cetv43CSDfxC9hqmOJtiAJwAcQQWy7W8BB7Mx8Mw=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n \"Min Hu (Connor)\" <humin29@huawei.com>,\n =?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>,\n Abdullah Sevincer <abdullah.sevincer@intel.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>, Akhil Goyal <gakhil@marvell.com>,\n Alok Prasad <palok@marvell.com>, Amit Bernstein <amitbern@amazon.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Boyer <andrew.boyer@amd.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Ankur Dwivedi <adwivedi@marvell.com>, Anoob Joseph <anoobj@marvell.com>,\n Ashish Gupta <ashish.gupta@marvell.com>,\n Ashwin Sekhar T K <asekhar@marvell.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Byron Marohn <byron.marohn@intel.com>,\n Chaoyong He <chaoyong.he@corigine.com>, Chas Williams <chas3@att.com>,\n Chenbo Xia <chenbox@nvidia.com>, Chengwen Feng <fengchengwen@huawei.com>,\n Conor Walsh <conor.walsh@intel.com>,\n Cristian Dumitrescu <cristian.dumitrescu@intel.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>, David Hunt <david.hunt@intel.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Ed Czeck <ed.czeck@atomicrules.com>, Evgeny Schemeilin <evgenys@amazon.com>,\n Fan Zhang <fanzhang.oss@gmail.com>, Gagandeep Singh <g.singh@nxp.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>, Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Hemant Agrawal <hemant.agrawal@nxp.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Hyong Youb Kim <hyonkim@cisco.com>, Jakub Grajciar <jgrajcia@cisco.com>,\n Jerin Jacob <jerinj@marvell.com>, Jian Wang <jianwang@trustnetic.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>, Jie Hai <haijie1@huawei.com>,\n Jingjing Wu <jingjing.wu@intel.com>, John Daley <johndale@cisco.com>,\n John Miller <john.miller@atomicrules.com>, Joyce Kong <joyce.kong@arm.com>,\n Kai Ji <kai.ji@intel.com>, Kevin Laatz <kevin.laatz@intel.com>,\n Kiran Kumar K <kirankumark@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Lee Daly <lee.daly@intel.com>, Liang Ma <liangma@liangbit.com>,\n Liron Himi <lironh@marvell.com>, Long Li <longli@microsoft.com>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Matt Peters <matt.peters@windriver.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Michael Shamis <michaelsh@marvell.com>,\n Nagadheeraj Rottela <rnagadheeraj@marvell.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>, Ori Kam <orika@nvidia.com>,\n Pablo de Lara <pablo.de.lara.guarch@intel.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Peter Mccarthy <peter.mccarthy@intel.com>,\n Radu Nicolau <radu.nicolau@intel.com>,\n Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>,\n Rakesh Kudurumalla <rkudurumalla@marvell.com>,\n Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>,\n Reshma Pattan <reshma.pattan@intel.com>, Ron Beider <rbeider@amazon.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Sachin Saxena <sachin.saxena@nxp.com>,\n Selwin Sebastian <selwin.sebastian@amd.com>,\n Shai Brandes <shaibran@amazon.com>,\n Shepard Siegel <shepard.siegel@atomicrules.com>,\n Shijith Thotton <sthotton@marvell.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Srikanth Yalavarthi <syalavarthi@marvell.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Steven Webster <steven.webster@windriver.com>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>,\n Sunila Sahu <ssahu@marvell.com>, Tejasree Kondoj <ktejasree@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vikas Gupta <vikas.gupta@broadcom.com>,\n Volodymyr Fialko <vfialko@marvell.com>, Wajeeh Atrash <atrwajee@amazon.com>,\n Wisam Jaddo <wisamm@nvidia.com>, Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Yipeng Wang <yipeng1.wang@intel.com>, Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>,\n Zhangfei Gao <zhangfei.gao@linaro.org>, Zhirun Yan <yanzhirun_163@163.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v2 70/83] common/mlx5: move alignment attribute on types", "Date": "Mon, 15 Apr 2024 13:04:32 -0700", "Message-Id": "<1713211485-9021-71-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1713211485-9021-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1710949096-5786-1-git-send-email-roretzla@linux.microsoft.com>\n <1713211485-9021-1-git-send-email-roretzla@linux.microsoft.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Move location of __rte_aligned(a) to new conventional location. The new\nplacement between {struct,union} and the tag allows the desired\nalignment to be imparted on the type regardless of the toolchain being\nused for both C and C++. Additionally, it avoids confusion by Doxygen\nwhen generating documentation.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nAcked-by: Morten Brørup <mb@smartsharesystems.com>\n---\n drivers/common/mlx5/linux/mlx5_glue.c | 2 +-\n drivers/common/mlx5/linux/mlx5_nl.c | 2 +-\n drivers/common/mlx5/mlx5_common_mr.h | 4 ++--\n drivers/common/mlx5/mlx5_common_utils.h | 12 ++++++------\n drivers/common/mlx5/mlx5_prm.h | 4 ++--\n 5 files changed, 12 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/linux/mlx5_glue.c b/drivers/common/mlx5/linux/mlx5_glue.c\nindex 6f858db..99761ea 100644\n--- a/drivers/common/mlx5/linux/mlx5_glue.c\n+++ b/drivers/common/mlx5/linux/mlx5_glue.c\n@@ -1578,7 +1578,7 @@\n #endif\n }\n \n-__rte_cache_aligned\n+alignas(RTE_CACHE_LINE_SIZE)\n const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {\n \t.version = MLX5_GLUE_VERSION,\n \t.fork_init = mlx5_glue_fork_init,\ndiff --git a/drivers/common/mlx5/linux/mlx5_nl.c b/drivers/common/mlx5/linux/mlx5_nl.c\nindex 28a1f56..61192eb 100644\n--- a/drivers/common/mlx5/linux/mlx5_nl.c\n+++ b/drivers/common/mlx5/linux/mlx5_nl.c\n@@ -1507,7 +1507,7 @@ struct mlx5_nl_port_info {\n \tstruct ifinfomsg *ifm;\n \tchar name[sizeof(MLX5_VMWA_VLAN_DEVICE_PFX) + 32];\n \n-\t__rte_cache_aligned\n+\talignas(RTE_CACHE_LINE_SIZE)\n \tuint8_t buf[NLMSG_ALIGN(sizeof(struct nlmsghdr)) +\n \t\t NLMSG_ALIGN(sizeof(struct ifinfomsg)) +\n \t\t NLMSG_ALIGN(sizeof(struct nlattr)) * 8 +\ndiff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h\nindex 8789d40..aa10b68 100644\n--- a/drivers/common/mlx5/mlx5_common_mr.h\n+++ b/drivers/common/mlx5/mlx5_common_mr.h\n@@ -91,7 +91,7 @@ struct mlx5_mr_share_cache {\n } __rte_packed;\n \n /* Multi-Packet RQ buffer header. */\n-struct mlx5_mprq_buf {\n+struct __rte_cache_aligned mlx5_mprq_buf {\n \tstruct rte_mempool *mp;\n \tuint16_t refcnt; /* Atomically accessed refcnt. */\n \tstruct rte_mbuf_ext_shared_info shinfos[];\n@@ -100,7 +100,7 @@ struct mlx5_mprq_buf {\n \t * More memory will be allocated for the first stride head-room and for\n \t * the strides data.\n \t */\n-} __rte_cache_aligned;\n+};\n \n __rte_internal\n void mlx5_mprq_buf_free_cb(void *addr, void *opaque);\ndiff --git a/drivers/common/mlx5/mlx5_common_utils.h b/drivers/common/mlx5/mlx5_common_utils.h\nindex ae15119..44eba50 100644\n--- a/drivers/common/mlx5/mlx5_common_utils.h\n+++ b/drivers/common/mlx5/mlx5_common_utils.h\n@@ -29,7 +29,7 @@\n */\n struct mlx5_list_entry {\n \tLIST_ENTRY(mlx5_list_entry) next; /* Entry pointers in the list. */\n-\tuint32_t ref_cnt __rte_aligned(8); /* 0 means, entry is invalid. */\n+\talignas(8) uint32_t ref_cnt; /* 0 means, entry is invalid. */\n \tuint32_t lcore_idx;\n \tunion {\n \t\tstruct mlx5_list_entry *gentry;\n@@ -37,10 +37,10 @@ struct mlx5_list_entry {\n \t};\n } __rte_packed;\n \n-struct mlx5_list_cache {\n+struct __rte_cache_aligned mlx5_list_cache {\n \tLIST_HEAD(mlx5_list_head, mlx5_list_entry) h;\n \tuint32_t inv_cnt; /* Invalid entries counter. */\n-} __rte_cache_aligned;\n+};\n \n /**\n * Type of callback function for entry removal.\n@@ -243,9 +243,9 @@ int mlx5_list_unregister(struct mlx5_list *list,\n /********************* Hash List **********************/\n \n /* Hash list bucket. */\n-struct mlx5_hlist_bucket {\n+struct __rte_cache_aligned mlx5_hlist_bucket {\n \tstruct mlx5_list_inconst l;\n-} __rte_cache_aligned;\n+};\n \n /**\n * Hash list table structure\n@@ -257,7 +257,7 @@ struct mlx5_hlist {\n \tuint8_t flags;\n \tbool direct_key; /* Whether to use the key directly as hash index. */\n \tstruct mlx5_list_const l_const; /* List constant data. */\n-\tstruct mlx5_hlist_bucket buckets[] __rte_cache_aligned;\n+\talignas(RTE_CACHE_LINE_SIZE) struct mlx5_hlist_bucket buckets[];\n };\n \n /**\ndiff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex c671c75..2bbbc44 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -319,12 +319,12 @@ enum mlx5_mpw_mode {\n };\n \n /* WQE Control segment. */\n-struct mlx5_wqe_cseg {\n+struct __rte_aligned(MLX5_WSEG_SIZE) mlx5_wqe_cseg {\n \tuint32_t opcode;\n \tuint32_t sq_ds;\n \tuint32_t flags;\n \tuint32_t misc;\n-} __rte_packed __rte_aligned(MLX5_WSEG_SIZE);\n+} __rte_packed;\n \n /*\n * WQE CSEG opcode field size is 32 bits, divided:\n", "prefixes": [ "v2", "70/83" ] }