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GET /api/patches/139371/?format=api
{ "id": 139371, "url": "http://patches.dpdk.org/api/patches/139371/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1713211485-9021-59-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1713211485-9021-59-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1713211485-9021-59-git-send-email-roretzla@linux.microsoft.com", "date": "2024-04-15T20:04:20", "name": "[v2,58/83] crypto/ipsec_mb: move alignment attribute on types", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "6cfba41337e7d13f30c267863e57ff39d88e07db", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1713211485-9021-59-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31746, "url": "http://patches.dpdk.org/api/series/31746/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31746", "date": "2024-04-15T20:03:22", "name": "move alignment attribute on types", "version": 2, "mbox": "http://patches.dpdk.org/series/31746/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/139371/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/139371/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 47AB743E7E;\n\tMon, 15 Apr 2024 22:13:35 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CA0D642E54;\n\tMon, 15 Apr 2024 22:06:39 +0200 (CEST)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 1AAAE40E72\n for <dev@dpdk.org>; Mon, 15 Apr 2024 22:05:08 +0200 (CEST)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 346C820FDAA9; Mon, 15 Apr 2024 13:04:47 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 346C820FDAA9", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1713211492;\n bh=jriG8rCpL0l/QItrishA8K3UvtmHyKuK8I+xAgM2ePc=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=VhlPGmcsl8+3EacLM6gcengfcZtT+SlmCnSBVxuN0BArz2p7LsIoYPF/wvUM5i2Gq\n knsMIz6Chs5RQ9Yzh1YMAFXo8QPNQ3huAplSfodJ94VJ45sGBDgEWUoweWGcDfLHLq\n hkmukH+k5g1+AWjQnDPSrmWTF8fagQhsGUq7U5Z8=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n \"Min Hu (Connor)\" <humin29@huawei.com>,\n =?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>,\n Abdullah Sevincer <abdullah.sevincer@intel.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>, Akhil Goyal <gakhil@marvell.com>,\n Alok Prasad <palok@marvell.com>, Amit Bernstein <amitbern@amazon.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Boyer <andrew.boyer@amd.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Ankur Dwivedi <adwivedi@marvell.com>, Anoob Joseph <anoobj@marvell.com>,\n Ashish Gupta <ashish.gupta@marvell.com>,\n Ashwin Sekhar T K <asekhar@marvell.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Byron Marohn <byron.marohn@intel.com>,\n Chaoyong He <chaoyong.he@corigine.com>, Chas Williams <chas3@att.com>,\n Chenbo Xia <chenbox@nvidia.com>, Chengwen Feng <fengchengwen@huawei.com>,\n Conor Walsh <conor.walsh@intel.com>,\n Cristian Dumitrescu <cristian.dumitrescu@intel.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>, David Hunt <david.hunt@intel.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Ed Czeck <ed.czeck@atomicrules.com>, Evgeny Schemeilin <evgenys@amazon.com>,\n Fan Zhang <fanzhang.oss@gmail.com>, Gagandeep Singh <g.singh@nxp.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>, Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Hemant Agrawal <hemant.agrawal@nxp.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Hyong Youb Kim <hyonkim@cisco.com>, Jakub Grajciar <jgrajcia@cisco.com>,\n Jerin Jacob <jerinj@marvell.com>, Jian Wang <jianwang@trustnetic.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>, Jie Hai <haijie1@huawei.com>,\n Jingjing Wu <jingjing.wu@intel.com>, John Daley <johndale@cisco.com>,\n John Miller <john.miller@atomicrules.com>, Joyce Kong <joyce.kong@arm.com>,\n Kai Ji <kai.ji@intel.com>, Kevin Laatz <kevin.laatz@intel.com>,\n Kiran Kumar K <kirankumark@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Lee Daly <lee.daly@intel.com>, Liang Ma <liangma@liangbit.com>,\n Liron Himi <lironh@marvell.com>, Long Li <longli@microsoft.com>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Matt Peters <matt.peters@windriver.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Michael Shamis <michaelsh@marvell.com>,\n Nagadheeraj Rottela <rnagadheeraj@marvell.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>, Ori Kam <orika@nvidia.com>,\n Pablo de Lara <pablo.de.lara.guarch@intel.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Peter Mccarthy <peter.mccarthy@intel.com>,\n Radu Nicolau <radu.nicolau@intel.com>,\n Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>,\n Rakesh Kudurumalla <rkudurumalla@marvell.com>,\n Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>,\n Reshma Pattan <reshma.pattan@intel.com>, Ron Beider <rbeider@amazon.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Sachin Saxena <sachin.saxena@nxp.com>,\n Selwin Sebastian <selwin.sebastian@amd.com>,\n Shai Brandes <shaibran@amazon.com>,\n Shepard Siegel <shepard.siegel@atomicrules.com>,\n Shijith Thotton <sthotton@marvell.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Srikanth Yalavarthi <syalavarthi@marvell.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Steven Webster <steven.webster@windriver.com>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>,\n Sunila Sahu <ssahu@marvell.com>, Tejasree Kondoj <ktejasree@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vikas Gupta <vikas.gupta@broadcom.com>,\n Volodymyr Fialko <vfialko@marvell.com>, Wajeeh Atrash <atrwajee@amazon.com>,\n Wisam Jaddo <wisamm@nvidia.com>, Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Yipeng Wang <yipeng1.wang@intel.com>, Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>,\n Zhangfei Gao <zhangfei.gao@linaro.org>, Zhirun Yan <yanzhirun_163@163.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v2 58/83] crypto/ipsec_mb: move alignment attribute on types", "Date": "Mon, 15 Apr 2024 13:04:20 -0700", "Message-Id": "<1713211485-9021-59-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1713211485-9021-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1710949096-5786-1-git-send-email-roretzla@linux.microsoft.com>\n <1713211485-9021-1-git-send-email-roretzla@linux.microsoft.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Move location of __rte_aligned(a) to new conventional location. The new\nplacement between {struct,union} and the tag allows the desired\nalignment to be imparted on the type regardless of the toolchain being\nused for both C and C++. Additionally, it avoids confusion by Doxygen\nwhen generating documentation.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nAcked-by: Morten Brørup <mb@smartsharesystems.com>\n---\n drivers/crypto/ipsec_mb/pmd_aesni_mb.c | 4 ++--\n drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h | 24 ++++++++++++------------\n drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h | 4 ++--\n drivers/crypto/ipsec_mb/pmd_kasumi_priv.h | 4 ++--\n drivers/crypto/ipsec_mb/pmd_snow3g_priv.h | 4 ++--\n drivers/crypto/ipsec_mb/pmd_zuc_priv.h | 4 ++--\n 6 files changed, 22 insertions(+), 22 deletions(-)", "diff": "diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c\nindex 4de4866..69a5466 100644\n--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c\n+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c\n@@ -32,8 +32,8 @@ struct aesni_mb_op_buf_data {\n {\n \tuint32_t i, length;\n \n-\tuint8_t ipad_buf[blocksize] __rte_aligned(16);\n-\tuint8_t opad_buf[blocksize] __rte_aligned(16);\n+\talignas(16) uint8_t ipad_buf[blocksize];\n+\talignas(16) uint8_t opad_buf[blocksize];\n \n \t/* Setup inner and outer pads */\n \tmemset(ipad_buf, HMAC_IPAD_VALUE, blocksize);\ndiff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h\nindex 85994fe..eec8931 100644\n--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h\n+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h\n@@ -848,7 +848,7 @@ struct aesni_mb_qp_data {\n }\n \n /** AES-NI multi-buffer private session structure */\n-struct aesni_mb_session {\n+struct __rte_cache_aligned aesni_mb_session {\n \tIMB_JOB template_job;\n \t/*< Template job structure */\n \tuint32_t session_id;\n@@ -869,9 +869,9 @@ struct aesni_mb_session {\n \tstruct {\n \t\tunion {\n \t\t\tstruct {\n-\t\t\t\tuint32_t encode[60] __rte_aligned(16);\n+\t\t\t\talignas(16) uint32_t encode[60];\n \t\t\t\t/* *< encode key */\n-\t\t\t\tuint32_t decode[60] __rte_aligned(16);\n+\t\t\t\talignas(16) uint32_t decode[60];\n \t\t\t\t/* *< decode key */\n \t\t\t} expanded_aes_keys;\n \t\t\t/* *< Expanded AES keys - Allocating space to\n@@ -903,9 +903,9 @@ struct aesni_mb_session {\n \t\t/* *< auth operation generate or verify */\n \t\tunion {\n \t\t\tstruct {\n-\t\t\t\tuint8_t inner[128] __rte_aligned(16);\n+\t\t\t\talignas(16) uint8_t inner[128];\n \t\t\t\t/* *< inner pad */\n-\t\t\t\tuint8_t outer[128] __rte_aligned(16);\n+\t\t\t\talignas(16) uint8_t outer[128];\n \t\t\t\t/* *< outer pad */\n \t\t\t} pads;\n \t\t\t/* *< HMAC Authentication pads -\n@@ -915,20 +915,20 @@ struct aesni_mb_session {\n \t\t\t */\n \n \t\t\tstruct {\n-\t\t\t\tuint32_t k1_expanded[44] __rte_aligned(16);\n+\t\t\t\talignas(16) uint32_t k1_expanded[44];\n \t\t\t\t/* *< k1 (expanded key). */\n-\t\t\t\tuint8_t k2[16] __rte_aligned(16);\n+\t\t\t\talignas(16) uint8_t k2[16];\n \t\t\t\t/* *< k2. */\n-\t\t\t\tuint8_t k3[16] __rte_aligned(16);\n+\t\t\t\talignas(16) uint8_t k3[16];\n \t\t\t\t/* *< k3. */\n \t\t\t} xcbc;\n \n \t\t\tstruct {\n-\t\t\t\tuint32_t expkey[60] __rte_aligned(16);\n+\t\t\t\talignas(16) uint32_t expkey[60];\n \t\t\t\t/* *< k1 (expanded key). */\n-\t\t\t\tuint32_t skey1[4] __rte_aligned(16);\n+\t\t\t\talignas(16) uint32_t skey1[4];\n \t\t\t\t/* *< k2. */\n-\t\t\t\tuint32_t skey2[4] __rte_aligned(16);\n+\t\t\t\talignas(16) uint32_t skey2[4];\n \t\t\t\t/* *< k3. */\n \t\t\t} cmac;\n \t\t\t/* *< Expanded XCBC authentication keys */\n@@ -943,7 +943,7 @@ struct aesni_mb_session {\n \t\tuint16_t req_digest_len;\n \n \t} auth;\n-} __rte_cache_aligned;\n+};\n \n typedef void (*hash_one_block_t)(const void *data, void *digest);\n typedef void (*aes_keyexp_t)(const void *key, void *enc_exp_keys,\ndiff --git a/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h b/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h\nindex 842f62f..0eca63c 100644\n--- a/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h\n+++ b/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h\n@@ -46,7 +46,7 @@ struct rte_cryptodev_capabilities chacha20_poly1305_capabilities[] = {\n uint8_t pmd_driver_id_chacha20_poly1305;\n \n /** CHACHA20 POLY1305 private session structure */\n-struct chacha20_poly1305_session {\n+struct __rte_cache_aligned chacha20_poly1305_session {\n \tstruct {\n \t\tuint16_t length;\n \t\tuint16_t offset;\n@@ -60,7 +60,7 @@ struct chacha20_poly1305_session {\n \t/**< Generated digest length */\n \tuint8_t key[CHACHA20_POLY1305_KEY_SIZE];\n \tenum ipsec_mb_operation op;\n-} __rte_cache_aligned;\n+};\n \n struct chacha20_poly1305_qp_data {\n \tstruct chacha20_poly1305_context_data chacha20_poly1305_ctx_data;\ndiff --git a/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h b/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h\nindex 8db1d1c..c2e28ea 100644\n--- a/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h\n+++ b/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h\n@@ -61,14 +61,14 @@\n };\n \n /** KASUMI private session structure */\n-struct kasumi_session {\n+struct __rte_cache_aligned kasumi_session {\n \t/* Keys have to be 16-byte aligned */\n \tkasumi_key_sched_t pKeySched_cipher;\n \tkasumi_key_sched_t pKeySched_hash;\n \tenum ipsec_mb_operation op;\n \tenum rte_crypto_auth_operation auth_op;\n \tuint16_t cipher_iv_offset;\n-} __rte_cache_aligned;\n+};\n \n struct kasumi_qp_data {\n \tuint8_t temp_digest[KASUMI_DIGEST_LENGTH];\ndiff --git a/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h b/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h\nindex ca1ce7f..9492a0b 100644\n--- a/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h\n+++ b/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h\n@@ -65,14 +65,14 @@\n };\n \n /** SNOW 3G private session structure */\n-struct snow3g_session {\n+struct __rte_cache_aligned snow3g_session {\n \tenum ipsec_mb_operation op;\n \tenum rte_crypto_auth_operation auth_op;\n \tsnow3g_key_schedule_t pKeySched_cipher;\n \tsnow3g_key_schedule_t pKeySched_hash;\n \tuint16_t cipher_iv_offset;\n \tuint16_t auth_iv_offset;\n-} __rte_cache_aligned;\n+};\n \n struct snow3g_qp_data {\n \tuint8_t temp_digest[SNOW3G_DIGEST_LENGTH];\ndiff --git a/drivers/crypto/ipsec_mb/pmd_zuc_priv.h b/drivers/crypto/ipsec_mb/pmd_zuc_priv.h\nindex 76fd675..a17a65a 100644\n--- a/drivers/crypto/ipsec_mb/pmd_zuc_priv.h\n+++ b/drivers/crypto/ipsec_mb/pmd_zuc_priv.h\n@@ -64,14 +64,14 @@\n };\n \n /** ZUC private session structure */\n-struct zuc_session {\n+struct __rte_cache_aligned zuc_session {\n \tenum ipsec_mb_operation op;\n \tenum rte_crypto_auth_operation auth_op;\n \tuint8_t pKey_cipher[ZUC_IV_KEY_LENGTH];\n \tuint8_t pKey_hash[ZUC_IV_KEY_LENGTH];\n \tuint16_t cipher_iv_offset;\n \tuint16_t auth_iv_offset;\n-} __rte_cache_aligned;\n+};\n \n struct zuc_qp_data {\n \n", "prefixes": [ "v2", "58/83" ] }