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GET /api/patches/139327/?format=api
{ "id": 139327, "url": "http://patches.dpdk.org/api/patches/139327/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1713211485-9021-33-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1713211485-9021-33-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1713211485-9021-33-git-send-email-roretzla@linux.microsoft.com", "date": "2024-04-15T20:03:54", "name": "[v2,32/83] net/thunderx: move alignment attribute on types", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "4451d594375d5771cfa2aee97ebf6d311e69ce98", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1713211485-9021-33-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31746, "url": "http://patches.dpdk.org/api/series/31746/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31746", "date": "2024-04-15T20:03:22", "name": "move alignment attribute on types", "version": 2, "mbox": "http://patches.dpdk.org/series/31746/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/139327/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/139327/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3F10743E7E;\n\tMon, 15 Apr 2024 22:08:46 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 539C6427DB;\n\tMon, 15 Apr 2024 22:05:33 +0200 (CEST)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 4396240A6B\n for <dev@dpdk.org>; Mon, 15 Apr 2024 22:04:56 +0200 (CEST)", "by linux.microsoft.com (Postfix, from userid 1086)\n id AE8F420FD4A9; Mon, 15 Apr 2024 13:04:46 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com AE8F420FD4A9", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1713211488;\n bh=sCkMgOcBANs3nJ4p5Pvx4OYPOfAEQhnwODqnQzAM8CQ=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=BF+SgEJwrHR5zPOwiaFY+C782mdbofvIb1q9yeZWrsPJte88YUSSrV0uaCkWYXUZw\n 5kzDwopMiv0RmsPdXokVxYMr17ZoHFgWqjmdHp8zM6EMZySXtHvnNhCbouL9aa8CVw\n tm59UqjytwvtY61bb6VkQjmf04mstwa+kILpH5ng=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n \"Min Hu (Connor)\" <humin29@huawei.com>,\n =?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>,\n Abdullah Sevincer <abdullah.sevincer@intel.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>, Akhil Goyal <gakhil@marvell.com>,\n Alok Prasad <palok@marvell.com>, Amit Bernstein <amitbern@amazon.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Boyer <andrew.boyer@amd.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Ankur Dwivedi <adwivedi@marvell.com>, Anoob Joseph <anoobj@marvell.com>,\n Ashish Gupta <ashish.gupta@marvell.com>,\n Ashwin Sekhar T K <asekhar@marvell.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Byron Marohn <byron.marohn@intel.com>,\n Chaoyong He <chaoyong.he@corigine.com>, Chas Williams <chas3@att.com>,\n Chenbo Xia <chenbox@nvidia.com>, Chengwen Feng <fengchengwen@huawei.com>,\n Conor Walsh <conor.walsh@intel.com>,\n Cristian Dumitrescu <cristian.dumitrescu@intel.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>, David Hunt <david.hunt@intel.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Ed Czeck <ed.czeck@atomicrules.com>, Evgeny Schemeilin <evgenys@amazon.com>,\n Fan Zhang <fanzhang.oss@gmail.com>, Gagandeep Singh <g.singh@nxp.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>, Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Hemant Agrawal <hemant.agrawal@nxp.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Hyong Youb Kim <hyonkim@cisco.com>, Jakub Grajciar <jgrajcia@cisco.com>,\n Jerin Jacob <jerinj@marvell.com>, Jian Wang <jianwang@trustnetic.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>, Jie Hai <haijie1@huawei.com>,\n Jingjing Wu <jingjing.wu@intel.com>, John Daley <johndale@cisco.com>,\n John Miller <john.miller@atomicrules.com>, Joyce Kong <joyce.kong@arm.com>,\n Kai Ji <kai.ji@intel.com>, Kevin Laatz <kevin.laatz@intel.com>,\n Kiran Kumar K <kirankumark@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Lee Daly <lee.daly@intel.com>, Liang Ma <liangma@liangbit.com>,\n Liron Himi <lironh@marvell.com>, Long Li <longli@microsoft.com>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Matt Peters <matt.peters@windriver.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Michael Shamis <michaelsh@marvell.com>,\n Nagadheeraj Rottela <rnagadheeraj@marvell.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>, Ori Kam <orika@nvidia.com>,\n Pablo de Lara <pablo.de.lara.guarch@intel.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Peter Mccarthy <peter.mccarthy@intel.com>,\n Radu Nicolau <radu.nicolau@intel.com>,\n Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>,\n Rakesh Kudurumalla <rkudurumalla@marvell.com>,\n Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>,\n Reshma Pattan <reshma.pattan@intel.com>, Ron Beider <rbeider@amazon.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Sachin Saxena <sachin.saxena@nxp.com>,\n Selwin Sebastian <selwin.sebastian@amd.com>,\n Shai Brandes <shaibran@amazon.com>,\n Shepard Siegel <shepard.siegel@atomicrules.com>,\n Shijith Thotton <sthotton@marvell.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Srikanth Yalavarthi <syalavarthi@marvell.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Steven Webster <steven.webster@windriver.com>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>,\n Sunila Sahu <ssahu@marvell.com>, Tejasree Kondoj <ktejasree@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vikas Gupta <vikas.gupta@broadcom.com>,\n Volodymyr Fialko <vfialko@marvell.com>, Wajeeh Atrash <atrwajee@amazon.com>,\n Wisam Jaddo <wisamm@nvidia.com>, Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Yipeng Wang <yipeng1.wang@intel.com>, Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>,\n Zhangfei Gao <zhangfei.gao@linaro.org>, Zhirun Yan <yanzhirun_163@163.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v2 32/83] net/thunderx: move alignment attribute on types", "Date": "Mon, 15 Apr 2024 13:03:54 -0700", "Message-Id": "<1713211485-9021-33-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1713211485-9021-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1710949096-5786-1-git-send-email-roretzla@linux.microsoft.com>\n <1713211485-9021-1-git-send-email-roretzla@linux.microsoft.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Move location of __rte_aligned(a) to new conventional location. The new\nplacement between {struct,union} and the tag allows the desired\nalignment to be imparted on the type regardless of the toolchain being\nused for both C and C++. Additionally, it avoids confusion by Doxygen\nwhen generating documentation.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nAcked-by: Morten Brørup <mb@smartsharesystems.com>\n---\n drivers/net/thunderx/nicvf_rxtx.c | 8 ++++----\n drivers/net/thunderx/nicvf_struct.h | 16 ++++++++--------\n 2 files changed, 12 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/thunderx/nicvf_rxtx.c b/drivers/net/thunderx/nicvf_rxtx.c\nindex defa551..74f43b9 100644\n--- a/drivers/net/thunderx/nicvf_rxtx.c\n+++ b/drivers/net/thunderx/nicvf_rxtx.c\n@@ -76,7 +76,7 @@\n \tuint32_t curr_head;\n \tuint32_t head = sq->head;\n \tstruct rte_mbuf **txbuffs = sq->txbuffs;\n-\tvoid *obj_p[NICVF_MAX_TX_FREE_THRESH] __rte_cache_aligned;\n+\talignas(RTE_CACHE_LINE_SIZE) void *obj_p[NICVF_MAX_TX_FREE_THRESH];\n \n \tcurr_head = nicvf_addr_read(sq->sq_head) >> 4;\n \twhile (head != curr_head) {\n@@ -239,7 +239,7 @@\n \treturn i;\n }\n \n-static const uint32_t ptype_table[16][16] __rte_cache_aligned = {\n+static const alignas(RTE_CACHE_LINE_SIZE) uint32_t ptype_table[16][16] = {\n \t[L3_NONE][L4_NONE] = RTE_PTYPE_UNKNOWN,\n \t[L3_NONE][L4_IPSEC_ESP] = RTE_PTYPE_UNKNOWN,\n \t[L3_NONE][L4_IPFRAG] = RTE_PTYPE_L4_FRAG,\n@@ -342,7 +342,7 @@\n static inline uint64_t __rte_hot\n nicvf_set_olflags(const cqe_rx_word0_t cqe_rx_w0)\n {\n-\tstatic const uint64_t flag_table[3] __rte_cache_aligned = {\n+\tstatic const alignas(RTE_CACHE_LINE_SIZE) uint64_t flag_table[3] = {\n \t\tRTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD,\n \t\tRTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN,\n \t\tRTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_BAD,\n@@ -363,7 +363,7 @@\n \tstruct rbdr_entry_t *desc = rbdr->desc;\n \tuint32_t qlen_mask = rbdr->qlen_mask;\n \tuintptr_t door = rbdr->rbdr_door;\n-\tvoid *obj_p[NICVF_MAX_RX_FREE_THRESH] __rte_cache_aligned;\n+\talignas(RTE_CACHE_LINE_SIZE) void *obj_p[NICVF_MAX_RX_FREE_THRESH];\n \n \tif (unlikely(rte_mempool_get_bulk(rxq->pool, obj_p, to_fill) < 0)) {\n \t\trte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed +=\ndiff --git a/drivers/net/thunderx/nicvf_struct.h b/drivers/net/thunderx/nicvf_struct.h\nindex 13cf8fe..cfcd942 100644\n--- a/drivers/net/thunderx/nicvf_struct.h\n+++ b/drivers/net/thunderx/nicvf_struct.h\n@@ -14,7 +14,7 @@\n #include <ethdev_driver.h>\n #include <rte_memory.h>\n \n-struct nicvf_rbdr {\n+struct __rte_cache_aligned nicvf_rbdr {\n \tuintptr_t rbdr_status;\n \tuintptr_t rbdr_door;\n \tstruct rbdr_entry_t *desc;\n@@ -24,9 +24,9 @@ struct nicvf_rbdr {\n \tuint32_t next_tail;\n \tuint32_t head;\n \tuint32_t qlen_mask;\n-} __rte_cache_aligned;\n+};\n \n-struct nicvf_txq {\n+struct __rte_cache_aligned nicvf_txq {\n \tunion sq_entry_t *desc;\n \tnicvf_iova_addr_t phys;\n \tstruct rte_mbuf **txbuffs;\n@@ -42,7 +42,7 @@ struct nicvf_txq {\n \tuint64_t offloads;\n \tuint16_t queue_id;\n \tuint16_t tx_free_thresh;\n-} __rte_cache_aligned;\n+};\n \n union mbuf_initializer {\n \tstruct {\n@@ -54,7 +54,7 @@ struct nicvf_txq {\n \tuint64_t value;\n };\n \n-struct nicvf_rxq {\n+struct __rte_cache_aligned nicvf_rxq {\n \tRTE_MARKER rxq_fastpath_data_start;\n \tuint8_t rbptr_offset;\n \tuint16_t rx_free_thresh;\n@@ -76,9 +76,9 @@ struct nicvf_rxq {\n \tuint16_t queue_id;\n \tstruct nicvf *nic;\n \tnicvf_iova_addr_t phys;\n-} __rte_cache_aligned;\n+};\n \n-struct nicvf {\n+struct __rte_cache_aligned nicvf {\n \tuint8_t vf_id;\n \tuint8_t node;\n \tuintptr_t reg_base;\n@@ -111,7 +111,7 @@ struct nicvf {\n \tuint8_t sqs_count;\n #define MAX_SQS_PER_VF 11\n \tstruct nicvf *snicvf[MAX_SQS_PER_VF];\n-} __rte_cache_aligned;\n+};\n \n struct change_link_mode {\n \tbool\t enable;\n", "prefixes": [ "v2", "32/83" ] }