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GET /api/patches/138487/?format=api
{ "id": 138487, "url": "http://patches.dpdk.org/api/patches/138487/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240320072332.1433526-1-wenwux.ma@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240320072332.1433526-1-wenwux.ma@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240320072332.1433526-1-wenwux.ma@intel.com", "date": "2024-03-20T07:23:32", "name": "[v3] dmadev: fix structure alignment", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "baf7603ec51053711462b5f90bf1521923cced50", "submitter": { "id": 2163, "url": "http://patches.dpdk.org/api/people/2163/?format=api", "name": "Ma, WenwuX", "email": "wenwux.ma@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240320072332.1433526-1-wenwux.ma@intel.com/mbox/", "series": [ { "id": 31562, "url": "http://patches.dpdk.org/api/series/31562/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31562", "date": "2024-03-20T07:23:32", "name": "[v3] dmadev: fix structure alignment", "version": 3, "mbox": "http://patches.dpdk.org/series/31562/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/138487/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/138487/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 89A3443CFE;\n\tWed, 20 Mar 2024 08:36:27 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6A09B40F1A;\n\tWed, 20 Mar 2024 08:36:27 +0100 (CET)", "from mgamail.intel.com (mgamail.intel.com [192.198.163.18])\n by mails.dpdk.org (Postfix) with ESMTP id 26B11402A2;\n Wed, 20 Mar 2024 08:36:25 +0100 (CET)", "from fmviesa005.fm.intel.com ([10.60.135.145])\n by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 20 Mar 2024 00:36:24 -0700", "from unknown (HELO localhost.localdomain) ([10.239.252.55])\n by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 20 Mar 2024 00:36:22 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1710920185; x=1742456185;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=ayjyL3xPGgKlnU8q02oLgKhHgdvoXnOjclOhRTafxcU=;\n b=lfPWSNAnu9zfi0vkolmMzyqzhBplPTh2WaKXMwSPG0kmjQhhZ9WXvRbf\n qNvybkVei1jfhCUFXKckQaX1K3E75lVYGCjQeFKt4oKbf2HxSsy2KZ8VL\n GEechIizpvZidkTKoZwu+54FVpAzPZELoaQ7GdOmSUAvtXqfWrp8fBpct\n QRRAs6mD9c5243XwrlMS0bMg2ThvdwqTssYiqHA9V8tzvr/if1Q5LGBbx\n d9yRvykKWCjSAe1pmkp7u7cqzdSJZIh7na2UQmbFn0Py7/YwgwGCejsZz\n TI2f+rqIcWgEdUjyuRYzwI0v8+lhNEMWQD4zHyMcCoVY6GU76ao4xpJew Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,11018\"; a=\"5664010\"", "E=Sophos;i=\"6.07,139,1708416000\";\n d=\"scan'208\";a=\"5664010\"", "E=Sophos;i=\"6.07,139,1708416000\"; d=\"scan'208\";a=\"18532723\"" ], "X-ExtLoop1": "1", "From": "Wenwu Ma <wenwux.ma@intel.com>", "To": "dev@dpdk.org,\n\tfengchengwen@huawei.com", "Cc": "songx.jiale@intel.com,\n\tWenwu Ma <wenwux.ma@intel.com>,\n\tstable@dpdk.org", "Subject": "[PATCH v3] dmadev: fix structure alignment", "Date": "Wed, 20 Mar 2024 15:23:32 +0800", "Message-Id": "<20240320072332.1433526-1-wenwux.ma@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20240308053711.1260154-1-wenwux.ma@intel.com>", "References": "<20240308053711.1260154-1-wenwux.ma@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The structure rte_dma_dev needs to be aligned to the cache line, but\nthe return value of malloc may not be aligned to the cache line. When\nwe use memset to clear the rte_dma_dev object, it may cause a segmentation\nfault in clang-x86-platform.\n\nThis is because clang uses the \"vmovaps\" assembly instruction for\nmemset, which requires that the operands (rte_dma_dev objects) must\naligned on a 16-byte boundary or a general-protection exception (#GP)\nis generated.\n\nTherefore, either additional memory is applied for re-alignment, or the\nrte_dma_dev object does not require cache line alignment. The patch\nchooses the former option to fix the issue.\n\nFixes: b36970f2e13e (\"dmadev: introduce DMA device library\")\nCc: stable@dpdk.org\n\nSigned-off-by: Wenwu Ma <wenwux.ma@intel.com>\n---\nv2:\n - Because of performance drop, adjust the code to\n no longer demand cache line alignment\nv3:\n - back to v1 patch\n\n---\n lib/dmadev/rte_dmadev.c | 18 ++++++++++++++----\n 1 file changed, 14 insertions(+), 4 deletions(-)", "diff": "diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c\nindex 5953a77bd6..61e106d574 100644\n--- a/lib/dmadev/rte_dmadev.c\n+++ b/lib/dmadev/rte_dmadev.c\n@@ -160,15 +160,25 @@ static int\n dma_dev_data_prepare(void)\n {\n \tsize_t size;\n+\tvoid *ptr;\n \n \tif (rte_dma_devices != NULL)\n \t\treturn 0;\n \n-\tsize = dma_devices_max * sizeof(struct rte_dma_dev);\n-\trte_dma_devices = malloc(size);\n-\tif (rte_dma_devices == NULL)\n+\t/* The dma device object is expected to align cacheline, but\n+\t * the return value of malloc may not be aligned to the cache line.\n+\t * Therefore, extra memory is applied for realignment.\n+\t * note: We do not call posix_memalign/aligned_alloc because it is\n+\t * version dependent on libc.\n+\t */\n+\tsize = dma_devices_max * sizeof(struct rte_dma_dev) +\n+\t\tRTE_CACHE_LINE_SIZE;\n+\tptr = malloc(size);\n+\tif (ptr == NULL)\n \t\treturn -ENOMEM;\n-\tmemset(rte_dma_devices, 0, size);\n+\tmemset(ptr, 0, size);\n+\n+\trte_dma_devices = RTE_PTR_ALIGN(ptr, RTE_CACHE_LINE_SIZE);\n \n \treturn 0;\n }\n", "prefixes": [ "v3" ] }