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GET /api/patches/138041/?format=api
{ "id": 138041, "url": "http://patches.dpdk.org/api/patches/138041/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240306122445.4350-29-shaibran@amazon.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240306122445.4350-29-shaibran@amazon.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240306122445.4350-29-shaibran@amazon.com", "date": "2024-03-06T12:24:40", "name": "[v3,28/33] net/ena/hal: cosmetic changes", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "1cd828a88f6c03ef43b3406cc1fe95e0bb099c3b", "submitter": { "id": 2930, "url": "http://patches.dpdk.org/api/people/2930/?format=api", "name": "Brandes, Shai", "email": "shaibran@amazon.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240306122445.4350-29-shaibran@amazon.com/mbox/", "series": [ { "id": 31397, "url": "http://patches.dpdk.org/api/series/31397/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31397", "date": "2024-03-06T12:24:13", "name": "net/ena: v2.9.0 driver release", "version": 3, "mbox": "http://patches.dpdk.org/series/31397/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/138041/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/138041/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 851D243C5B;\n\tWed, 6 Mar 2024 13:28:39 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8143942EAE;\n\tWed, 6 Mar 2024 13:26:00 +0100 (CET)", "from smtp-fw-52003.amazon.com (smtp-fw-52003.amazon.com\n [52.119.213.152])\n by mails.dpdk.org (Postfix) with ESMTP id 9376142EB3\n for <dev@dpdk.org>; Wed, 6 Mar 2024 13:25:58 +0100 (CET)", "from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO\n smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6])\n by smtp-border-fw-52003.iad7.amazon.com with\n ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:58 +0000", "from EX19MTAEUA001.ant.amazon.com [10.0.43.254:14998]\n by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.3.166:2525]\n with esmtp (Farcaster)\n id 55a2aa74-a67d-46f7-88ca-953077d18d9a; Wed, 6 Mar 2024 12:25:56 +0000 (UTC)", "from EX19D007EUA001.ant.amazon.com (10.252.50.133) by\n EX19MTAEUA001.ant.amazon.com (10.252.50.50) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1258.28; Wed, 6 Mar 2024 12:25:48 +0000", "from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by\n EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1258.28; Wed, 6 Mar 2024 12:25:47 +0000", "from HFA15-CG15235BS.amazon.com (10.1.213.21) by\n mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id\n 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:46 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209;\n t=1709727958; x=1741263958;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version;\n bh=JN4Cdp67AP725W6CBVT8Kd96v7Zzn8D7wLAc5SBHAVY=;\n b=K+QmP1gcPOzFbo76ajTxWWzMRwzfnAo7hRIzOfyyWnoA4zYbK2Ih8Gq8\n 58JRRO0pli1GlwX5w39Yk69ox2VMu7eVbo9vKx137/blOb7IxduWztTMN\n U7u6pJsW1iAkKcEImlw1CWheA3SWL4epsNq445dSNSxc4WAC3TaZoVRCl s=;", "X-IronPort-AV": "E=Sophos;i=\"6.06,208,1705363200\"; d=\"scan'208\";a=\"642739822\"", "X-Farcaster-Flow-ID": "55a2aa74-a67d-46f7-88ca-953077d18d9a", "From": "<shaibran@amazon.com>", "To": "<ferruh.yigit@amd.com>", "CC": "<dev@dpdk.org>, Shai Brandes <shaibran@amazon.com>", "Subject": "[PATCH v3 28/33] net/ena/hal: cosmetic changes", "Date": "Wed, 6 Mar 2024 14:24:40 +0200", "Message-ID": "<20240306122445.4350-29-shaibran@amazon.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20240306122445.4350-1-shaibran@amazon.com>", "References": "<20240306122445.4350-1-shaibran@amazon.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Shai Brandes <shaibran@amazon.com>\n\n1. modify log prints to use correct format specifier\n for unsigned variables.\n2. removed line breaks for lines that do not exceed\n maximal line length.\n\nSigned-off-by: Shai Brandes <shaibran@amazon.com>\nReviewed-by: Amit Bernstein <amitbern@amazon.com>\n---\n drivers/net/ena/hal/ena_eth_com.c | 22 +++++++++++-----------\n drivers/net/ena/hal/ena_plat_dpdk.h | 5 ++---\n 2 files changed, 13 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/net/ena/hal/ena_eth_com.c b/drivers/net/ena/hal/ena_eth_com.c\nindex ebad38d15a..87a2dbfba1 100644\n--- a/drivers/net/ena/hal/ena_eth_com.c\n+++ b/drivers/net/ena/hal/ena_eth_com.c\n@@ -64,7 +64,7 @@ static int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq,\n \n \t\tio_sq->entries_in_tx_burst_left--;\n \t\tena_trc_dbg(ena_com_io_sq_to_ena_dev(io_sq),\n-\t\t\t \"Decreasing entries_in_tx_burst_left of queue %d to %d\\n\",\n+\t\t\t \"Decreasing entries_in_tx_burst_left of queue %u to %u\\n\",\n \t\t\t io_sq->qid, io_sq->entries_in_tx_burst_left);\n \t}\n \n@@ -259,7 +259,7 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,\n \t\tif (unlikely((status & ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK) >>\n \t\t ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT && count != 0)) {\n \t\t\tena_trc_err(dev,\n-\t\t\t\t \"First bit is on in descriptor #%d on q_id: %d, req_id: %u\\n\",\n+\t\t\t\t \"First bit is on in descriptor #%u on q_id: %u, req_id: %u\\n\",\n \t\t\t\t count, io_cq->qid, cdesc->req_id);\n \t\t\treturn ENA_COM_FAULT;\n \t\t}\n@@ -268,7 +268,7 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,\n \t\t\t\t\tENA_ETH_IO_RX_CDESC_BASE_MBZ17_MASK)) &&\n \t\t\t ena_com_get_cap(dev, ENA_ADMIN_CDESC_MBZ))) {\n \t\t\tena_trc_err(dev,\n-\t\t\t\t \"Corrupted RX descriptor #%d on q_id: %d, req_id: %u\\n\",\n+\t\t\t\t \"Corrupted RX descriptor #%u on q_id: %u, req_id: %u\\n\",\n \t\t\t\t count, io_cq->qid, cdesc->req_id);\n \t\t\treturn ENA_COM_FAULT;\n \t\t}\n@@ -288,7 +288,7 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,\n \t\tio_cq->cur_rx_pkt_cdesc_start_idx = head_masked;\n \n \t\tena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),\n-\t\t\t \"ENA q_id: %d packets were completed. first desc idx %u descs# %d\\n\",\n+\t\t\t \"ENA q_id: %u packets were completed. first desc idx %u descs# %u\\n\",\n \t\t\t io_cq->qid, *first_cdesc_idx, count);\n \t} else {\n \t\tio_cq->cur_rx_pkt_cdesc_count = count;\n@@ -394,7 +394,7 @@ static void ena_com_rx_set_flags(struct ena_com_io_cq *io_cq,\n \t\tENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT;\n \n \tena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),\n-\t\t \"l3_proto %d l4_proto %d l3_csum_err %d l4_csum_err %d hash %d frag %d cdesc_status %x\\n\",\n+\t\t \"l3_proto %d l4_proto %d l3_csum_err %d l4_csum_err %d hash %u frag %d cdesc_status %x\\n\",\n \t\t ena_rx_ctx->l3_proto,\n \t\t ena_rx_ctx->l4_proto,\n \t\t ena_rx_ctx->l3_csum_err,\n@@ -434,7 +434,7 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,\n \n \tif (unlikely(header_len > io_sq->tx_max_header_size)) {\n \t\tena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),\n-\t\t\t \"Header size is too large %d max header: %d\\n\",\n+\t\t\t \"Header size is too large %u max header: %u\\n\",\n \t\t\t header_len, io_sq->tx_max_header_size);\n \t\treturn ENA_COM_INVAL;\n \t}\n@@ -592,12 +592,12 @@ int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,\n \t}\n \n \tena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),\n-\t\t \"Fetch rx packet: queue %d completed desc: %d\\n\",\n+\t\t \"Fetch rx packet: queue %u completed desc: %u\\n\",\n \t\t io_cq->qid, nb_hw_desc);\n \n \tif (unlikely(nb_hw_desc > ena_rx_ctx->max_bufs)) {\n \t\tena_trc_err(ena_com_io_cq_to_ena_dev(io_cq),\n-\t\t\t \"Too many RX cdescs (%d) > MAX(%d)\\n\",\n+\t\t\t \"Too many RX cdescs (%u) > MAX(%u)\\n\",\n \t\t\t nb_hw_desc, ena_rx_ctx->max_bufs);\n \t\treturn ENA_COM_NO_SPACE;\n \t}\n@@ -622,7 +622,7 @@ int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,\n \tio_sq->next_to_comp += nb_hw_desc;\n \n \tena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),\n-\t\t \"[%s][QID#%d] Updating SQ head to: %d\\n\", __func__,\n+\t\t \"Updating Queue %u, SQ head to: %u\\n\",\n \t\t io_sq->qid, io_sq->next_to_comp);\n \n \t/* Get rx flags from the last pkt */\n@@ -660,8 +660,8 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,\n \tdesc->req_id = req_id;\n \n \tena_trc_dbg(ena_com_io_sq_to_ena_dev(io_sq),\n-\t\t \"[%s] Adding single RX desc, Queue: %u, req_id: %u\\n\",\n-\t\t __func__, io_sq->qid, req_id);\n+\t\t \"Adding single RX desc, Queue: %u, req_id: %u\\n\",\n+\t\t io_sq->qid, req_id);\n \n \tdesc->buff_addr_lo = (u32)ena_buf->paddr;\n \tdesc->buff_addr_hi =\ndiff --git a/drivers/net/ena/hal/ena_plat_dpdk.h b/drivers/net/ena/hal/ena_plat_dpdk.h\nindex aa8fbb0cd9..fc602971d5 100644\n--- a/drivers/net/ena/hal/ena_plat_dpdk.h\n+++ b/drivers/net/ena/hal/ena_plat_dpdk.h\n@@ -40,7 +40,7 @@ typedef uint64_t dma_addr_t;\n #define ETIME ETIMEDOUT\n #endif\n \n-#define ENA_PRIU64 PRIu64\n+#define ENA_PRIu64 PRIu64\n #define ena_atomic32_t rte_atomic32_t\n #define ena_mem_handle_t const struct rte_memzone *\n \n@@ -73,8 +73,7 @@ typedef uint64_t dma_addr_t;\n /* Redefine memcpy with caution: rte_memcpy can be simply aliased to memcpy, so\n * make the redefinition only if it's safe (and beneficial) to do so.\n */\n-#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64_MEMCPY) || \\\n-\tdefined(RTE_ARCH_ARM_NEON_MEMCPY)\n+#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64_MEMCPY) || defined(RTE_ARCH_ARM_NEON_MEMCPY)\n #undef memcpy\n #define memcpy rte_memcpy\n #endif\n", "prefixes": [ "v3", "28/33" ] }