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GET /api/patches/136804/?format=api
{ "id": 136804, "url": "http://patches.dpdk.org/api/patches/136804/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1707978080-28859-6-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1707978080-28859-6-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1707978080-28859-6-git-send-email-roretzla@linux.microsoft.com", "date": "2024-02-15T06:21:07", "name": "[v4,05/18] net/ice: stop using zero sized marker fields", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "085a338901f5d0c2aef0d33a04eef37895525b4d", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1707978080-28859-6-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31113, "url": "http://patches.dpdk.org/api/series/31113/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31113", "date": "2024-02-15T06:21:02", "name": "stop using zero sized marker fields", "version": 4, "mbox": "http://patches.dpdk.org/series/31113/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136804/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/136804/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1B42D43B06;\n\tThu, 15 Feb 2024 07:22:11 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0BA3B433A9;\n\tThu, 15 Feb 2024 07:21:45 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 9E7A843387\n for <dev@dpdk.org>; Thu, 15 Feb 2024 07:21:37 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 4C0CD207F22E; Wed, 14 Feb 2024 22:21:36 -0800 (PST)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 4C0CD207F22E", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1707978096;\n bh=TeIs3Lkp/T6NPn3Yi1kuP7YSY9nEQ1TwTWry6DHcsgc=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=LpRw+7+vC5E5TaGw7p0b6QJzwn2P9R2Yg2C9lMaC+OzUFFdnR//TRSwcnwNqFbfOd\n vxsQ+wezW5DivzPuji3JvcJ5xvbxTqwYEWqI0datqiB6ROjAnCEUrz0/NbxrZtcwUs\n GVj7jc1DluiUpq1mch70PDg+aRpJCGj2FUncq9ao=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "Ajit Khaparde <ajit.khaparde@broadcom.com>,\n Andrew Boyer <andrew.boyer@amd.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Chenbo Xia <chenbox@nvidia.com>, Chengwen Feng <fengchengwen@huawei.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n Hyong Youb Kim <hyonkim@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jie Hai <haijie1@huawei.com>, Jingjing Wu <jingjing.wu@intel.com>,\n John Daley <johndale@cisco.com>, Kevin Laatz <kevin.laatz@intel.com>,\n Kiran Kumar K <kirankumark@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>, Ori Kam <orika@nvidia.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Satha Rao <skoteshwar@marvell.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, mb@smartsharesystems.com,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v4 05/18] net/ice: stop using zero sized marker fields", "Date": "Wed, 14 Feb 2024 22:21:07 -0800", "Message-Id": "<1707978080-28859-6-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1707978080-28859-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1706657173-26166-1-git-send-email-roretzla@linux.microsoft.com>\n <1707978080-28859-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Update to reference newly named anonymous union markers supported by\nstandard C and stop referencing zero sized compiler extension markers.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n drivers/net/ice/ice_rxtx_vec_avx2.c | 30 +++++++++++++++---------------\n drivers/net/ice/ice_rxtx_vec_avx512.c | 30 +++++++++++++++---------------\n drivers/net/ice/ice_rxtx_vec_common.h | 4 ++--\n drivers/net/ice/ice_rxtx_vec_sse.c | 34 +++++++++++++++++-----------------\n 4 files changed, 49 insertions(+), 49 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c\nindex 6f6d790..2d27f1c 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx2.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx2.c\n@@ -120,13 +120,13 @@\n \t * calls above.\n \t */\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=\n-\t\t\toffsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);\n+\t\t\toffsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=\n-\t\t\toffsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);\n+\t\t\toffsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) !=\n-\t\t\toffsetof(struct rte_mbuf, rx_descriptor_fields1) + 10);\n+\t\t\toffsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 10);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) !=\n-\t\t\toffsetof(struct rte_mbuf, rx_descriptor_fields1) + 12);\n+\t\t\toffsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 12);\n \n \t/* Status/Error flag masks */\n \t/**\n@@ -572,10 +572,10 @@\n \t\t */\n \t\t/* check the structure matches expectations */\n \t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=\n-\t\t\t\t offsetof(struct rte_mbuf, rearm_data) + 8);\n-\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=\n+\t\t\t\t offsetof(struct rte_mbuf, mbuf_rearm_data) + 8);\n+\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, mbuf_rearm_data) !=\n \t\t\t\t RTE_ALIGN(offsetof(struct rte_mbuf,\n-\t\t\t\t\t\t rearm_data),\n+\t\t\t\t\t\t mbuf_rearm_data),\n \t\t\t\t\t 16));\n \t\t/* build up data and do writes */\n \t\t__m256i rearm0, rearm1, rearm2, rearm3, rearm4, rearm5,\n@@ -596,13 +596,13 @@\n \t\trearm2 = _mm256_permute2f128_si256(rearm2, mb2_3, 0x20);\n \t\trearm0 = _mm256_permute2f128_si256(rearm0, mb0_1, 0x20);\n \t\t/* write to mbuf */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->mbuf_rearm_data,\n \t\t\t\t rearm6);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->mbuf_rearm_data,\n \t\t\t\t rearm4);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->mbuf_rearm_data,\n \t\t\t\t rearm2);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->mbuf_rearm_data,\n \t\t\t\t rearm0);\n \n \t\t/* repeat for the odd mbufs */\n@@ -625,13 +625,13 @@\n \t\trearm3 = _mm256_blend_epi32(rearm3, mb2_3, 0xF0);\n \t\trearm1 = _mm256_blend_epi32(rearm1, mb0_1, 0xF0);\n \t\t/* again write to mbufs */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->mbuf_rearm_data,\n \t\t\t\t rearm7);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->mbuf_rearm_data,\n \t\t\t\t rearm5);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->mbuf_rearm_data,\n \t\t\t\t rearm3);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->mbuf_rearm_data,\n \t\t\t\t rearm1);\n \n \t\t/* extract and record EOP bit */\ndiff --git a/drivers/net/ice/ice_rxtx_vec_avx512.c b/drivers/net/ice/ice_rxtx_vec_avx512.c\nindex 04148e8..a31f358 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx512.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx512.c\n@@ -106,13 +106,13 @@\n \t * calls above.\n \t */\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=\n-\t\t\toffsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);\n+\t\t\toffsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=\n-\t\t\toffsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);\n+\t\t\toffsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) !=\n-\t\t\toffsetof(struct rte_mbuf, rx_descriptor_fields1) + 10);\n+\t\t\toffsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 10);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) !=\n-\t\t\toffsetof(struct rte_mbuf, rx_descriptor_fields1) + 12);\n+\t\t\toffsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 12);\n \n \t/* following code block is for Rx Checksum Offload */\n \t/* Status/Error flag masks */\n@@ -570,10 +570,10 @@\n \t\t */\n \t\t/* check the structure matches expectations */\n \t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=\n-\t\t\t\t offsetof(struct rte_mbuf, rearm_data) + 8);\n-\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=\n+\t\t\t\t offsetof(struct rte_mbuf, mbuf_rearm_data) + 8);\n+\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, mbuf_rearm_data) !=\n \t\t\t\t RTE_ALIGN(offsetof(struct rte_mbuf,\n-\t\t\t\t\t\t rearm_data),\n+\t\t\t\t\t\t mbuf_rearm_data),\n \t\t\t\t\t 16));\n \t\t/* build up data and do writes */\n \t\t__m256i rearm0, rearm1, rearm2, rearm3, rearm4, rearm5,\n@@ -597,13 +597,13 @@\n \t\trearm0 = _mm256_permute2f128_si256(rearm0, mb0_1, 0x20);\n \n \t\t/* write to mbuf */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->mbuf_rearm_data,\n \t\t\t\t rearm6);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->mbuf_rearm_data,\n \t\t\t\t rearm4);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->mbuf_rearm_data,\n \t\t\t\t rearm2);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->mbuf_rearm_data,\n \t\t\t\t rearm0);\n \n \t\t/* repeat for the odd mbufs */\n@@ -627,13 +627,13 @@\n \t\trearm3 = _mm256_blend_epi32(rearm3, mb2_3, 0xF0);\n \t\trearm1 = _mm256_blend_epi32(rearm1, mb0_1, 0xF0);\n \t\t/* again write to mbufs */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->mbuf_rearm_data,\n \t\t\t\t rearm7);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->mbuf_rearm_data,\n \t\t\t\t rearm5);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->mbuf_rearm_data,\n \t\t\t\t rearm3);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->mbuf_rearm_data,\n \t\t\t\t rearm1);\n \n \t\t/* extract and record EOP bit */\ndiff --git a/drivers/net/ice/ice_rxtx_vec_common.h b/drivers/net/ice/ice_rxtx_vec_common.h\nindex 4b73465..9b06206 100644\n--- a/drivers/net/ice/ice_rxtx_vec_common.h\n+++ b/drivers/net/ice/ice_rxtx_vec_common.h\n@@ -240,9 +240,9 @@\n \tmb_def.port = rxq->port_id;\n \trte_mbuf_refcnt_set(&mb_def, 1);\n \n-\t/* prevent compiler reordering: rearm_data covers previous fields */\n+\t/* prevent compiler reordering: mbuf_rearm_data covers previous fields */\n \trte_compiler_barrier();\n-\tp = (uintptr_t)&mb_def.rearm_data;\n+\tp = (uintptr_t)&mb_def.mbuf_rearm_data;\n \trxq->mbuf_initializer = *(uint64_t *)p;\n \treturn 0;\n }\ndiff --git a/drivers/net/ice/ice_rxtx_vec_sse.c b/drivers/net/ice/ice_rxtx_vec_sse.c\nindex 9a1b7e3..9fde848 100644\n--- a/drivers/net/ice/ice_rxtx_vec_sse.c\n+++ b/drivers/net/ice/ice_rxtx_vec_sse.c\n@@ -268,13 +268,13 @@\n \n \t/* write the rearm data and the olflags in one write */\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=\n-\t\t\t offsetof(struct rte_mbuf, rearm_data) + 8);\n-\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=\n-\t\t\t RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16));\n-\t_mm_store_si128((__m128i *)&rx_pkts[0]->rearm_data, rearm0);\n-\t_mm_store_si128((__m128i *)&rx_pkts[1]->rearm_data, rearm1);\n-\t_mm_store_si128((__m128i *)&rx_pkts[2]->rearm_data, rearm2);\n-\t_mm_store_si128((__m128i *)&rx_pkts[3]->rearm_data, rearm3);\n+\t\t\t offsetof(struct rte_mbuf, mbuf_rearm_data) + 8);\n+\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, mbuf_rearm_data) !=\n+\t\t\t RTE_ALIGN(offsetof(struct rte_mbuf, mbuf_rearm_data), 16));\n+\t_mm_store_si128((__m128i *)&rx_pkts[0]->mbuf_rearm_data, rearm0);\n+\t_mm_store_si128((__m128i *)&rx_pkts[1]->mbuf_rearm_data, rearm1);\n+\t_mm_store_si128((__m128i *)&rx_pkts[2]->mbuf_rearm_data, rearm2);\n+\t_mm_store_si128((__m128i *)&rx_pkts[3]->mbuf_rearm_data, rearm3);\n }\n \n static inline void\n@@ -348,9 +348,9 @@\n \t * call above.\n \t */\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=\n-\t\t\t offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);\n+\t\t\t offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=\n-\t\t\t offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);\n+\t\t\t offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8);\n \n \t/* 4 packets DD mask */\n \tconst __m128i dd_check = _mm_set_epi64x(0x0000000100000001LL,\n@@ -388,13 +388,13 @@\n \t * here for completeness in case of future modifications.\n \t */\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=\n-\t\t\t offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);\n+\t\t\t offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=\n-\t\t\t offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);\n+\t\t\t offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) !=\n-\t\t\t offsetof(struct rte_mbuf, rx_descriptor_fields1) + 10);\n+\t\t\t offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 10);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) !=\n-\t\t\t offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12);\n+\t\t\t offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 12);\n \n \t/* Cache is empty -> need to scan the buffer rings, but first move\n \t * the next 'n' mbufs into the cache\n@@ -542,10 +542,10 @@\n \n \t\t/* D.3 copy final 3,4 data to rx_pkts */\n \t\t_mm_storeu_si128\n-\t\t\t((void *)&rx_pkts[pos + 3]->rx_descriptor_fields1,\n+\t\t\t((void *)&rx_pkts[pos + 3]->mbuf_rx_descriptor_fields1,\n \t\t\t pkt_mb3);\n \t\t_mm_storeu_si128\n-\t\t\t((void *)&rx_pkts[pos + 2]->rx_descriptor_fields1,\n+\t\t\t((void *)&rx_pkts[pos + 2]->mbuf_rx_descriptor_fields1,\n \t\t\t pkt_mb2);\n \n \t\t/* C* extract and record EOP bit */\n@@ -569,9 +569,9 @@\n \n \t\t/* D.3 copy final 1,2 data to rx_pkts */\n \t\t_mm_storeu_si128\n-\t\t\t((void *)&rx_pkts[pos + 1]->rx_descriptor_fields1,\n+\t\t\t((void *)&rx_pkts[pos + 1]->mbuf_rx_descriptor_fields1,\n \t\t\t pkt_mb1);\n-\t\t_mm_storeu_si128((void *)&rx_pkts[pos]->rx_descriptor_fields1,\n+\t\t_mm_storeu_si128((void *)&rx_pkts[pos]->mbuf_rx_descriptor_fields1,\n \t\t\t\t pkt_mb0);\n \t\tice_rx_desc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl);\n \t\t/* C.4 calc available number of desc */\n", "prefixes": [ "v4", "05/18" ] }