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GET /api/patches/136693/?format=api
http://patches.dpdk.org/api/patches/136693/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1707884270-27189-2-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1707884270-27189-2-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1707884270-27189-2-git-send-email-roretzla@linux.microsoft.com", "date": "2024-02-14T04:17:37", "name": "[v2,01/14] eal: use C11 alignas", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "859bcb0c4ada530e10442ad3b408f0dea7f3dbde", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1707884270-27189-2-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31101, "url": "http://patches.dpdk.org/api/series/31101/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31101", "date": "2024-02-14T04:17:36", "name": "use C11 alignas and normalize type alignment", "version": 2, "mbox": "http://patches.dpdk.org/series/31101/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136693/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/136693/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A381D43B1F;\n\tWed, 14 Feb 2024 05:17:59 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1171642F17;\n\tWed, 14 Feb 2024 05:17:56 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 6D47B42DF9\n for <dev@dpdk.org>; Wed, 14 Feb 2024 05:17:52 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 9848A20B2000; Tue, 13 Feb 2024 20:17:51 -0800 (PST)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 9848A20B2000", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1707884271;\n bh=hfAtSjq/K1fK0h2rxr+rCrcDr5skYGN5ajG3Dgor7io=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=oJvfwOoiYdiMYooXvRJu7uJVmk/HuE79N/oJ8T5MPbsWuiLveZ+yrsZ1i5L9gXmwa\n bdpa8JvOoItGqnahGQ9is8bJaTHd6G4esRM8MR0MF8yuhf48XoqOQllnPiiKM2/M+W\n tCJsaIczsb0hgPh7Bi2uR1zjkEnxsNunEmBWJEdw=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Chengwen Feng <fengchengwen@huawei.com>,\n Cristian Dumitrescu <cristian.dumitrescu@intel.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n David Hunt <david.hunt@intel.com>, Ferruh Yigit <ferruh.yigit@amd.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jasvinder Singh <jasvinder.singh@intel.com>,\n Jerin Jacob <jerinj@marvell.com>, Kevin Laatz <kevin.laatz@intel.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Min Zhou <zhoumin@loongson.cn>, Ruifeng Wang <ruifeng.wang@arm.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Stanislaw Kardach <kda@semihalf.com>,\n Thomas Monjalon <thomas@monjalon.net>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Yipeng Wang <yipeng1.wang@intel.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v2 01/14] eal: use C11 alignas", "Date": "Tue, 13 Feb 2024 20:17:37 -0800", "Message-Id": "<1707884270-27189-2-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1707884270-27189-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1707873986-29352-1-git-send-email-roretzla@linux.microsoft.com>\n <1707884270-27189-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "* Expand __rte_aligned(a) to __declspec(align(a)) when building\n with MSVC.\n\n* Move __rte_aligned from the end of {struct,union} definitions to\n be between {struct,union} and tag.\n\n The placement between {struct,union} and the tag allows the desired\n alignment to be imparted on the type regardless of the toolchain being\n used for all of GCC, LLVM, MSVC compilers building both C and C++.\n\n* Replace use of __rte_aligned(a) on variables/fields with alignas(a).\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n lib/eal/arm/include/rte_vect.h | 4 ++--\n lib/eal/include/generic/rte_atomic.h | 4 ++--\n lib/eal/include/rte_common.h | 2 +-\n lib/eal/loongarch/include/rte_vect.h | 8 ++++----\n lib/eal/ppc/include/rte_vect.h | 4 ++--\n lib/eal/riscv/include/rte_vect.h | 4 ++--\n lib/eal/x86/include/rte_vect.h | 4 ++--\n 7 files changed, 15 insertions(+), 15 deletions(-)", "diff": "diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h\nindex 8cfe4bd..c97d299 100644\n--- a/lib/eal/arm/include/rte_vect.h\n+++ b/lib/eal/arm/include/rte_vect.h\n@@ -24,14 +24,14 @@\n #define\tXMM_SIZE\t(sizeof(xmm_t))\n #define\tXMM_MASK\t(XMM_SIZE - 1)\n \n-typedef union rte_xmm {\n+typedef union __rte_aligned(16) rte_xmm {\n \txmm_t x;\n \tuint8_t u8[XMM_SIZE / sizeof(uint8_t)];\n \tuint16_t u16[XMM_SIZE / sizeof(uint16_t)];\n \tuint32_t u32[XMM_SIZE / sizeof(uint32_t)];\n \tuint64_t u64[XMM_SIZE / sizeof(uint64_t)];\n \tdouble pd[XMM_SIZE / sizeof(double)];\n-} __rte_aligned(16) rte_xmm_t;\n+} rte_xmm_t;\n \n #if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)\n /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */\ndiff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h\nindex 0e639da..f859707 100644\n--- a/lib/eal/include/generic/rte_atomic.h\n+++ b/lib/eal/include/generic/rte_atomic.h\n@@ -1094,7 +1094,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)\n /**\n * 128-bit integer structure.\n */\n-typedef struct {\n+typedef struct __rte_aligned(16) {\n \tunion {\n \t\tuint64_t val[2];\n #ifdef RTE_ARCH_64\n@@ -1103,7 +1103,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)\n #endif\n #endif\n \t};\n-} __rte_aligned(16) rte_int128_t;\n+} rte_int128_t;\n \n #ifdef __DOXYGEN__\n \ndiff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h\nindex d7d6390..8367b96 100644\n--- a/lib/eal/include/rte_common.h\n+++ b/lib/eal/include/rte_common.h\n@@ -65,7 +65,7 @@\n * Force alignment\n */\n #ifdef RTE_TOOLCHAIN_MSVC\n-#define __rte_aligned(a)\n+#define __rte_aligned(a) __declspec(align(a))\n #else\n #define __rte_aligned(a) __attribute__((__aligned__(a)))\n #endif\ndiff --git a/lib/eal/loongarch/include/rte_vect.h b/lib/eal/loongarch/include/rte_vect.h\nindex 1546515..aa334e8 100644\n--- a/lib/eal/loongarch/include/rte_vect.h\n+++ b/lib/eal/loongarch/include/rte_vect.h\n@@ -15,7 +15,7 @@\n \n #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_DISABLED\n \n-typedef union xmm {\n+typedef union __rte_aligned(16) xmm {\n \tint8_t i8[16];\n \tint16_t i16[8];\n \tint32_t i32[4];\n@@ -25,19 +25,19 @@\n \tuint32_t u32[4];\n \tuint64_t u64[2];\n \tdouble pd[2];\n-} __rte_aligned(16) xmm_t;\n+} xmm_t;\n \n #define XMM_SIZE (sizeof(xmm_t))\n #define XMM_MASK (XMM_SIZE - 1)\n \n-typedef union rte_xmm {\n+typedef union __rte_aligned(16) rte_xmm {\n \txmm_t\t x;\n \tuint8_t\t u8[XMM_SIZE / sizeof(uint8_t)];\n \tuint16_t u16[XMM_SIZE / sizeof(uint16_t)];\n \tuint32_t u32[XMM_SIZE / sizeof(uint32_t)];\n \tuint64_t u64[XMM_SIZE / sizeof(uint64_t)];\n \tdouble pd[XMM_SIZE / sizeof(double)];\n-} __rte_aligned(16) rte_xmm_t;\n+} rte_xmm_t;\n \n static inline xmm_t\n vect_load_128(void *p)\ndiff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h\nindex a5f009b..c8bace2 100644\n--- a/lib/eal/ppc/include/rte_vect.h\n+++ b/lib/eal/ppc/include/rte_vect.h\n@@ -22,14 +22,14 @@\n #define\tXMM_SIZE\t(sizeof(xmm_t))\n #define\tXMM_MASK\t(XMM_SIZE - 1)\n \n-typedef union rte_xmm {\n+typedef union __rte_aligned(16) rte_xmm {\n \txmm_t x;\n \tuint8_t u8[XMM_SIZE / sizeof(uint8_t)];\n \tuint16_t u16[XMM_SIZE / sizeof(uint16_t)];\n \tuint32_t u32[XMM_SIZE / sizeof(uint32_t)];\n \tuint64_t u64[XMM_SIZE / sizeof(uint64_t)];\n \tdouble pd[XMM_SIZE / sizeof(double)];\n-} __rte_aligned(16) rte_xmm_t;\n+} rte_xmm_t;\n \n #ifdef __cplusplus\n }\ndiff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h\nindex da9092a..6df10fa 100644\n--- a/lib/eal/riscv/include/rte_vect.h\n+++ b/lib/eal/riscv/include/rte_vect.h\n@@ -22,14 +22,14 @@\n #define XMM_SIZE\t(sizeof(xmm_t))\n #define XMM_MASK\t(XMM_SIZE - 1)\n \n-typedef union rte_xmm {\n+typedef union __rte_aligned(16) rte_xmm {\n \txmm_t\t\tx;\n \tuint8_t\t\tu8[XMM_SIZE / sizeof(uint8_t)];\n \tuint16_t\tu16[XMM_SIZE / sizeof(uint16_t)];\n \tuint32_t\tu32[XMM_SIZE / sizeof(uint32_t)];\n \tuint64_t\tu64[XMM_SIZE / sizeof(uint64_t)];\n \tdouble\t\tpd[XMM_SIZE / sizeof(double)];\n-} __rte_aligned(16) rte_xmm_t;\n+} rte_xmm_t;\n \n static inline xmm_t\n vect_load_128(void *p)\ndiff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h\nindex 560f9e4..a1a537e 100644\n--- a/lib/eal/x86/include/rte_vect.h\n+++ b/lib/eal/x86/include/rte_vect.h\n@@ -91,7 +91,7 @@\n #define RTE_X86_ZMM_SIZE\t(sizeof(__m512i))\n #define RTE_X86_ZMM_MASK\t(RTE_X86_ZMM_SIZE - 1)\n \n-typedef union __rte_x86_zmm {\n+typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {\n \t__m512i\t z;\n \tymm_t y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];\n \txmm_t x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];\n@@ -100,7 +100,7 @@\n \tuint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];\n \tuint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];\n \tdouble pd[RTE_X86_ZMM_SIZE / sizeof(double)];\n-} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;\n+} __rte_x86_zmm_t;\n \n #endif /* __AVX512F__ */\n \n", "prefixes": [ "v2", "01/14" ] }{ "id": 136693, "url": "