Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/136415/?format=api
{ "id": 136415, "url": "http://patches.dpdk.org/api/patches/136415/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240206020626.545946-5-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240206020626.545946-5-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240206020626.545946-5-suanmingm@nvidia.com", "date": "2024-02-06T02:06:25", "name": "[v7,4/4] net/mlx5: add compare item support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "1afc8ec58f89b61892dbd9046d62010a1e00593a", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240206020626.545946-5-suanmingm@nvidia.com/mbox/", "series": [ { "id": 31005, "url": "http://patches.dpdk.org/api/series/31005/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31005", "date": "2024-02-06T02:06:21", "name": "ethdev: add RTE_FLOW_ITEM_TYPE_COMPARE", "version": 7, "mbox": "http://patches.dpdk.org/series/31005/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136415/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/136415/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1081D43A94;\n\tTue, 6 Feb 2024 03:07:26 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B9B05410E7;\n\tTue, 6 Feb 2024 03:07:15 +0100 (CET)", "from NAM02-DM3-obe.outbound.protection.outlook.com\n (mail-dm3nam02on2075.outbound.protection.outlook.com [40.107.95.75])\n by mails.dpdk.org (Postfix) with ESMTP id 6255D410E3\n for <dev@dpdk.org>; Tue, 6 Feb 2024 03:07:14 +0100 (CET)", "from BYAPR08CA0025.namprd08.prod.outlook.com (2603:10b6:a03:100::38)\n by CH3PR12MB8535.namprd12.prod.outlook.com (2603:10b6:610:160::19)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7270.15; Tue, 6 Feb\n 2024 02:07:11 +0000", "from SJ1PEPF00001CE9.namprd03.prod.outlook.com\n (2603:10b6:a03:100:cafe::74) by BYAPR08CA0025.outlook.office365.com\n (2603:10b6:a03:100::38) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7249.34 via Frontend\n Transport; Tue, 6 Feb 2024 02:07:11 +0000", "from mail.nvidia.com (216.228.117.160) by\n SJ1PEPF00001CE9.mail.protection.outlook.com (10.167.242.25) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.7202.16 via Frontend Transport; Tue, 6 Feb 2024 02:07:11 +0000", "from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com\n (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Mon, 5 Feb 2024\n 18:06:57 -0800", "from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com\n (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Mon, 5 Feb\n 2024 18:06:54 -0800" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=BYbOf5v7xb9XR56ucZTllQhTJjyNxNtRSTr/7+MATst7N03bY0bZnePTI+G/a4yiEvr7m5Kc5OsSjJ3Dk0kqijFgWPEXMbiB9NYlM8V1eqFJ558rGfOCk2daSNwqWVlzc9vXyjr+e8LZMkJc6FvNHpOD2hPXH1uRzHb0d4IM2sZDJ5bFnKDGhx8U3A025wsci4r7qEuHEGyMZw5upsb7H7KmW5v0x3udXWv/Gu/lgXMGergRXsM0irUm10T8yXa0k957vgKtRilR/QoDOo1bPnxKH7lvkNJt0pN1/NFFIvHc9EiCIe5isBld9z2Q/HvZOlACT70bD4PRdRY11y2tEA==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=OdLPwlX3F56dwv69N+yzKNjklBBfQZEqnRTE2/cBAxE=;\n b=b+N/M9UlsbZMCYyllw/z+qDmUmHoHUoyREQDo+lqoVDlFTeHuwKBTMktTfh5KHn2O7NQDFAfeLOBPK1ElMFxJ8loc5i6xrOgSuxE7msp1GMdL6DADBXxon0Wg4+7BIewqmkL10nQMI1fRhXmnGZBiASJzeoCpFLE8cjHY/0kNgAVnU8KKYBA7u7NiDlrdQfUkkQI8688SAQOVjvz4ZA1MVxLdyHQtE6CHODga+vYrgaxEXnIL+AeDob+Mte2jdFD89Yw3+X9NDRYCAS1asdH0y8KxHTU0UUE+rPxUNeFQUdsP3XBcwKv/1hk25JoqeB3whuY9DJ3HLsvA810NMc0Ww==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.117.160) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none (0)", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=OdLPwlX3F56dwv69N+yzKNjklBBfQZEqnRTE2/cBAxE=;\n b=bEIbvZrmsGnPgNVOtl2q2BW9B7mCabRlidweDP1k6hYEid+rAVuOsX1QaMCzNdrHj1mi467Fud8nh1amCKcNdRcITb0Aha/D1b8l/lpwXFyrsqsjdPclHfY/9c//MH6T+rZ/+A14i3R8t4kq8vm5pL37vNqOlRRF8LyOy/K8EzgNrBdAzkr/MjFiiSedAXKYaFCOQqh6SGCRgp1Zeebk1EUbYhECcZwGP0nHhI8kKx7fwGinZao1oyu15qp0vV7fP3T62mju3fGSclDXS9ZrOWf3/5icuGB8vsaZH2QyrLb3AFGhatFQmIV0r+C1mDIuLMbZuPaimTxTApPO0WlmLA==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.160)\n smtp.mailfrom=nvidia.com;\n dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.160 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "<thomas@monjalon.net>, <ferruh.yigit@amd.com>, Dariusz Sosnowski\n <dsosnowski@nvidia.com>, Viacheslav Ovsiienko <viacheslavo@nvidia.com>, \"Ori\n Kam\" <orika@nvidia.com>, Matan Azrad <matan@nvidia.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH v7 4/4] net/mlx5: add compare item support", "Date": "Tue, 6 Feb 2024 10:06:25 +0800", "Message-ID": "<20240206020626.545946-5-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20240206020626.545946-1-suanmingm@nvidia.com>", "References": "<20231214031227.363911-1-suanmingm@nvidia.com>\n <20240206020626.545946-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "SJ1PEPF00001CE9:EE_|CH3PR12MB8535:EE_", "X-MS-Office365-Filtering-Correlation-Id": "0f95c156-6315-4f3e-975e-08dc26b85490", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n DlmmBVqaUOOh+kYrMjdLKakN4I8LNtiXpGrHnAV4kRI3AuRfF1o+NEfU5lJqvKNSiyuV+gdBXkx7KnQGQ26GmpMxeKsdzQf/CoYKZycU2jjm5jt/cvihlSMZ+zA17L0PQ7d1qmVE8B/FeZx9Oq9HOX3sJBdJCF9/fQIjRnYRxZk+8YGN2c8VuZUuGpluMYzL6qI97xxqxYPQdC8/Sr6+N9ZpKgQbD0zEpI2vTuGrpmC1TwuR262lvpj/MJpS3T70rVO4Yr8asL7meDlEpNAdl3JaZ55WI4ZySKpFPJpZsRIFZZFhoEAYblWkVrug1s2UQaXC4Xs1Lux+q+DdiYcHBCfmYN2Sf3fODwnfc/PXClgRphyzPIqShoBvuHW+JbZwI0ovzI6tPgfC7upKPEHHjPcO66bjZk+SdX66FGxKsCSzw0uKOSkrdfWlgmXHhDTnNCyngM3BdklLiDAQlKp83WJzU97uV8AZMGRZeUR32qzsm3AMtEc8ctQWb+LP900PocbbY8+I37V7avmHnx543g1vB7yMcmSblIepevb6c6upLMXOBNKg1t3KmNDXwqnvUjmk/qfwJb9lYzA0R5Tt0FPShxS61RSJRL0M+L8nn7anQc+JqH76o3zmkuUXAqlC9twsLwzdkfwIz/TjKUk8/10c/2DK7CzSiZ2E4wxN5Ed/bZp5hk2i68nJPY/SwGAoW/CMijDPK9mJzYhFiDvQQ7Xfn6M1Gw3SFOFT6brz0cj1MD6Sy42rzoFYKdGUBxh8", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(39860400002)(136003)(396003)(376002)(346002)(230922051799003)(64100799003)(1800799012)(82310400011)(451199024)(186009)(36840700001)(46966006)(40470700004)(83380400001)(26005)(16526019)(426003)(47076005)(336012)(86362001)(40480700001)(478600001)(7696005)(55016003)(7636003)(40460700003)(2616005)(6286002)(1076003)(70586007)(4326008)(6636002)(6666004)(8676002)(8936002)(110136005)(316002)(70206006)(356005)(36860700001)(82740400003)(36756003)(41300700001)(5660300002)(2906002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "06 Feb 2024 02:07:11.2649 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 0f95c156-6315-4f3e-975e-08dc26b85490", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n SJ1PEPF00001CE9.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH3PR12MB8535", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The compare item allows adding flow match with comparison\nresult. This commit adds compare item support to the PMD\ncode.\n\nDue to HW limitation:\n - Only HWS supported.\n - Only 32-bit comparison is supported.\n - Only single compare flow is supported in the flow table.\n - Only match with compare result between packet fields is\n supported.\n\nSigned-off-by: Suanming Mou <suanmingm@nvidia.com>\nAcked-by: Ori Kam <orika@nvidia.com>\n---\n doc/guides/nics/features/mlx5.ini | 1 +\n doc/guides/nics/mlx5.rst | 7 +++\n doc/guides/rel_notes/release_24_03.rst | 2 +\n drivers/net/mlx5/mlx5_flow.h | 3 ++\n drivers/net/mlx5/mlx5_flow_hw.c | 73 ++++++++++++++++++++++++++\n 5 files changed, 86 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini\nindex 0739fe9d63..00e9348fc6 100644\n--- a/doc/guides/nics/features/mlx5.ini\n+++ b/doc/guides/nics/features/mlx5.ini\n@@ -56,6 +56,7 @@ Usage doc = Y\n \n [rte_flow items]\n aggr_affinity = Y\n+compare = Y\n conntrack = Y\n ecpri = Y\n esp = Y\ndiff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst\nindex 6b52fb93c5..18b40bc22d 100644\n--- a/doc/guides/nics/mlx5.rst\n+++ b/doc/guides/nics/mlx5.rst\n@@ -778,6 +778,13 @@ Limitations\n The flow engine of a process cannot move from active to standby mode\n if preceding active application rules are still present and vice versa.\n \n+- Match with compare result item (``RTE_FLOW_ITEM_TYPE_COMPARE``):\n+\n+ - Only supported in HW steering(``dv_flow_en`` = 2) mode.\n+ - Only single flow is supported to the flow table.\n+ - Only 32-bit comparison is supported.\n+ - Only match with compare result between packet fields is supported.\n+\n \n Statistics\n ----------\ndiff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst\nindex 59eda27606..01d2d6d043 100644\n--- a/doc/guides/rel_notes/release_24_03.rst\n+++ b/doc/guides/rel_notes/release_24_03.rst\n@@ -80,6 +80,8 @@ New Features\n * Added support for Atomic Rules' TK242 packet-capture family of devices\n with PCI IDs: ``0x1024, 0x1025, 0x1026``.\n \n+ * Added support for comparing result between packet fields or value.\n+\n \n Removed Items\n -------------\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex ecfb04ead2..f0a11949e6 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -277,6 +277,9 @@ enum mlx5_feature_name {\n /* NSH ITEM */\n #define MLX5_FLOW_ITEM_NSH (1ull << 53)\n \n+/* COMPARE ITEM */\n+#define MLX5_FLOW_ITEM_COMPARE (1ull << 54)\n+\n /* Outer Masks. */\n #define MLX5_FLOW_LAYER_OUTER_L3 \\\n \t(MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6)\ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex da873ae2e2..f21c22131c 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -426,6 +426,9 @@ flow_hw_matching_item_flags_get(const struct rte_flow_item items[])\n \t\tcase RTE_FLOW_ITEM_TYPE_GTP:\n \t\t\tlast_item = MLX5_FLOW_LAYER_GTP;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_COMPARE:\n+\t\t\tlast_item = MLX5_FLOW_ITEM_COMPARE;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\tbreak;\n \t\t}\n@@ -4386,6 +4389,8 @@ flow_hw_table_create(struct rte_eth_dev *dev,\n \t\t\trte_errno = EINVAL;\n \t\t\tgoto it_error;\n \t\t}\n+\t\tif (item_templates[i]->item_flags & MLX5_FLOW_ITEM_COMPARE)\n+\t\t\tmatcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_HTABLE;\n \t\tret = __atomic_fetch_add(&item_templates[i]->refcnt, 1,\n \t\t\t\t\t __ATOMIC_RELAXED) + 1;\n \t\tif (ret <= 1) {\n@@ -6634,6 +6639,66 @@ flow_hw_prepend_item(const struct rte_flow_item *items,\n \treturn copied_items;\n }\n \n+static inline bool\n+flow_hw_item_compare_field_supported(enum rte_flow_field_id field)\n+{\n+\tswitch (field) {\n+\tcase RTE_FLOW_FIELD_TAG:\n+\tcase RTE_FLOW_FIELD_META:\n+\tcase RTE_FLOW_FIELD_VALUE:\n+\t\treturn true;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\treturn false;\n+}\n+\n+static int\n+flow_hw_validate_item_compare(const struct rte_flow_item *item,\n+\t\t\t struct rte_flow_error *error)\n+{\n+\tconst struct rte_flow_item_compare *comp_m = item->mask;\n+\tconst struct rte_flow_item_compare *comp_v = item->spec;\n+\n+\tif (unlikely(!comp_m))\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL,\n+\t\t\t\t \"compare item mask is missing\");\n+\tif (comp_m->width != UINT32_MAX)\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL,\n+\t\t\t\t \"compare item only support full mask\");\n+\tif (!flow_hw_item_compare_field_supported(comp_m->a.field) ||\n+\t !flow_hw_item_compare_field_supported(comp_m->b.field))\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL,\n+\t\t\t\t \"compare item field not support\");\n+\tif (comp_m->a.field == RTE_FLOW_FIELD_VALUE &&\n+\t comp_m->b.field == RTE_FLOW_FIELD_VALUE)\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL,\n+\t\t\t\t \"compare between value is not valid\");\n+\tif (comp_v) {\n+\t\tif (comp_v->operation != comp_m->operation ||\n+\t\t comp_v->a.field != comp_m->a.field ||\n+\t\t comp_v->b.field != comp_m->b.field)\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t NULL,\n+\t\t\t\t\t \"compare item spec/mask not matching\");\n+\t\tif ((comp_v->width & comp_m->width) != 32)\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t NULL,\n+\t\t\t\t\t \"compare item only support full mask\");\n+\t}\n+\treturn 0;\n+}\n+\n static int\n flow_hw_pattern_validate(struct rte_eth_dev *dev,\n \t\t\t const struct rte_flow_pattern_template_attr *attr,\n@@ -6644,6 +6709,7 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,\n \tint i, tag_idx;\n \tbool items_end = false;\n \tuint32_t tag_bitmap = 0;\n+\tint ret;\n \n \tif (!attr->ingress && !attr->egress && !attr->transfer)\n \t\treturn rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ATTR, NULL,\n@@ -6781,6 +6847,13 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,\n \t\t\t\t\t\t\t \" attribute\");\n \t\t\tbreak;\n \t\t}\n+\t\tcase RTE_FLOW_ITEM_TYPE_COMPARE:\n+\t\t{\n+\t\t\tret = flow_hw_validate_item_compare(&items[i], error);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\t\t\tbreak;\n+\t\t}\n \t\tcase RTE_FLOW_ITEM_TYPE_VOID:\n \t\tcase RTE_FLOW_ITEM_TYPE_ETH:\n \t\tcase RTE_FLOW_ITEM_TYPE_VLAN:\n", "prefixes": [ "v7", "4/4" ] }