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GET /api/patches/136262/?format=api
{ "id": 136262, "url": "http://patches.dpdk.org/api/patches/136262/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240201130754.194352-4-hkalra@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240201130754.194352-4-hkalra@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240201130754.194352-4-hkalra@marvell.com", "date": "2024-02-01T13:07:34", "name": "[v3,03/23] net/cnxk: eswitch HW resource configuration", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "6d5d0f0a36b8b4dc041e36c56c4246f68c936996", "submitter": { "id": 1182, "url": "http://patches.dpdk.org/api/people/1182/?format=api", "name": "Harman Kalra", "email": "hkalra@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240201130754.194352-4-hkalra@marvell.com/mbox/", "series": [ { "id": 30966, "url": "http://patches.dpdk.org/api/series/30966/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30966", "date": "2024-02-01T13:07:31", "name": "net/cnxk: support for port representors", "version": 3, "mbox": "http://patches.dpdk.org/series/30966/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136262/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/136262/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 302B243A3A;\n\tThu, 1 Feb 2024 14:08:47 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id F3E6342E21;\n\tThu, 1 Feb 2024 14:08:31 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 846F942E14\n for <dev@dpdk.org>; Thu, 1 Feb 2024 14:08:30 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id\n 4119tsWh001734 for <dev@dpdk.org>; Thu, 1 Feb 2024 05:08:30 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3w0937ghay-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 01 Feb 2024 05:08:29 -0800 (PST)", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Thu, 1 Feb 2024 05:08:27 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Thu, 1 Feb 2024 05:08:27 -0800", "from localhost.localdomain (unknown [10.29.52.211])\n by maili.marvell.com (Postfix) with ESMTP id B52BC3F705D;\n Thu, 1 Feb 2024 05:08:25 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-type; s=pfpt0220; bh=E/RE/71ARlAi0kI+5mdId\n kspiYL3pbGlU8RBXfshJC4=; b=AL6p/xkRgi5dluHzeQ+5glbtMqwotFQk8qtnO\n kog+BCcQEIzHmBh4USNj31qsmYSflqUGVD4fN0n5rPN/jvONxDVOGbioK/Jius1f\n K3LacQWinZH90n9V7Nr/8Rs70hDh8qM73IXd4YjnfaJZS9fhmFnBCw6v645q7Gmh\n 8HU5abGrXaFBTvlHHU0G4rgUROpNX0XeUu9hMNtih6kHUXyV3AIMckQscCAfgyar\n vmTuT4/LvidzJ+FTgn78W900EaqlTWE4WJFU4ZfAuCSd9/eUMYc23nYoiBJBBY9l\n BLNDUJLlvqZdjwm3BFF71WzmhrU6wwjTOOEZG0YNhG2tMdWlA==", "From": "Harman Kalra <hkalra@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Harman Kalra <hkalra@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH v3 03/23] net/cnxk: eswitch HW resource configuration", "Date": "Thu, 1 Feb 2024 18:37:34 +0530", "Message-ID": "<20240201130754.194352-4-hkalra@marvell.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20240201130754.194352-1-hkalra@marvell.com>", "References": "<20230811163419.165790-1-hkalra@marvell.com>\n <20240201130754.194352-1-hkalra@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "v7pwp1jgYq-YkUifKcVAyUEkiZzWCM2n", "X-Proofpoint-GUID": "v7pwp1jgYq-YkUifKcVAyUEkiZzWCM2n", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-02-01_02,2024-01-31_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Configuring the hardware resources used by the eswitch device.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n drivers/net/cnxk/cnxk_eswitch.c | 223 ++++++++++++++++++++++++++++++++\n 1 file changed, 223 insertions(+)", "diff": "diff --git a/drivers/net/cnxk/cnxk_eswitch.c b/drivers/net/cnxk/cnxk_eswitch.c\nindex c4ea3063ae..5712b71c3b 100644\n--- a/drivers/net/cnxk/cnxk_eswitch.c\n+++ b/drivers/net/cnxk/cnxk_eswitch.c\n@@ -6,6 +6,47 @@\n \n #define CNXK_NIX_DEF_SQ_COUNT 512\n \n+static int\n+eswitch_hw_rsrc_cleanup(struct cnxk_eswitch_dev *eswitch_dev, struct rte_pci_device *pci_dev)\n+{\n+\tstruct roc_nix *nix;\n+\tint rc = 0;\n+\n+\tnix = &eswitch_dev->nix;\n+\n+\troc_nix_unregister_queue_irqs(nix);\n+\troc_nix_tm_fini(nix);\n+\trc = roc_nix_lf_free(nix);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to cleanup sq, rc %d\", rc);\n+\t\tgoto exit;\n+\t}\n+\n+\t/* Check if this device is hosting common resource */\n+\tnix = roc_idev_npa_nix_get();\n+\tif (!nix || nix->pci_dev != pci_dev) {\n+\t\trc = 0;\n+\t\tgoto exit;\n+\t}\n+\n+\t/* Try nix fini now */\n+\trc = roc_nix_dev_fini(nix);\n+\tif (rc == -EAGAIN) {\n+\t\tplt_info(\"Common resource in use by other devices %s\", pci_dev->name);\n+\t\tgoto exit;\n+\t} else if (rc) {\n+\t\tplt_err(\"Failed in nix dev fini, rc=%d\", rc);\n+\t\tgoto exit;\n+\t}\n+\n+\trte_free(eswitch_dev->txq);\n+\trte_free(eswitch_dev->rxq);\n+\trte_free(eswitch_dev->cxq);\n+\n+exit:\n+\treturn rc;\n+}\n+\n static int\n cnxk_eswitch_dev_remove(struct rte_pci_device *pci_dev)\n {\n@@ -21,6 +62,9 @@ cnxk_eswitch_dev_remove(struct rte_pci_device *pci_dev)\n \t\tgoto exit;\n \t}\n \n+\t/* Cleanup HW resources */\n+\teswitch_hw_rsrc_cleanup(eswitch_dev, pci_dev);\n+\n \trte_free(eswitch_dev);\n exit:\n \treturn rc;\n@@ -317,6 +361,177 @@ cnxk_eswitch_txq_setup(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid, uint1\n \treturn rc;\n }\n \n+static int\n+nix_lf_setup(struct cnxk_eswitch_dev *eswitch_dev)\n+{\n+\tuint16_t nb_rxq, nb_txq, nb_cq;\n+\tstruct roc_nix_fc_cfg fc_cfg;\n+\tstruct roc_nix *nix;\n+\tuint64_t rx_cfg;\n+\tvoid *qs;\n+\tint rc;\n+\n+\t/* Initialize base roc nix */\n+\tnix = &eswitch_dev->nix;\n+\tnix->pci_dev = eswitch_dev->pci_dev;\n+\tnix->hw_vlan_ins = true;\n+\tnix->reta_sz = ROC_NIX_RSS_RETA_SZ_256;\n+\trc = roc_nix_dev_init(nix);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to init nix eswitch device, rc=%d(%s)\", rc, roc_error_msg_get(rc));\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Get the representors count */\n+\trc = roc_nix_max_rep_count(&eswitch_dev->nix);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to get rep cnt, rc=%d(%s)\", rc, roc_error_msg_get(rc));\n+\t\tgoto free_cqs;\n+\t}\n+\n+\t/* Allocating an NIX LF */\n+\tnb_rxq = CNXK_ESWITCH_MAX_RXQ;\n+\tnb_txq = CNXK_ESWITCH_MAX_TXQ;\n+\tnb_cq = CNXK_ESWITCH_MAX_RXQ;\n+\trx_cfg = ROC_NIX_LF_RX_CFG_DIS_APAD;\n+\trc = roc_nix_lf_alloc(nix, nb_rxq, nb_txq, rx_cfg);\n+\tif (rc) {\n+\t\tplt_err(\"lf alloc failed = %s(%d)\", roc_error_msg_get(rc), rc);\n+\t\tgoto dev_fini;\n+\t}\n+\n+\tif (nb_rxq) {\n+\t\t/* Allocate memory for eswitch rq's and cq's */\n+\t\tqs = plt_zmalloc(sizeof(struct cnxk_eswitch_rxq) * nb_rxq, 0);\n+\t\tif (!qs) {\n+\t\t\tplt_err(\"Failed to alloc eswitch rxq\");\n+\t\t\tgoto lf_free;\n+\t\t}\n+\t\teswitch_dev->rxq = qs;\n+\t}\n+\n+\tif (nb_txq) {\n+\t\t/* Allocate memory for roc sq's */\n+\t\tqs = plt_zmalloc(sizeof(struct cnxk_eswitch_txq) * nb_txq, 0);\n+\t\tif (!qs) {\n+\t\t\tplt_err(\"Failed to alloc eswitch txq\");\n+\t\t\tgoto free_rqs;\n+\t\t}\n+\t\teswitch_dev->txq = qs;\n+\t}\n+\n+\tif (nb_cq) {\n+\t\tqs = plt_zmalloc(sizeof(struct cnxk_eswitch_cxq) * nb_cq, 0);\n+\t\tif (!qs) {\n+\t\t\tplt_err(\"Failed to alloc eswitch cxq\");\n+\t\t\tgoto free_sqs;\n+\t\t}\n+\t\teswitch_dev->cxq = qs;\n+\t}\n+\n+\teswitch_dev->nb_rxq = nb_rxq;\n+\teswitch_dev->nb_txq = nb_txq;\n+\n+\t/* Re-enable NIX LF error interrupts */\n+\troc_nix_err_intr_ena_dis(nix, true);\n+\troc_nix_ras_intr_ena_dis(nix, true);\n+\n+\trc = roc_nix_lso_fmt_setup(nix);\n+\tif (rc) {\n+\t\tplt_err(\"lso setup failed = %s(%d)\", roc_error_msg_get(rc), rc);\n+\t\tgoto free_cqs;\n+\t}\n+\n+\trc = roc_nix_switch_hdr_set(nix, 0, 0, 0, 0);\n+\tif (rc) {\n+\t\tplt_err(\"switch hdr set failed = %s(%d)\", roc_error_msg_get(rc), rc);\n+\t\tgoto free_cqs;\n+\t}\n+\n+\trc = roc_nix_rss_default_setup(nix,\n+\t\t\t\t FLOW_KEY_TYPE_IPV4 | FLOW_KEY_TYPE_TCP | FLOW_KEY_TYPE_UDP);\n+\tif (rc) {\n+\t\tplt_err(\"rss default setup failed = %s(%d)\", roc_error_msg_get(rc), rc);\n+\t\tgoto free_cqs;\n+\t}\n+\n+\trc = roc_nix_tm_init(nix);\n+\tif (rc) {\n+\t\tplt_err(\"tm failed = %s(%d)\", roc_error_msg_get(rc), rc);\n+\t\tgoto free_cqs;\n+\t}\n+\n+\t/* Register queue IRQs */\n+\trc = roc_nix_register_queue_irqs(nix);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to register queue interrupts rc=%d\", rc);\n+\t\tgoto tm_fini;\n+\t}\n+\n+\t/* Enable default tree */\n+\trc = roc_nix_tm_hierarchy_enable(nix, ROC_NIX_TM_DEFAULT, false);\n+\tif (rc) {\n+\t\tplt_err(\"tm default hierarchy enable failed = %s(%d)\", roc_error_msg_get(rc), rc);\n+\t\tgoto q_irq_fini;\n+\t}\n+\n+\tmemset(&fc_cfg, 0, sizeof(struct roc_nix_fc_cfg));\n+\tfc_cfg.rxchan_cfg.enable = false;\n+\trc = roc_nix_fc_config_set(nix, &fc_cfg);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to setup flow control, rc=%d(%s)\", rc, roc_error_msg_get(rc));\n+\t\tgoto q_irq_fini;\n+\t}\n+\n+\troc_nix_fc_mode_get(nix);\n+\n+\treturn rc;\n+q_irq_fini:\n+\troc_nix_unregister_queue_irqs(nix);\n+tm_fini:\n+\troc_nix_tm_fini(nix);\n+free_cqs:\n+\trte_free(eswitch_dev->cxq);\n+free_sqs:\n+\trte_free(eswitch_dev->txq);\n+free_rqs:\n+\trte_free(eswitch_dev->rxq);\n+lf_free:\n+\troc_nix_lf_free(nix);\n+dev_fini:\n+\troc_nix_dev_fini(nix);\n+fail:\n+\treturn rc;\n+}\n+\n+static int\n+eswitch_hw_rsrc_setup(struct cnxk_eswitch_dev *eswitch_dev, struct rte_pci_device *pci_dev)\n+{\n+\tstruct roc_nix *nix;\n+\tint rc;\n+\n+\tnix = &eswitch_dev->nix;\n+\trc = nix_lf_setup(eswitch_dev);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to setup hw rsrc, rc=%d(%s)\", rc, roc_error_msg_get(rc));\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Initialize roc npc */\n+\teswitch_dev->npc.roc_nix = nix;\n+\teswitch_dev->npc.flow_max_priority = 3;\n+\teswitch_dev->npc.flow_prealloc_size = 1;\n+\trc = roc_npc_init(&eswitch_dev->npc);\n+\tif (rc)\n+\t\tgoto rsrc_cleanup;\n+\n+\treturn rc;\n+rsrc_cleanup:\n+\teswitch_hw_rsrc_cleanup(eswitch_dev, pci_dev);\n+fail:\n+\treturn rc;\n+}\n+\n static int\n cnxk_eswitch_dev_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n {\n@@ -346,6 +561,12 @@ cnxk_eswitch_dev_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pc\n \n \t\teswitch_dev = mz->addr;\n \t\teswitch_dev->pci_dev = pci_dev;\n+\n+\t\trc = eswitch_hw_rsrc_setup(eswitch_dev, pci_dev);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to setup hw rsrc, rc=%d(%s)\", rc, roc_error_msg_get(rc));\n+\t\t\tgoto free_mem;\n+\t\t}\n \t}\n \n \t/* Spinlock for synchronization between representors traffic and control\n@@ -354,6 +575,8 @@ cnxk_eswitch_dev_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pc\n \trte_spinlock_init(&eswitch_dev->rep_lock);\n \n \treturn rc;\n+free_mem:\n+\trte_memzone_free(mz);\n fail:\n \treturn rc;\n }\n", "prefixes": [ "v3", "03/23" ] }