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GET /api/patches/136260/?format=api
http://patches.dpdk.org/api/patches/136260/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240201130754.194352-2-hkalra@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240201130754.194352-2-hkalra@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240201130754.194352-2-hkalra@marvell.com", "date": "2024-02-01T13:07:32", "name": "[v3,01/23] common/cnxk: add support for representors", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "b7ae5eca9e26d5ecab8c252f8b6fbfb5ed4c72cb", "submitter": { "id": 1182, "url": "http://patches.dpdk.org/api/people/1182/?format=api", "name": "Harman Kalra", "email": "hkalra@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240201130754.194352-2-hkalra@marvell.com/mbox/", "series": [ { "id": 30966, "url": "http://patches.dpdk.org/api/series/30966/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30966", "date": "2024-02-01T13:07:31", "name": "net/cnxk: support for port representors", "version": 3, "mbox": "http://patches.dpdk.org/series/30966/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136260/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/136260/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C62E343A3A;\n\tThu, 1 Feb 2024 14:08:29 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C55D142DFC;\n\tThu, 1 Feb 2024 14:08:26 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 625FA42DFA\n for <dev@dpdk.org>; Thu, 1 Feb 2024 14:08:25 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id\n 4119tBtW000791 for <dev@dpdk.org>; Thu, 1 Feb 2024 05:08:24 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3w0937ghag-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 01 Feb 2024 05:08:24 -0800 (PST)", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Thu, 1 Feb 2024 05:08:22 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Thu, 1 Feb 2024 05:08:22 -0800", "from localhost.localdomain (unknown [10.29.52.211])\n by maili.marvell.com (Postfix) with ESMTP id 36A0A3F706C;\n Thu, 1 Feb 2024 05:08:19 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-type; s=pfpt0220; bh=5XtwyzhcsdLswt6Qg191v\n fdtxzXl9Tc7Mn5jWwHKMIA=; b=Mpkhk1Ie8Ix+4wauEfvFMht3LFP0R4kFc1KTN\n E0qS1ReoW+nTAYadSQfhBr70rNBBE657NSOFyj0LKS65Movg19qdb/crPfuUDY3I\n L4X+eG0u21cqQR+cF2Qvs5Fdng4I3Q0nV4HFE4RuWJSFmqs9pN1m1O7GpDwbSh3k\n 0OA7qapS3+yHh6cJ5ZsOEwtWj5DlaDRkX5ChZm3uHAP6ketCpLjqkE+nZwm+4b4W\n OMcK4DCQBd4T7Af3CWaKFxRHGPlo4BvK8/TcqRDkLoyYR8LS3bCkBlwq0HG7Ngdb\n liwIqFbHnCn+Ae5uCp4jQ+O+HKYo4lq9T2VzXOAPbT/+xfyCQ==", "From": "Harman Kalra <hkalra@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Harman Kalra <hkalra@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH v3 01/23] common/cnxk: add support for representors", "Date": "Thu, 1 Feb 2024 18:37:32 +0530", "Message-ID": "<20240201130754.194352-2-hkalra@marvell.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20240201130754.194352-1-hkalra@marvell.com>", "References": "<20230811163419.165790-1-hkalra@marvell.com>\n <20240201130754.194352-1-hkalra@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "0MwDpjF0ZA4xnprOtm12DMHtCTJfpH20", "X-Proofpoint-GUID": "0MwDpjF0ZA4xnprOtm12DMHtCTJfpH20", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-02-01_02,2024-01-31_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Introducing a new Mailbox for registering base device behind\nall representors and also registering debug log type for representors\nand base device driver.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n doc/guides/nics/cnxk.rst | 4 ++++\n drivers/common/cnxk/roc_constants.h | 1 +\n drivers/common/cnxk/roc_mbox.h | 8 ++++++++\n drivers/common/cnxk/roc_nix.c | 31 +++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_nix.h | 3 +++\n drivers/common/cnxk/roc_platform.c | 2 ++\n drivers/common/cnxk/roc_platform.h | 4 ++++\n drivers/common/cnxk/version.map | 3 +++\n 8 files changed, 56 insertions(+)", "diff": "diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst\nindex 9ec52e380f..58cb8e2283 100644\n--- a/doc/guides/nics/cnxk.rst\n+++ b/doc/guides/nics/cnxk.rst\n@@ -627,3 +627,7 @@ Debugging Options\n +---+------------+-------------------------------------------------------+\n | 2 | NPC | --log-level='pmd\\.net.cnxk\\.flow,8' |\n +---+------------+-------------------------------------------------------+\n+ | 3 | REP | --log-level='pmd\\.net.cnxk\\.rep,8' |\n+ +---+------------+-------------------------------------------------------+\n+ | 4 | ESW | --log-level='pmd\\.net.cnxk\\.esw,8' |\n+ +---+------------+-------------------------------------------------------+\ndiff --git a/drivers/common/cnxk/roc_constants.h b/drivers/common/cnxk/roc_constants.h\nindex 291b6a4bc9..cb4edbea58 100644\n--- a/drivers/common/cnxk/roc_constants.h\n+++ b/drivers/common/cnxk/roc_constants.h\n@@ -43,6 +43,7 @@\n #define PCI_DEVID_CNXK_RVU_NIX_INL_VF 0xA0F1\n #define PCI_DEVID_CNXK_RVU_REE_PF 0xA0f4\n #define PCI_DEVID_CNXK_RVU_REE_VF 0xA0f5\n+#define PCI_DEVID_CNXK_RVU_ESWITCH_PF 0xA0E0\n \n #define PCI_DEVID_CN9K_CGX 0xA059\n #define PCI_DEVID_CN10K_RPM 0xA060\ndiff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h\nindex 3257a370bc..b7e2f43d45 100644\n--- a/drivers/common/cnxk/roc_mbox.h\n+++ b/drivers/common/cnxk/roc_mbox.h\n@@ -68,6 +68,7 @@ struct mbox_msghdr {\n \tM(NDC_SYNC_OP, 0x009, ndc_sync_op, ndc_sync_op, msg_rsp) \\\n \tM(LMTST_TBL_SETUP, 0x00a, lmtst_tbl_setup, lmtst_tbl_setup_req, \\\n \t msg_rsp) \\\n+\tM(GET_REP_CNT, 0x00d, get_rep_cnt, msg_req, get_rep_cnt_rsp) \\\n \t/* CGX mbox IDs (range 0x200 - 0x3FF) */ \\\n \tM(CGX_START_RXTX, 0x200, cgx_start_rxtx, msg_req, msg_rsp) \\\n \tM(CGX_STOP_RXTX, 0x201, cgx_stop_rxtx, msg_req, msg_rsp) \\\n@@ -546,6 +547,13 @@ struct lmtst_tbl_setup_req {\n \tuint64_t __io rsvd[2]; /* Future use */\n };\n \n+#define MAX_PFVF_REP 64\n+struct get_rep_cnt_rsp {\n+\tstruct mbox_msghdr hdr;\n+\tuint16_t __io rep_cnt;\n+\tuint16_t __io rep_pfvf_map[MAX_PFVF_REP];\n+};\n+\n /* CGX mbox message formats */\n /* CGX mailbox error codes\n * Range 1101 - 1200.\ndiff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c\nindex f64933a1d9..7e327a7e6e 100644\n--- a/drivers/common/cnxk/roc_nix.c\n+++ b/drivers/common/cnxk/roc_nix.c\n@@ -531,3 +531,34 @@ roc_nix_dev_fini(struct roc_nix *roc_nix)\n \trc |= dev_fini(&nix->dev, nix->pci_dev);\n \treturn rc;\n }\n+\n+int\n+roc_nix_max_rep_count(struct roc_nix *roc_nix)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct dev *dev = &nix->dev;\n+\tstruct mbox *mbox = mbox_get(dev->mbox);\n+\tstruct get_rep_cnt_rsp *rsp;\n+\tstruct msg_req *req;\n+\tint rc, i;\n+\n+\treq = mbox_alloc_msg_get_rep_cnt(mbox);\n+\tif (!req) {\n+\t\trc = -ENOSPC;\n+\t\tgoto exit;\n+\t}\n+\n+\treq->hdr.pcifunc = roc_nix_get_pf_func(roc_nix);\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\troc_nix->rep_cnt = rsp->rep_cnt;\n+\tfor (i = 0; i < rsp->rep_cnt; i++)\n+\t\troc_nix->rep_pfvf_map[i] = rsp->rep_pfvf_map[i];\n+\n+exit:\n+\tmbox_put(mbox);\n+\treturn rc;\n+}\ndiff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h\nindex 84e6fc3df5..b369335fc4 100644\n--- a/drivers/common/cnxk/roc_nix.h\n+++ b/drivers/common/cnxk/roc_nix.h\n@@ -483,6 +483,8 @@ struct roc_nix {\n \tuint32_t buf_sz;\n \tuint64_t meta_aura_handle;\n \tuintptr_t meta_mempool;\n+\tuint16_t rep_cnt;\n+\tuint16_t rep_pfvf_map[MAX_PFVF_REP];\n \tTAILQ_ENTRY(roc_nix) next;\n \n #define ROC_NIX_MEM_SZ (6 * 1070)\n@@ -1013,4 +1015,5 @@ int __roc_api roc_nix_mcast_list_setup(struct mbox *mbox, uint8_t intf, int nb_e\n \t\t\t\t uint16_t *pf_funcs, uint16_t *channels, uint32_t *rqs,\n \t\t\t\t uint32_t *grp_index, uint32_t *start_index);\n int __roc_api roc_nix_mcast_list_free(struct mbox *mbox, uint32_t mcast_grp_index);\n+int __roc_api roc_nix_max_rep_count(struct roc_nix *roc_nix);\n #endif /* _ROC_NIX_H_ */\ndiff --git a/drivers/common/cnxk/roc_platform.c b/drivers/common/cnxk/roc_platform.c\nindex 15cbb6d68f..181902a585 100644\n--- a/drivers/common/cnxk/roc_platform.c\n+++ b/drivers/common/cnxk/roc_platform.c\n@@ -96,4 +96,6 @@ RTE_LOG_REGISTER_DEFAULT(cnxk_logtype_sso, NOTICE);\n RTE_LOG_REGISTER_DEFAULT(cnxk_logtype_tim, NOTICE);\n RTE_LOG_REGISTER_DEFAULT(cnxk_logtype_tm, NOTICE);\n RTE_LOG_REGISTER_DEFAULT(cnxk_logtype_dpi, NOTICE);\n+RTE_LOG_REGISTER_DEFAULT(cnxk_logtype_rep, NOTICE);\n+RTE_LOG_REGISTER_DEFAULT(cnxk_logtype_esw, NOTICE);\n RTE_LOG_REGISTER_DEFAULT(cnxk_logtype_ree, NOTICE);\ndiff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h\nindex ba23b2e0d7..e08eb7f6ba 100644\n--- a/drivers/common/cnxk/roc_platform.h\n+++ b/drivers/common/cnxk/roc_platform.h\n@@ -264,6 +264,8 @@ extern int cnxk_logtype_tim;\n extern int cnxk_logtype_tm;\n extern int cnxk_logtype_ree;\n extern int cnxk_logtype_dpi;\n+extern int cnxk_logtype_rep;\n+extern int cnxk_logtype_esw;\n \n #define plt_err(fmt, args...) \\\n \tRTE_LOG(ERR, PMD, \"%s():%u \" fmt \"\\n\", __func__, __LINE__, ##args)\n@@ -293,6 +295,8 @@ extern int cnxk_logtype_dpi;\n #define plt_tm_dbg(fmt, ...)\tplt_dbg(tm, fmt, ##__VA_ARGS__)\n #define plt_ree_dbg(fmt, ...)\tplt_dbg(ree, fmt, ##__VA_ARGS__)\n #define plt_dpi_dbg(fmt, ...)\tplt_dbg(dpi, fmt, ##__VA_ARGS__)\n+#define plt_rep_dbg(fmt, ...)\tplt_dbg(rep, fmt, ##__VA_ARGS__)\n+#define plt_esw_dbg(fmt, ...)\tplt_dbg(esw, fmt, ##__VA_ARGS__)\n \n /* Datapath logs */\n #define plt_dp_err(fmt, args...) \\\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 7b6afa63a9..bd28803013 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -8,12 +8,14 @@ INTERNAL {\n \tcnxk_logtype_base;\n \tcnxk_logtype_cpt;\n \tcnxk_logtype_dpi;\n+\tcnxk_logtype_esw;\n \tcnxk_logtype_mbox;\n \tcnxk_logtype_ml;\n \tcnxk_logtype_nix;\n \tcnxk_logtype_npa;\n \tcnxk_logtype_npc;\n \tcnxk_logtype_ree;\n+\tcnxk_logtype_rep;\n \tcnxk_logtype_sso;\n \tcnxk_logtype_tim;\n \tcnxk_logtype_tm;\n@@ -216,6 +218,7 @@ INTERNAL {\n \troc_nix_get_base_chan;\n \troc_nix_get_pf;\n \troc_nix_get_pf_func;\n+\troc_nix_max_rep_count;\n \troc_nix_get_rx_chan_cnt;\n \troc_nix_get_vf;\n \troc_nix_get_vwqe_interval;\n", "prefixes": [ "v3", "01/23" ] }{ "id": 136260, "url": "