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GET /api/patches/135996/?format=api
{ "id": 135996, "url": "http://patches.dpdk.org/api/patches/135996/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240119174346.108905-5-bruce.richardson@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240119174346.108905-5-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240119174346.108905-5-bruce.richardson@intel.com", "date": "2024-01-19T17:43:39", "name": "[v2,04/11] eventdev: cleanup doxygen comments on info structure", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "9d7a9c5f47872ffdb7d2764b043ff20386de90ff", "submitter": { "id": 20, "url": "http://patches.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240119174346.108905-5-bruce.richardson@intel.com/mbox/", "series": [ { "id": 30860, "url": "http://patches.dpdk.org/api/series/30860/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30860", "date": "2024-01-19T17:43:35", "name": "improve eventdev API specification/documentation", "version": 2, "mbox": "http://patches.dpdk.org/series/30860/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/135996/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/135996/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E0C2943901;\n\tFri, 19 Jan 2024 18:44:34 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0ACB842DDA;\n\tFri, 19 Jan 2024 18:44:12 +0100 (CET)", "from mgamail.intel.com (mgamail.intel.com [192.198.163.12])\n by mails.dpdk.org (Postfix) with ESMTP id 6F18C42DC0\n for <dev@dpdk.org>; Fri, 19 Jan 2024 18:44:08 +0100 (CET)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 19 Jan 2024 09:44:07 -0800", "from silpixa00400957.ir.intel.com (HELO\n silpixa00401385.ir.intel.com) ([10.237.214.26])\n by orsmga006.jf.intel.com with ESMTP; 19 Jan 2024 09:44:04 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1705686249; x=1737222249;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=Nt+GFGoOHNhg+sZGyWzQzs8DPgHePNbdmC6ZwcDT10o=;\n b=GZXT8Zl6chSz2evaPNCaFjsM9cOdz0bX5Qz9dcW/2Vitl86JRRK2bFpx\n ix1YqtbSJJko8F79jaKDlwbdsLxy2hpbyU8V1dySiV3RXSnqmvl6T7I85\n /82UWKdBxlsk0kprbP4pRh/zlJBy+Es6OQzi5yMwazjczK+HGLU3fQDqk\n gQQToz/lQaAgbB4YpoHkzoFxh9OcZthsMCW1JoG+/dNIH36WpZOjiXTRg\n iDgBV4UNqJpoAEo8mhU10Z6H42LhvR05xgBO4MYdeMeXfP85aqP5aQrtO\n DkYgrmcbIPqwAHDLTj5LpaEirEsLZWK9l8CY3TKKCA8f4q2e1bzL/GMT9 w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10957\"; a=\"683693\"", "E=Sophos;i=\"6.05,204,1701158400\";\n d=\"scan'208\";a=\"683693\"", "E=McAfee;i=\"6600,9927,10957\"; a=\"761177783\"", "E=Sophos;i=\"6.05,204,1701158400\"; d=\"scan'208\";a=\"761177783\"" ], "X-ExtLoop1": "1", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "jerinj@marvell.com, mattias.ronnblom@ericsson.com,\n abdullah.sevincer@intel.com, sachin.saxena@oss.nxp.com,\n hemant.agrawal@nxp.com, pbhagavatula@marvell.com, pravin.pathak@intel.com,\n Bruce Richardson <bruce.richardson@intel.com>", "Subject": "[PATCH v2 04/11] eventdev: cleanup doxygen comments on info structure", "Date": "Fri, 19 Jan 2024 17:43:39 +0000", "Message-Id": "<20240119174346.108905-5-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.40.1", "In-Reply-To": "<20240119174346.108905-1-bruce.richardson@intel.com>", "References": "<20240118134557.73172-1-bruce.richardson@intel.com>\n <20240119174346.108905-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Some small rewording changes to the doxygen comments on struct\nrte_event_dev_info.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n lib/eventdev/rte_eventdev.h | 46 ++++++++++++++++++++-----------------\n 1 file changed, 25 insertions(+), 21 deletions(-)", "diff": "diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h\nindex 57a2791946..872f241df2 100644\n--- a/lib/eventdev/rte_eventdev.h\n+++ b/lib/eventdev/rte_eventdev.h\n@@ -482,54 +482,58 @@ struct rte_event_dev_info {\n \tconst char *driver_name;\t/**< Event driver name */\n \tstruct rte_device *dev;\t/**< Device information */\n \tuint32_t min_dequeue_timeout_ns;\n-\t/**< Minimum supported global dequeue timeout(ns) by this device */\n+\t/**< Minimum global dequeue timeout(ns) supported by this device */\n \tuint32_t max_dequeue_timeout_ns;\n-\t/**< Maximum supported global dequeue timeout(ns) by this device */\n+\t/**< Maximum global dequeue timeout(ns) supported by this device */\n \tuint32_t dequeue_timeout_ns;\n \t/**< Configured global dequeue timeout(ns) for this device */\n \tuint8_t max_event_queues;\n-\t/**< Maximum event_queues supported by this device */\n+\t/**< Maximum event queues supported by this device */\n \tuint32_t max_event_queue_flows;\n-\t/**< Maximum supported flows in an event queue by this device*/\n+\t/**< Maximum number of flows within an event queue supported by this device*/\n \tuint8_t max_event_queue_priority_levels;\n \t/**< Maximum number of event queue priority levels by this device.\n-\t * Valid when the device has RTE_EVENT_DEV_CAP_QUEUE_QOS capability\n+\t * Valid when the device has RTE_EVENT_DEV_CAP_QUEUE_QOS capability.\n+\t * The priority levels are evenly distributed between\n+\t * @ref RTE_EVENT_DEV_PRIORITY_HIGHEST and @ref RTE_EVENT_DEV_PRIORITY_LOWEST.\n \t */\n \tuint8_t max_event_priority_levels;\n \t/**< Maximum number of event priority levels by this device.\n \t * Valid when the device has RTE_EVENT_DEV_CAP_EVENT_QOS capability\n+\t * The priority levels are evenly distributed between\n+\t * @ref RTE_EVENT_DEV_PRIORITY_HIGHEST and @ref RTE_EVENT_DEV_PRIORITY_LOWEST.\n \t */\n \tuint8_t max_event_ports;\n \t/**< Maximum number of event ports supported by this device */\n \tuint8_t max_event_port_dequeue_depth;\n-\t/**< Maximum number of events can be dequeued at a time from an\n-\t * event port by this device.\n-\t * A device that does not support bulk dequeue will set this as 1.\n+\t/**< Maximum number of events that can be dequeued at a time from an event port\n+\t * on this device.\n+\t * A device that does not support bulk dequeue will set this to 1.\n \t */\n \tuint32_t max_event_port_enqueue_depth;\n-\t/**< Maximum number of events can be enqueued at a time from an\n-\t * event port by this device.\n-\t * A device that does not support bulk enqueue will set this as 1.\n+\t/**< Maximum number of events that can be enqueued at a time to an event port\n+\t * on this device.\n+\t * A device that does not support bulk enqueue will set this to 1.\n \t */\n \tuint8_t max_event_port_links;\n-\t/**< Maximum number of queues that can be linked to a single event\n-\t * port by this device.\n+\t/**< Maximum number of queues that can be linked to a single event port on this device.\n \t */\n \tint32_t max_num_events;\n \t/**< A *closed system* event dev has a limit on the number of events it\n-\t * can manage at a time. An *open system* event dev does not have a\n-\t * limit and will specify this as -1.\n+\t * can manage at a time.\n+\t * Once the number of events tracked by an eventdev exceeds this number,\n+\t * any enqueues of NEW events will fail.\n+\t * An *open system* event dev does not have a limit and will specify this as -1.\n \t */\n \tuint32_t event_dev_cap;\n-\t/**< Event device capabilities(RTE_EVENT_DEV_CAP_)*/\n+\t/**< Event device capabilities flags (RTE_EVENT_DEV_CAP_*) */\n \tuint8_t max_single_link_event_port_queue_pairs;\n-\t/**< Maximum number of event ports and queues that are optimized for\n-\t * (and only capable of) single-link configurations supported by this\n-\t * device. These ports and queues are not accounted for in\n-\t * max_event_ports or max_event_queues.\n+\t/**< Maximum number of event ports and queues, supported by this device,\n+\t * that are optimized for (and only capable of) single-link configurations.\n+\t * These ports and queues are not accounted for in max_event_ports or max_event_queues.\n \t */\n \tuint8_t max_profiles_per_port;\n-\t/**< Maximum number of event queue profiles per event port.\n+\t/**< Maximum number of event queue link profiles per event port.\n \t * A device that doesn't support multiple profiles will set this as 1.\n \t */\n };\n", "prefixes": [ "v2", "04/11" ] }