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GET /api/patches/135178/?format=api
http://patches.dpdk.org/api/patches/135178/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231214030428.363471-3-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231214030428.363471-3-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231214030428.363471-3-suanmingm@nvidia.com", "date": "2023-12-14T03:04:25", "name": "[2/4] net/mlx5: rename modify copy destination to destination", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f14c47ef296a7b6f59a041ef200ec4bf29b05076", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231214030428.363471-3-suanmingm@nvidia.com/mbox/", "series": [ { "id": 30543, "url": "http://patches.dpdk.org/api/series/30543/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30543", "date": "2023-12-14T03:04:24", "name": "net/mlx5: add modify field ADD fields support", "version": 1, "mbox": "http://patches.dpdk.org/series/30543/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/135178/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/135178/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A1F92436E9;\n\tThu, 14 Dec 2023 04:05:31 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5225442FA5;\n\tThu, 14 Dec 2023 04:05:18 +0100 (CET)", "from NAM11-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam11on2076.outbound.protection.outlook.com [40.107.223.76])\n by mails.dpdk.org (Postfix) with ESMTP id 2C12042FA1\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "Dariusz Sosnowski <dsosnowski@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>, Matan Azrad\n <matan@nvidia.com>", "CC": "<dev@dpdk.org>, <rasland@nvidia.com>", "Subject": "[PATCH 2/4] net/mlx5: rename modify copy destination to destination", "Date": "Thu, 14 Dec 2023 11:04:25 +0800", "Message-ID": "<20231214030428.363471-3-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20231214030428.363471-1-suanmingm@nvidia.com>", "References": "<20231214030428.363471-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DS2PEPF0000343A:EE_|SA0PR12MB4560:EE_", "X-MS-Office365-Filtering-Correlation-Id": "25fa9771-15bc-4fe6-d57c-08dbfc517d52", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n nJwDez9g5cI6WvdRIJKK9jFuq2OPNr05TSDn0Zo2K8g5OIIY+2Te+wrkiE80mudzTVxmvN9xdbD/MJ2A44yXkPrVHbEw0b5WSLO0wGJkLQ0alHBrOgmUyFM8QKt9BldhtwgHnsYx3baTsXGUI+mwbmMKV8lrLHs636lDR7UsHjIP06Lc+qbSIDiw6iLxSbU223dT1h/j6MhmXGuOvbod+VS+AHpVrbz+tmStJ5AdSrMIrarlHNPkV/tJ6vT80BOE78UUdfy3ifUguD8pZdtAUKIkwWAmOj+NVDDkftxdTsu/CKA8aB38B9nOi4sbSuyh95yZx/GSOCplPvRnV6ypYArmGIgHOec5Nyl04Oq1dcyXmy/+UO9esRVT9uvkykndos5vdk2tt6enAvR+35F0eyiSGPx3/5cNDD6CA0Q4/YH12wIUkOENBrUSJDFoxwa2ivO/0/VK720xyd9Mx2GLwBtBNUX1Sj4Ue/kFzf/uC+L7xvx79vn1vQkE7S604XsEqdrMdvQzbnt1V/YxBTiriq+28ZCNhZKTdNaTW+FUzAAcQOaZAdugTOE2OOM2bYwFhuXfgBXR0+3MtcmX6eV++A7OvYBFXqq0+3eu+yKuKoMClxZgi8vCoxTA0dw1W2jJu2IneSMZ+v7+ME6vwfADqu1b0seRHo4TIFeOOOOfcY/hLcBB0iwsFOxVVOr+E1VdZwxGuIlIIqZ+EHxrNNEn78XbDBvbC77E4Ec3EHW3bCT5CV/oaismNue2tnaV6Di4", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(346002)(376002)(396003)(39860400002)(136003)(230922051799003)(1800799012)(451199024)(82310400011)(186009)(64100799003)(40470700004)(46966006)(36840700001)(40460700003)(107886003)(1076003)(2616005)(26005)(336012)(16526019)(6286002)(6666004)(7696005)(426003)(47076005)(36860700001)(83380400001)(2906002)(5660300002)(41300700001)(70586007)(478600001)(70206006)(8936002)(8676002)(4326008)(6636002)(54906003)(110136005)(316002)(82740400003)(356005)(7636003)(86362001)(36756003)(55016003)(40480700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "14 Dec 2023 03:05:12.6782 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 25fa9771-15bc-4fe6-d57c-08dbfc517d52", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DS2PEPF0000343A.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SA0PR12MB4560", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "In the mlx5_flow_field_id_to_modify_info() function, for the coming\nnew ADD_FILED operation will also use that dcopy as ADD_FIELD's\ndestination.\n\nThis commit renames the dcopy to dest which makes things much clearer.\n\nSigned-off-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow.h | 2 +-\n drivers/net/mlx5/mlx5_flow_dv.c | 34 +++++++++++++++++----------------\n 2 files changed, 19 insertions(+), 17 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 6dde9de688..120609c595 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -2834,7 +2834,7 @@ void mlx5_flow_field_id_to_modify_info\n \t\t const struct rte_flow_attr *attr, struct rte_flow_error *error);\n int flow_dv_convert_modify_action(struct rte_flow_item *item,\n \t\t\t struct field_modify_info *field,\n-\t\t\t struct field_modify_info *dcopy,\n+\t\t\t struct field_modify_info *dest,\n \t\t\t struct mlx5_flow_dv_modify_hdr_resource *resource,\n \t\t\t uint32_t type, struct rte_flow_error *error);\n \ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 4e2095dcfe..272dbca00f 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -363,8 +363,10 @@ mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,\n * For MLX5_MODIFICATION_TYPE_SET specifies destination field.\n * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.\n * For MLX5_MODIFICATION_TYPE_COPY specifies source field.\n- * @param[in] dcopy\n- * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.\n+ * For MLX5_MODIFICATION_TYPE_ADD_FIELD specifies source field.\n+ * @param[in] dest\n+ * Destination field info for MLX5_MODIFICATION_TYPE_COPY and\n+ * MLX5_MODIFICATION_TYPE_ADD_FIELD in @type.\n * Negative offset value sets the same offset as source offset.\n * size field is ignored, value is taken from source field.\n * @param[in,out] resource\n@@ -380,7 +382,7 @@ mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,\n int\n flow_dv_convert_modify_action(struct rte_flow_item *item,\n \t\t\t struct field_modify_info *field,\n-\t\t\t struct field_modify_info *dcopy,\n+\t\t\t struct field_modify_info *dest,\n \t\t\t struct mlx5_flow_dv_modify_hdr_resource *resource,\n \t\t\t uint32_t type, struct rte_flow_error *error)\n {\n@@ -401,7 +403,7 @@ flow_dv_convert_modify_action(struct rte_flow_item *item,\n \t\tuint32_t mask;\n \t\tuint32_t data;\n \t\tbool next_field = true;\n-\t\tbool next_dcopy = true;\n+\t\tbool next_dest = true;\n \n \t\tif (i >= MLX5_MAX_MODIFY_NUM)\n \t\t\treturn rte_flow_error_set(error, EINVAL,\n@@ -432,20 +434,20 @@ flow_dv_convert_modify_action(struct rte_flow_item *item,\n \t\t\t\t0 : size_b,\n \t\t};\n \t\tif (type == MLX5_MODIFICATION_TYPE_COPY) {\n-\t\t\tMLX5_ASSERT(dcopy);\n-\t\t\tactions[i].dst_field = dcopy->id;\n+\t\t\tMLX5_ASSERT(dest);\n+\t\t\tactions[i].dst_field = dest->id;\n \t\t\tactions[i].dst_offset =\n-\t\t\t\t(int)dcopy->offset < 0 ? off_b : dcopy->offset;\n+\t\t\t\t(int)dest->offset < 0 ? off_b : dest->offset;\n \t\t\t/* Convert entire record to big-endian format. */\n \t\t\tactions[i].data1 = rte_cpu_to_be_32(actions[i].data1);\n \t\t\t/*\n \t\t\t * Destination field overflow. Copy leftovers of\n \t\t\t * a source field to the next destination field.\n \t\t\t */\n-\t\t\tif ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&\n-\t\t\t dcopy->size != 0) {\n+\t\t\tif ((size_b > dest->size * CHAR_BIT - dest->offset) &&\n+\t\t\t dest->size != 0) {\n \t\t\t\tactions[i].length =\n-\t\t\t\t\tdcopy->size * CHAR_BIT - dcopy->offset;\n+\t\t\t\t\tdest->size * CHAR_BIT - dest->offset;\n \t\t\t\tcarry_b += actions[i].length;\n \t\t\t\tnext_field = false;\n \t\t\t} else {\n@@ -455,12 +457,12 @@ flow_dv_convert_modify_action(struct rte_flow_item *item,\n \t\t\t * Not enough bits in a source filed to fill a\n \t\t\t * destination field. Switch to the next source.\n \t\t\t */\n-\t\t\tif ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&\n+\t\t\tif ((size_b < dest->size * CHAR_BIT - dest->offset) &&\n \t\t\t ((size_b == field->size * CHAR_BIT - off_b) ||\n \t\t\t field->is_flex)) {\n \t\t\t\tactions[i].length = size_b;\n-\t\t\t\tdcopy->offset += actions[i].length;\n-\t\t\t\tnext_dcopy = false;\n+\t\t\t\tdest->offset += actions[i].length;\n+\t\t\t\tnext_dest = false;\n \t\t\t}\n \t\t} else {\n \t\t\tMLX5_ASSERT(item->spec);\n@@ -475,11 +477,11 @@ flow_dv_convert_modify_action(struct rte_flow_item *item,\n \t\t/* Convert entire record to expected big-endian format. */\n \t\tactions[i].data0 = rte_cpu_to_be_32(actions[i].data0);\n \t\tif ((type != MLX5_MODIFICATION_TYPE_COPY ||\n-\t\t dcopy->id != (enum mlx5_modification_field)UINT32_MAX) &&\n+\t\t dest->id != (enum mlx5_modification_field)UINT32_MAX) &&\n \t\t field->id != (enum mlx5_modification_field)UINT32_MAX)\n \t\t\t++i;\n-\t\tif (next_dcopy && type == MLX5_MODIFICATION_TYPE_COPY)\n-\t\t\t++dcopy;\n+\t\tif (next_dest && type == MLX5_MODIFICATION_TYPE_COPY)\n+\t\t\t++dest;\n \t\tif (next_field)\n \t\t\t++field;\n \t} while (field->size);\n", "prefixes": [ "2/4" ] }{ "id": 135178, "url": "