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GET /api/patches/134629/?format=api
{ "id": 134629, "url": "http://patches.dpdk.org/api/patches/134629/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231127160102.450506-1-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231127160102.450506-1-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231127160102.450506-1-michaelba@nvidia.com", "date": "2023-11-27T16:01:02", "name": "[v2] net/mlx5: fix index choosing in TAG modification", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "171eada78fae52b6cdfdb59376c83bb4e1a77137", "submitter": { "id": 1949, "url": "http://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231127160102.450506-1-michaelba@nvidia.com/mbox/", "series": [ { "id": 30397, "url": "http://patches.dpdk.org/api/series/30397/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30397", "date": "2023-11-27T16:01:02", "name": "[v2] net/mlx5: fix index choosing in TAG modification", "version": 2, "mbox": "http://patches.dpdk.org/series/30397/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/134629/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/134629/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 78D53433E2;\n\tMon, 27 Nov 2023 17:01:40 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4BC4A40648;\n\tMon, 27 Nov 2023 17:01:40 +0100 (CET)", "from NAM12-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam12on2046.outbound.protection.outlook.com [40.107.237.46])\n by mails.dpdk.org (Postfix) with ESMTP id B34E9402A3;\n Mon, 27 Nov 2023 17:01:38 +0100 (CET)", "from CY5P221CA0093.NAMP221.PROD.OUTLOOK.COM (2603:10b6:930:9::24) by\n LV3PR12MB9188.namprd12.prod.outlook.com (2603:10b6:408:19b::15) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7025.29; 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helo=mail.nvidia.com; pr=C", "From": "Michael Baum <michaelba@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>,\n Suanming Mou <suanmingm@nvidia.com>, <getelson@nvidia.com>, <stable@dpdk.org>", "Subject": "[PATCH v2] net/mlx5: fix index choosing in TAG modification", "Date": "Mon, 27 Nov 2023 18:01:02 +0200", "Message-ID": "<20231127160102.450506-1-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20231127145058.447245-1-michaelba@nvidia.com>", "References": "<20231127145058.447245-1-michaelba@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000E9D7:EE_|LV3PR12MB9188:EE_", "X-MS-Office365-Filtering-Correlation-Id": "20a4133c-0c76-4909-53d0-08dbef6221af", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n uoNbt8I8oeiL7JeNsbEueoz+PEwxeEfnhDG6/AStHjJw/tpWiHSsZjtctgtTSgXWgYEgRrOWUDimDVe43d8dlIshqHt8llq1hMR9/UQ3MAZo991P/N36y+BH0NC2/xuSjgen3YXHcPOfeI9MIQenae60Gxe8CJyQ7SjphdHR4k6KdLL/yeIuaMCmy5BpSaZTzklOO8I8koVnSRrImntFcNg/gJp9wp01CJ4r8kHBiIwriO95fUITQ13eMpIXP5IERRSNhhfgm33rcdmFHQuPzCrJqIjFtpbQDTNt/ljWhsSgDawdymqnRFoLxPqOw0AzOPuIOE6Vw6MMnAcwL8/IhnVZegPgsl+9DQLJPRrVPqOfic/LGHKfvuMYLjvNTJxmbG5RXEIaCO3nB94vwn935cdj8Ef4Lp5YaCCHZ+Bn/48JRM/9RiJ3lfXSDBVb++FY34rt/Vkn+dZG/RSgaXPU3F8JpIkzjvtcO6u55wjp3nQbrfCIWk6RQWPr3iLnb2TW6QoLCLOZz88EvRsAJqowYIQaITJDsCGv9SqM6a1iHESOvnXvKu4u9Uubx/LnxNeLEONPpBMbdN13jfeZ9JxOqycDTnd+L7Ol6PLWxly5npw+8Gp69n4ZkpNo0x3k8LQ2SvT5y2ZwQP7sCi3mQ67kgUxZE4teHH8RAjL7yQ0RwBJgZFxsx9HxL+po3Gh40scuOz7FKyajH1RKPC2oZ2V4oOS48wkm/MCp6HWw9E0t8C2CRTZomTpHW3FQKBgYACck", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(136003)(376002)(396003)(346002)(39860400002)(230922051799003)(451199024)(82310400011)(1800799012)(186009)(64100799003)(46966006)(36840700001)(40470700004)(83380400001)(356005)(47076005)(7636003)(426003)(336012)(450100002)(55016003)(82740400003)(8936002)(6666004)(7696005)(4326008)(70586007)(70206006)(316002)(36860700001)(54906003)(6916009)(5660300002)(8676002)(86362001)(478600001)(40480700001)(41300700001)(2906002)(36756003)(6286002)(26005)(1076003)(2616005)(40460700003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Nov 2023 16:01:35.2622 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 20a4133c-0c76-4909-53d0-08dbef6221af", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000E9D7.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "LV3PR12MB9188", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "When MPLS modification support was added [1], the \"tag_index\" field was\nadded into \"rte_flow_action_modify_data\" structure.\nAs part of this change, the \"RTE_FLOW_FIELD_TAG\" type moved to use it\nfor tag array instead of using \"level\" field.\nUsing \"level\" is still supported for backwards compatibility when\n\"tag_index\" field is zero.\n\nThe \"mlx5_flow_field_id_to_modify_info()\" function calls\n\"flow_hw_get_reg_id()\" function with \"level\" without checking first\nwhether \"tag_index\" field is valid.\n\nThis patch calls first to \"flow_tag_index_get()\" function to get the\nindex before sending it to \"flow_hw_get_reg_id()\" function.\n\n[1] commit c23626f27b09 (\"ethdev: add MPLS header modification\")\n\nFixes: 04e740e69512 (\"net/mlx5: separate registers usage per port\")\nCc: getelson@nvidia.com\nCc: stable@dpdk.org\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Ori Kam <orika@nvidia.com>\n---\nv2: fix the commit reference format.\n\n drivers/net/mlx5/mlx5_flow_dv.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 115d730317..e168325f2d 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1925,7 +1925,7 @@ mlx5_flow_field_id_to_modify_info\n \t\t\tif (priv->sh->config.dv_flow_en == 2)\n \t\t\t\treg = flow_hw_get_reg_id(dev,\n \t\t\t\t\t\t\t RTE_FLOW_ITEM_TYPE_TAG,\n-\t\t\t\t\t\t\t data->level);\n+\t\t\t\t\t\t\t tag_index);\n \t\t\telse\n \t\t\t\treg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,\n \t\t\t\t\t\t\t tag_index, error);\n", "prefixes": [ "v2" ] }