get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/133900/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 133900,
    "url": "http://patches.dpdk.org/api/patches/133900/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231106170521.3064038-2-abdullah.sevincer@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20231106170521.3064038-2-abdullah.sevincer@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20231106170521.3064038-2-abdullah.sevincer@intel.com",
    "date": "2023-11-06T17:05:20",
    "name": "[v7,1/2] bus/pci: support PASID control",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "315b61bd21a2dfb45d90968709871294af6ce024",
    "submitter": {
        "id": 2843,
        "url": "http://patches.dpdk.org/api/people/2843/?format=api",
        "name": "Sevincer, Abdullah",
        "email": "abdullah.sevincer@intel.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231106170521.3064038-2-abdullah.sevincer@intel.com/mbox/",
    "series": [
        {
            "id": 30172,
            "url": "http://patches.dpdk.org/api/series/30172/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30172",
            "date": "2023-11-06T17:05:19",
            "name": "*** Disable PASID for DLB Device ***",
            "version": 7,
            "mbox": "http://patches.dpdk.org/series/30172/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/133900/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/133900/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7BD21432BB;\n\tMon,  6 Nov 2023 18:05:41 +0100 (CET)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8F05440DC9;\n\tMon,  6 Nov 2023 18:05:32 +0100 (CET)",
            "from mgamail.intel.com (mgamail.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id 268F14025D\n for <dev@dpdk.org>; Mon,  6 Nov 2023 18:05:30 +0100 (CET)",
            "from fmviesa001.fm.intel.com ([10.60.135.141])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 06 Nov 2023 09:05:29 -0800",
            "from txanpdk02.an.intel.com ([10.123.117.76])\n by fmviesa001.fm.intel.com with ESMTP; 06 Nov 2023 09:05:25 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1699290330; x=1730826330;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=tAvifFIS1KgP2oAuFep7kawdkf8mXQHG/lbN3c+aoRs=;\n b=MPvNLo/c3KXw6TLFXt/tqiTbxFLy1Z+o9obiCdQJQPXSzKcf127k4Y9Q\n QDI/aEVqMvjEoEA2m3kZ+YSZWdkY5pX+4U/ei4wecnVxP2wyyOkebM8Uc\n 2rnsA5z7iC5v0DBvaTT0GDtWID0wNKbM59UIm1MlodMVmfnVSZ0rw0vxQ\n d4HWww+SVGR1xQqmDqfb8+jzlOrx799fvB7NhK1Imu6qS0DQ3MowptEKS\n rjIj2gZ/wuSHcotiATYJMan+4w+XofuH02udl4VUawazbZjEG5NzfkSYb\n 46ySgpvGcbBbWH5A/Zgpgvyl5N1LaidZmgLOjCJ6OvTH7Vp+RXS8wLbgk A==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6600,9927,10886\"; a=\"475553782\"",
            "E=Sophos;i=\"6.03,282,1694761200\"; d=\"scan'208\";a=\"475553782\"",
            "E=Sophos;i=\"6.03,282,1694761200\"; d=\"scan'208\";a=\"10512014\""
        ],
        "X-ExtLoop1": "1",
        "From": "Abdullah Sevincer <abdullah.sevincer@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "jerinj@marvell.com, mike.ximing.chen@intel.com,\n bruce.richardson@intel.com,\n thomas@monjalon.net, Abdullah Sevincer <abdullah.sevincer@intel.com>",
        "Subject": "[PATCH v7 1/2] bus/pci: support PASID control",
        "Date": "Mon,  6 Nov 2023 11:05:20 -0600",
        "Message-Id": "<20231106170521.3064038-2-abdullah.sevincer@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20231106170521.3064038-1-abdullah.sevincer@intel.com>",
        "References": "<20231106170521.3064038-1-abdullah.sevincer@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add an internal API to control PASID for a given PCIe device.\n\nFor kernels when PASID enabled by default it breaks DLB functionality,\nhence disabling PASID is required for DLB to function properly.\n\nPASID capability is not exposed to users hence offset can not be\nretrieved by rte_pci_find_ext_capability() api. Therefore, api\nimplemented in this commit accepts an offset for PASID with an enable\nflag which is used to enable/disable PASID.\n\nSigned-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>\n---\n drivers/bus/pci/pci_common.c  |  7 +++++++\n drivers/bus/pci/rte_bus_pci.h | 13 +++++++++++++\n drivers/bus/pci/version.map   |  1 +\n lib/pci/rte_pci.h             |  4 ++++\n 4 files changed, 25 insertions(+)",
    "diff": "diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c\nindex 921d957bf6..ecf080c5d7 100644\n--- a/drivers/bus/pci/pci_common.c\n+++ b/drivers/bus/pci/pci_common.c\n@@ -938,6 +938,13 @@ rte_pci_set_bus_master(const struct rte_pci_device *dev, bool enable)\n \treturn 0;\n }\n \n+int\n+rte_pci_pasid_set_state(const struct rte_pci_device *dev, off_t offset, bool enable)\n+{\n+\tuint16_t pasid = enable;\n+\treturn rte_pci_write_config(dev, &pasid, sizeof(pasid), offset) < 0 ? -1 : 0;\n+}\n+\n struct rte_pci_bus rte_pci_bus = {\n \t.bus = {\n \t\t.scan = rte_pci_scan,\ndiff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h\nindex 21e234abf0..6d836e771a 100644\n--- a/drivers/bus/pci/rte_bus_pci.h\n+++ b/drivers/bus/pci/rte_bus_pci.h\n@@ -295,6 +295,19 @@ void rte_pci_ioport_read(struct rte_pci_ioport *p,\n void rte_pci_ioport_write(struct rte_pci_ioport *p,\n \t\tconst void *data, size_t len, off_t offset);\n \n+/**\n+ * Enable/Disable PASID.\n+ *\n+ * @param dev\n+ *   A pointer to a rte_pci_device structure.\n+ * @param offset\n+ *   Offset of the PASID external capability.\n+ * @param enable\n+ *   Flag to enable or disable PASID.\n+ */\n+__rte_internal\n+int rte_pci_pasid_set_state(const struct rte_pci_device *dev, off_t offset, bool enable);\n+\n #ifdef __cplusplus\n }\n #endif\ndiff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map\nindex 74c5b075d5..9fad086bdf 100644\n--- a/drivers/bus/pci/version.map\n+++ b/drivers/bus/pci/version.map\n@@ -37,5 +37,6 @@ INTERNAL {\n \n \trte_pci_get_sysfs_path;\n \trte_pci_register;\n+\trte_pci_pasid_set_state;\n \trte_pci_unregister;\n };\ndiff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h\nindex 69e932d910..d195f01950 100644\n--- a/lib/pci/rte_pci.h\n+++ b/lib/pci/rte_pci.h\n@@ -101,6 +101,10 @@ extern \"C\" {\n #define RTE_PCI_EXT_CAP_ID_ACS\t\t0x0d\t/* Access Control Services */\n #define RTE_PCI_EXT_CAP_ID_SRIOV\t0x10\t/* SR-IOV */\n #define RTE_PCI_EXT_CAP_ID_PRI\t\t0x13\t/* Page Request Interface */\n+#define RTE_PCI_EXT_CAP_ID_PASID        0x1B    /* Process Address Space ID */\n+\n+/* Process Address Space ID */\n+#define RTE_PCI_PASID_CTRL\t\t0x06    /* PASID control register */\n \n /* Advanced Error Reporting (RTE_PCI_EXT_CAP_ID_ERR) */\n #define RTE_PCI_ERR_UNCOR_STATUS\t0x04\t/* Uncorrectable Error Status */\n",
    "prefixes": [
        "v7",
        "1/2"
    ]
}