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GET /api/patches/133769/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 133769,
    "url": "http://patches.dpdk.org/api/patches/133769/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231102061641.2463244-3-chaoyong.he@corigine.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20231102061641.2463244-3-chaoyong.he@corigine.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20231102061641.2463244-3-chaoyong.he@corigine.com",
    "date": "2023-11-02T06:16:41",
    "name": "[2/2] net/nfp: support setting pause frame switch mode",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "192bd9708a0aa118d2159c6d5dfcf94cc1742369",
    "submitter": {
        "id": 2554,
        "url": "http://patches.dpdk.org/api/people/2554/?format=api",
        "name": "Chaoyong He",
        "email": "chaoyong.he@corigine.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231102061641.2463244-3-chaoyong.he@corigine.com/mbox/",
    "series": [
        {
            "id": 30112,
            "url": "http://patches.dpdk.org/api/series/30112/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30112",
            "date": "2023-11-02T06:16:39",
            "name": "add support of RX/TX pause frame switch",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/30112/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/133769/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/133769/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Chaoyong He <chaoyong.he@corigine.com>",
        "To": "dev@dpdk.org",
        "Cc": "oss-drivers@corigine.com, Zerun Fu <zerun.fu@corigine.com>,\n Long Wu <long.wu@corigine.com>, Peng Zhang <peng.zhang@corigine.com>,\n Chaoyong He <chaoyong.he@corigine.com>",
        "Subject": "[PATCH 2/2] net/nfp: support setting pause frame switch mode",
        "Date": "Thu,  2 Nov 2023 14:16:41 +0800",
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    },
    "content": "From: Zerun Fu <zerun.fu@corigine.com>\n\nAdd support for configuring RX/TX pause frame switch mode.\n\nSigned-off-by: Zerun Fu <zerun.fu@corigine.com>\nReviewed-by: Long Wu <long.wu@corigine.com>\nReviewed-by: Peng Zhang <peng.zhang@corigine.com>\nReviewed-by: Chaoyong He <chaoyong.he@corigine.com>\n---\n drivers/net/nfp/nfp_ethdev.c          |  1 +\n drivers/net/nfp/nfp_net_common.c      | 75 +++++++++++++++++++++++++++\n drivers/net/nfp/nfp_net_common.h      |  2 +\n drivers/net/nfp/nfpcore/nfp_nsp.h     |  2 +\n drivers/net/nfp/nfpcore/nfp_nsp_eth.c | 52 ++++++++++++++++++-\n 5 files changed, 131 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c\nindex 452e16e126..fd54d58cb5 100644\n--- a/drivers/net/nfp/nfp_ethdev.c\n+++ b/drivers/net/nfp/nfp_ethdev.c\n@@ -429,6 +429,7 @@ static const struct eth_dev_ops nfp_net_eth_dev_ops = {\n \t.udp_tunnel_port_del    = nfp_udp_tunnel_port_del,\n \t.fw_version_get         = nfp_net_firmware_version_get,\n \t.flow_ctrl_get          = nfp_net_flow_ctrl_get,\n+\t.flow_ctrl_set          = nfp_net_flow_ctrl_set,\n };\n \n static inline void\ndiff --git a/drivers/net/nfp/nfp_net_common.c b/drivers/net/nfp/nfp_net_common.c\nindex 44b2d6dd4f..8dd014c575 100644\n--- a/drivers/net/nfp/nfp_net_common.c\n+++ b/drivers/net/nfp/nfp_net_common.c\n@@ -2114,3 +2114,78 @@ nfp_net_flow_ctrl_get(struct rte_eth_dev *dev,\n \n \treturn 0;\n }\n+\n+static int\n+nfp_net_pause_frame_set(struct nfp_net_hw *net_hw,\n+\t\tstruct nfp_eth_table_port *eth_port,\n+\t\tenum rte_eth_fc_mode mode)\n+{\n+\tint err;\n+\tbool flag;\n+\tstruct nfp_nsp *nsp;\n+\n+\tnsp = nfp_eth_config_start(net_hw->cpp, eth_port->index);\n+\tif (nsp == NULL) {\n+\t\tPMD_DRV_LOG(ERR, \"NFP error when obtaining NSP handle.\");\n+\t\treturn -EIO;\n+\t}\n+\n+\tflag = (mode & RTE_ETH_FC_TX_PAUSE) == 0 ? false : true;\n+\terr = nfp_eth_set_tx_pause(nsp, flag);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to configure TX pause frame.\");\n+\t\tnfp_eth_config_cleanup_end(nsp);\n+\t\treturn err;\n+\t}\n+\n+\tflag = (mode & RTE_ETH_FC_RX_PAUSE) == 0 ? false : true;\n+\terr = nfp_eth_set_rx_pause(nsp, flag);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to configure RX pause frame.\");\n+\t\tnfp_eth_config_cleanup_end(nsp);\n+\t\treturn err;\n+\t}\n+\n+\terr = nfp_eth_config_commit_end(nsp);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to configure pause frame.\");\n+\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int\n+nfp_net_flow_ctrl_set(struct rte_eth_dev *dev,\n+\t\tstruct rte_eth_fc_conf *fc_conf)\n+{\n+\tint ret;\n+\tstruct nfp_net_hw *net_hw;\n+\tenum rte_eth_fc_mode set_mode;\n+\tenum rte_eth_fc_mode original_mode;\n+\tstruct nfp_eth_table *nfp_eth_table;\n+\tstruct nfp_eth_table_port *eth_port;\n+\n+\tnet_hw = nfp_net_get_hw(dev);\n+\tif (net_hw->pf_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tnfp_eth_table = net_hw->pf_dev->nfp_eth_table;\n+\teth_port = &nfp_eth_table->ports[net_hw->idx];\n+\n+\toriginal_mode = nfp_net_get_pause_mode(eth_port);\n+\tset_mode = fc_conf->mode;\n+\n+\tif (set_mode == original_mode)\n+\t\treturn 0;\n+\n+\tret = nfp_net_pause_frame_set(net_hw, eth_port, set_mode);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\t/* Update eth_table after modifying RX/TX pause frame mode. */\n+\teth_port->tx_pause_enabled = (set_mode & RTE_ETH_FC_TX_PAUSE) == 0 ? false : true;\n+\teth_port->rx_pause_enabled = (set_mode & RTE_ETH_FC_RX_PAUSE) == 0 ? false : true;\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/net/nfp/nfp_net_common.h b/drivers/net/nfp/nfp_net_common.h\nindex 5a65d166e0..68a84dea06 100644\n--- a/drivers/net/nfp/nfp_net_common.h\n+++ b/drivers/net/nfp/nfp_net_common.h\n@@ -240,6 +240,8 @@ struct nfp_net_hw *nfp_net_get_hw(const struct rte_eth_dev *dev);\n int nfp_net_stop(struct rte_eth_dev *dev);\n int nfp_net_flow_ctrl_get(struct rte_eth_dev *dev,\n \t\tstruct rte_eth_fc_conf *fc_conf);\n+int nfp_net_flow_ctrl_set(struct rte_eth_dev *dev,\n+\t\tstruct rte_eth_fc_conf *fc_conf);\n \n #define NFP_PRIV_TO_APP_FW_NIC(app_fw_priv)\\\n \t((struct nfp_app_fw_nic *)app_fw_priv)\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nsp.h b/drivers/net/nfp/nfpcore/nfp_nsp.h\nindex dc1eb55a1f..4888501e46 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nsp.h\n+++ b/drivers/net/nfp/nfpcore/nfp_nsp.h\n@@ -189,6 +189,8 @@ void nfp_eth_config_cleanup_end(struct nfp_nsp *nsp);\n int nfp_eth_set_aneg(struct nfp_nsp *nsp, enum nfp_eth_aneg mode);\n int nfp_eth_set_speed(struct nfp_nsp *nsp, uint32_t speed);\n int nfp_eth_set_split(struct nfp_nsp *nsp, uint32_t lanes);\n+int nfp_eth_set_tx_pause(struct nfp_nsp *nsp, bool tx_pause);\n+int nfp_eth_set_rx_pause(struct nfp_nsp *nsp, bool rx_pause);\n \n /* NSP static information */\n struct nfp_nsp_identify {\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c\nindex ca8bc8f550..87db928c08 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c\n+++ b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c\n@@ -44,6 +44,8 @@\n #define NSP_ETH_CTRL_SET_LANES          RTE_BIT64(5)\n #define NSP_ETH_CTRL_SET_ANEG           RTE_BIT64(6)\n #define NSP_ETH_CTRL_SET_FEC            RTE_BIT64(7)\n+#define NSP_ETH_CTRL_SET_TX_PAUSE       RTE_BIT64(10)\n+#define NSP_ETH_CTRL_SET_RX_PAUSE       RTE_BIT64(11)\n \n /* Which connector port. */\n #define PORT_TP                 0x00\n@@ -519,7 +521,7 @@ nfp_eth_set_bit_config(struct nfp_nsp *nsp,\n \t\tuint32_t raw_idx,\n \t\tconst uint64_t mask,\n \t\tconst uint32_t shift,\n-\t\tuint32_t val,\n+\t\tuint64_t val,\n \t\tconst uint64_t ctrl_bit)\n {\n \tuint64_t reg;\n@@ -683,3 +685,51 @@ nfp_eth_set_split(struct nfp_nsp *nsp,\n \treturn NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_PORT,\n \t\t\tNSP_ETH_PORT_LANES, lanes, NSP_ETH_CTRL_SET_LANES);\n }\n+\n+/**\n+ * Set TX pause switch.\n+ *\n+ * @param nsp\n+ *    NFP NSP handle returned from nfp_eth_config_start()\n+ * @param tx_pause\n+ *   TX pause switch\n+ *\n+ * @return\n+ *   0 or -ERRNO\n+ */\n+int\n+nfp_eth_set_tx_pause(struct nfp_nsp *nsp,\n+\t\tbool tx_pause)\n+{\n+\tif (nfp_nsp_get_abi_ver_minor(nsp) < 37) {\n+\t\tPMD_DRV_LOG(ERR, \"Set frame pause operation not supported, please update flash.\");\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\treturn NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE,\n+\t\t\tNSP_ETH_STATE_TX_PAUSE, tx_pause, NSP_ETH_CTRL_SET_TX_PAUSE);\n+}\n+\n+/**\n+ * Set RX pause switch.\n+ *\n+ * @param nsp\n+ *    NFP NSP handle returned from nfp_eth_config_start()\n+ * @param rx_pause\n+ *   RX pause switch\n+ *\n+ * @return\n+ *   0 or -ERRNO\n+ */\n+int\n+nfp_eth_set_rx_pause(struct nfp_nsp *nsp,\n+\t\tbool rx_pause)\n+{\n+\tif (nfp_nsp_get_abi_ver_minor(nsp) < 37) {\n+\t\tPMD_DRV_LOG(ERR, \"Set frame pause operation not supported, please update flash.\");\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\treturn NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE,\n+\t\t\tNSP_ETH_STATE_RX_PAUSE, rx_pause, NSP_ETH_CTRL_SET_RX_PAUSE);\n+}\n",
    "prefixes": [
        "2/2"
    ]
}