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GET /api/patches/133645/?format=api
{ "id": 133645, "url": "http://patches.dpdk.org/api/patches/133645/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231031105131.441078-2-rongweil@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231031105131.441078-2-rongweil@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231031105131.441078-2-rongweil@nvidia.com", "date": "2023-10-31T10:51:26", "name": "[v3,1/6] net/mlx5: sample the srv6 last segment", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a7f858d7e64aeb1cabc81736b8491c39604290cd", "submitter": { "id": 2223, "url": "http://patches.dpdk.org/api/people/2223/?format=api", "name": "Rongwei Liu", "email": "rongweil@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231031105131.441078-2-rongweil@nvidia.com/mbox/", "series": [ { "id": 30071, "url": "http://patches.dpdk.org/api/series/30071/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30071", "date": "2023-10-31T10:51:26", "name": "support IPv6 extension push remove", "version": 3, "mbox": "http://patches.dpdk.org/series/30071/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/133645/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/133645/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 16ECB43251;\n\tTue, 31 Oct 2023 11:52:00 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A59C440294;\n\tTue, 31 Oct 2023 11:51:59 +0100 (CET)", "from NAM04-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam04on2072.outbound.protection.outlook.com [40.107.101.72])\n by mails.dpdk.org (Postfix) with ESMTP id 93624400EF\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Rongwei Liu <rongweil@nvidia.com>", "To": "<dev@dpdk.org>, <matan@nvidia.com>, <viacheslavo@nvidia.com>,\n <orika@nvidia.com>, <suanmingm@nvidia.com>, <thomas@monjalon.net>", "Subject": "[PATCH v3 1/6] net/mlx5: sample the srv6 last segment", "Date": "Tue, 31 Oct 2023 12:51:26 +0200", "Message-ID": "<20231031105131.441078-2-rongweil@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20231031105131.441078-1-rongweil@nvidia.com>", "References": "<20231031094244.381557-1-rongweil@nvidia.com>\n <20231031105131.441078-1-rongweil@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail201.nvidia.com (10.129.68.8) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000EE3B:EE_|DM4PR12MB7597:EE_", "X-MS-Office365-Filtering-Correlation-Id": "cc18f6b1-b1df-4b6e-e38c-08dbd9ff659a", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n LOWOixIjK/s3pHbZEgcHo5Fsou+mjNiSDxjRyg82noVDGGDMUwKsmlaBfFWR3xHrQax6Fp6Tt+KbqEYz1shflRPVoZkPQorKfOYLwPnmruYFGoi/j0r2c3LFEfyzs88RdIZS+EtKR1CcNgWcbsH6sMU8Su920ZGv6EprdbnuNWhQyXoUr1bBrRZlhXwMj4gkPtGMP6WYiDfI4p3bEUPg1B+UP66gEnB5hG6o9PjIM1gXLMkLra7G8LWtjwKWIBRe3NAZuMMpctNs+8PrzzXqpe41ft3qyeV8POs1u/Qro45BwRn64hce99JVWqasQ91Yd+8Eu9UQ7iofnvx0fq97s8VC1Q9bgSZiyaLtIC5WjHZjpwsS1CTdgpXkrqR6DHZx1lJuBlEEkV/4S/b6N12SujwDWGU/C6WTZGWpVDBvcEIPwL2rpv8mtYEK1POnt8GXATGQ0/i7Juc90ztrIyNd/lJ4Mtqk5cBPd/WZv4zXoqtrhBsfi6gucx8Gno8B0i/VP/V3aLMfK35FOJ/SKKfQkn19PwgtTAKF5uM+5/RzFs/NoC5Ke9zshAbhNxXLMKz8s2UZniXPeSUi6uyEBT9prM+gZkpmj1cE4ZxpvzkXqpZ4WcmWVQROc71f3kwWWPyCvvLDXDOaI0nrOQG7ze6XHmIxrR2EJGSshkjwHnqQyLkuXWy5PJ/roU00QLl9XJpCd9yzrOXsqq+embleeco5DCzBRz0iIPeDr4r9l+YjRVjexn1h3hSls4i7md8XLllw", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(39860400002)(136003)(396003)(346002)(376002)(230922051799003)(82310400011)(64100799003)(186009)(451199024)(1800799009)(46966006)(36840700001)(40470700004)(16526019)(6286002)(26005)(1076003)(40460700003)(55016003)(36756003)(86362001)(40480700001)(82740400003)(7636003)(356005)(426003)(336012)(2906002)(83380400001)(478600001)(7696005)(36860700001)(47076005)(6666004)(8936002)(8676002)(2616005)(316002)(5660300002)(41300700001)(110136005)(70586007)(70206006);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "31 Oct 2023 10:51:54.6344 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n cc18f6b1-b1df-4b6e-e38c-08dbd9ff659a", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000EE3B.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM4PR12MB7597", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "When removing the IPv6 routing extension header from the\npackets, the destination address should be updated to the\nlast one in the segment list.\n\nEnlarge the hardware sample scope to cover the last segment.\n\nSigned-off-by: Rongwei Liu <rongweil@nvidia.com>\nAcked-by: Ori Kam <orika@nvidia.com>\nAcked-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/mlx5.c | 41 ++++++++++++++++++++++++++++++-----------\n drivers/net/mlx5/mlx5.h | 6 ++++++\n 2 files changed, 36 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex f929d6547c..92d66e8f23 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -1067,6 +1067,7 @@ mlx5_alloc_srh_flex_parser(struct rte_eth_dev *dev)\n \tstruct mlx5_devx_graph_node_attr node = {\n \t\t.modify_field_select = 0,\n \t};\n+\tuint32_t i;\n \tuint32_t ids[MLX5_GRAPH_NODE_SAMPLE_NUM];\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_common_dev_config *config = &priv->sh->cdev->config;\n@@ -1100,10 +1101,18 @@ mlx5_alloc_srh_flex_parser(struct rte_eth_dev *dev)\n \tnode.next_header_field_size = 0x8;\n \tnode.in[0].arc_parse_graph_node = MLX5_GRAPH_ARC_NODE_IP;\n \tnode.in[0].compare_condition_value = IPPROTO_ROUTING;\n-\tnode.sample[0].flow_match_sample_en = 1;\n-\t/* First come first serve no matter inner or outer. */\n-\tnode.sample[0].flow_match_sample_tunnel_mode = MLX5_GRAPH_SAMPLE_TUNNEL_FIRST;\n-\tnode.sample[0].flow_match_sample_offset_mode = MLX5_GRAPH_SAMPLE_OFFSET_FIXED;\n+\t/* Final IPv6 address. */\n+\tfor (i = 0; i <= MLX5_SRV6_SAMPLE_NUM - 1 && i < MLX5_GRAPH_NODE_SAMPLE_NUM; i++) {\n+\t\tnode.sample[i].flow_match_sample_en = 1;\n+\t\tnode.sample[i].flow_match_sample_offset_mode =\n+\t\t\t\t\tMLX5_GRAPH_SAMPLE_OFFSET_FIXED;\n+\t\t/* First come first serve no matter inner or outer. */\n+\t\tnode.sample[i].flow_match_sample_tunnel_mode =\n+\t\t\t\t\tMLX5_GRAPH_SAMPLE_TUNNEL_FIRST;\n+\t\tnode.sample[i].flow_match_sample_field_base_offset =\n+\t\t\t\t\t(i + 1) * sizeof(uint32_t); /* in bytes */\n+\t}\n+\tnode.sample[0].flow_match_sample_field_base_offset = 0;\n \tnode.out[0].arc_parse_graph_node = MLX5_GRAPH_ARC_NODE_TCP;\n \tnode.out[0].compare_condition_value = IPPROTO_TCP;\n \tnode.out[1].arc_parse_graph_node = MLX5_GRAPH_ARC_NODE_UDP;\n@@ -1116,8 +1125,8 @@ mlx5_alloc_srh_flex_parser(struct rte_eth_dev *dev)\n \t\tgoto error;\n \t}\n \tpriv->sh->srh_flex_parser.flex.devx_fp->devx_obj = fp;\n-\tpriv->sh->srh_flex_parser.flex.mapnum = 1;\n-\tpriv->sh->srh_flex_parser.flex.devx_fp->num_samples = 1;\n+\tpriv->sh->srh_flex_parser.flex.mapnum = MLX5_SRV6_SAMPLE_NUM;\n+\tpriv->sh->srh_flex_parser.flex.devx_fp->num_samples = MLX5_SRV6_SAMPLE_NUM;\n \n \tret = mlx5_devx_cmd_query_parse_samples(fp, ids, priv->sh->srh_flex_parser.flex.mapnum,\n \t\t\t\t\t\t&priv->sh->srh_flex_parser.flex.devx_fp->anchor_id);\n@@ -1125,12 +1134,22 @@ mlx5_alloc_srh_flex_parser(struct rte_eth_dev *dev)\n \t\tDRV_LOG(ERR, \"Failed to query sample IDs.\");\n \t\tgoto error;\n \t}\n-\tret = mlx5_devx_cmd_match_sample_info_query(ibv_ctx, ids[0],\n-\t\t\t\t&priv->sh->srh_flex_parser.flex.devx_fp->sample_info[0]);\n-\tif (ret) {\n-\t\tDRV_LOG(ERR, \"Failed to query sample id information.\");\n-\t\tgoto error;\n+\tfor (i = 0; i <= MLX5_SRV6_SAMPLE_NUM - 1 && i < MLX5_GRAPH_NODE_SAMPLE_NUM; i++) {\n+\t\tret = mlx5_devx_cmd_match_sample_info_query(ibv_ctx, ids[i],\n+\t\t\t\t\t&priv->sh->srh_flex_parser.flex.devx_fp->sample_info[i]);\n+\t\tif (ret) {\n+\t\t\tDRV_LOG(ERR, \"Failed to query sample id %u information.\", ids[i]);\n+\t\t\tgoto error;\n+\t\t}\n+\t}\n+\tfor (i = 0; i <= MLX5_SRV6_SAMPLE_NUM - 1 && i < MLX5_GRAPH_NODE_SAMPLE_NUM; i++) {\n+\t\tpriv->sh->srh_flex_parser.flex.devx_fp->sample_ids[i] = ids[i];\n+\t\tpriv->sh->srh_flex_parser.flex.map[i].width = sizeof(uint32_t) * CHAR_BIT;\n+\t\tpriv->sh->srh_flex_parser.flex.map[i].reg_id = i;\n+\t\tpriv->sh->srh_flex_parser.flex.map[i].shift =\n+\t\t\t\t\t\t(i + 1) * sizeof(uint32_t) * CHAR_BIT;\n \t}\n+\tpriv->sh->srh_flex_parser.flex.map[0].shift = 0;\n \treturn 0;\n error:\n \tif (fp)\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex a20acb6ca8..f13a56ee9e 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1335,6 +1335,7 @@ struct mlx5_flex_pattern_field {\n \tuint16_t shift:5;\n \tuint16_t reg_id:5;\n };\n+\n #define MLX5_INVALID_SAMPLE_REG_ID 0x1F\n \n /* Port flex item context. */\n@@ -1346,6 +1347,11 @@ struct mlx5_flex_item {\n \tstruct mlx5_flex_pattern_field map[MLX5_FLEX_ITEM_MAPPING_NUM];\n };\n \n+/*\n+ * Sample an IPv6 address and the first dword of SRv6 header.\n+ * Then it is 16 + 4 = 20 bytes which is 5 dwords.\n+ */\n+#define MLX5_SRV6_SAMPLE_NUM 5\n /* Mlx5 internal flex parser profile structure. */\n struct mlx5_internal_flex_parser_profile {\n \tuint32_t refcnt;\n", "prefixes": [ "v3", "1/6" ] }