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GET /api/patches/133620/?format=api
{ "id": 133620, "url": "http://patches.dpdk.org/api/patches/133620/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231030022828.973851-3-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231030022828.973851-3-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231030022828.973851-3-suanmingm@nvidia.com", "date": "2023-10-30T02:28:27", "name": "[v2,2/3] net/mlx5: add port representor destination to mirror", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c48eb5afb681988ad5ffba2fd26d191a35f3f2ad", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231030022828.973851-3-suanmingm@nvidia.com/mbox/", "series": [ { "id": 30053, "url": "http://patches.dpdk.org/api/series/30053/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30053", "date": "2023-10-30T02:28:26", "name": "net/mlx5: add port representor destination to mirror", "version": 2, "mbox": "http://patches.dpdk.org/series/30053/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/133620/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/133620/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8B1374322C;\n\tMon, 30 Oct 2023 03:29:19 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4278B40698;\n\tMon, 30 Oct 2023 03:29:17 +0100 (CET)", "from NAM10-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam10on2084.outbound.protection.outlook.com [40.107.94.84])\n by mails.dpdk.org (Postfix) with ESMTP id BF1454067C\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>", "CC": "<dev@dpdk.org>, <rasland@nvidia.com>", "Subject": "[PATCH v2 2/3] net/mlx5: add port representor destination to mirror", "Date": "Mon, 30 Oct 2023 10:28:27 +0800", "Message-ID": "<20231030022828.973851-3-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20231030022828.973851-1-suanmingm@nvidia.com>", "References": "<20231017004401.698745-1-suanmingm@nvidia.com>\n <20231030022828.973851-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "SN1PEPF0002529E:EE_|DM6PR12MB5008:EE_", "X-MS-Office365-Filtering-Correlation-Id": "907be84e-3247-4920-a992-08dbd8f000f5", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n OExk4LOvH47gUu7zMqmzurwwyR7CnBrLECqh9ixI8i2fUqZztfofU4jLZyBPGBjQf90aTI9Xfdg2xdCL7mVs3GVowGUCqZ2UolUkogB81izKoB3R93O5iPBRYGWGRtn2PNrYHIh9tUuEmk/QfQmaMYiZnw9uEl6yblrHyijPtTS9q6hMX71ucFWapDlp9lop2jVsKwuyvSdOBO2xjn2G7+uEWOM3cEoqOR6DrPueqDucTAkqsliQrlrCvGwyML9HF0yOsKLGyYkIHP/WPatRhQ3rpV5vnDBTDx1ybpWc+ACy2+tindVuNz5xhbzetLGS0dFLnWkq6cBh1JfZKdxwfqajzJg4QI7Y2mLKatkTjZ91KpjNy257V+p10RzI748CJuKXxM3rAlztoIDkreq+va4Kcy7Bf3KtAFnmaB5A7dDWIYnXwusBgm+VUmOY2Byw6Mm6H2G2SJG3rhTky+eAdy4xa4p6dGSCBF1S2W3/amLigJzVIqWRAOdChUTnhUTDKLGotbI9Yv2mdT5jWWRNxs+jryAUybg5KdmZcp8hCBdfVZxEKNR7xR6+RVklwwpHr58Q96QINu9UK0YyWsSaHXEONXXdvTLKFDZ+WQyMOc5OhOgQZ/exFEiGiPl+rHoGJKIG+Px18//ssWi8Oi465Iix08bCyWf+kgRRe0zRrwnWs007FWQVsh9y0eheA3mAqNN5SWsbX/MkFJ+hwxQwasLNrzVh52NeMJKaYO44bc0=", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(376002)(396003)(39860400002)(136003)(346002)(230922051799003)(64100799003)(82310400011)(186009)(1800799009)(451199024)(46966006)(36840700001)(40470700004)(7696005)(6666004)(478600001)(83380400001)(47076005)(26005)(6286002)(16526019)(2616005)(107886003)(1076003)(336012)(426003)(2906002)(5660300002)(54906003)(41300700001)(6636002)(316002)(70206006)(110136005)(8936002)(8676002)(4326008)(70586007)(36860700001)(86362001)(36756003)(356005)(7636003)(82740400003)(40480700001)(40460700003)(55016003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Oct 2023 02:29:12.1501 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 907be84e-3247-4920-a992-08dbd8f000f5", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n SN1PEPF0002529E.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB5008", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "In order to clone the traffic from FDB to NIC TIR, user can set\nport representor action as mirror clone destination. In that case\ncloned traffic will be moved to E-Switch manager root table, and\ngoes to software TIR.\n\nThis commit adds the port representor support to mirror action.\n\nSigned-off-by: Suanming Mou <suanmingm@nvidia.com>\nAcked-by: Ori Kam <orika@nvidia.com>\n---\n doc/guides/rel_notes/release_23_11.rst | 1 +\n drivers/net/mlx5/mlx5_flow_hw.c | 19 ++++++++++++++++++-\n 2 files changed, 19 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/rel_notes/release_23_11.rst b/doc/guides/rel_notes/release_23_11.rst\nindex a895c6b45e..322d8b1e0e 100644\n--- a/doc/guides/rel_notes/release_23_11.rst\n+++ b/doc/guides/rel_notes/release_23_11.rst\n@@ -149,6 +149,7 @@ New Features\n * Added support for Network Service Header (NSH) flow matching.\n * Added support for ``RTE_FLOW_ACTION_TYPE_INDIRECT_LIST`` flow action.\n * Added support for ``RTE_FLOW_ITEM_TYPE_PTYPE`` flow item.\n+ * Added support for ``RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR`` flow action and mirror.\n \n * **Updated Solarflare net driver.**\n \ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 813a035e77..77f0e4f977 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -9739,6 +9739,7 @@ mlx5_mirror_destroy_clone(struct rte_eth_dev *dev,\n \t\tflow_hw_jump_release(dev, clone->action_ctx);\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:\n+\tcase RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:\n \tcase RTE_FLOW_ACTION_TYPE_RAW_ENCAP:\n \tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \tcase RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:\n@@ -9783,6 +9784,7 @@ mlx5_mirror_terminal_action(const struct rte_flow_action *action)\n \tcase RTE_FLOW_ACTION_TYPE_RSS:\n \tcase RTE_FLOW_ACTION_TYPE_QUEUE:\n \tcase RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:\n+\tcase RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:\n \t\treturn true;\n \tdefault:\n \t\tbreak;\n@@ -9796,19 +9798,30 @@ mlx5_mirror_validate_sample_action(struct rte_eth_dev *dev,\n \t\t\t\t const struct rte_flow_action *action)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tconst struct rte_flow_action_ethdev *port = NULL;\n+\tbool is_proxy = MLX5_HW_PORT_IS_PROXY(priv);\n \n+\tif (!action)\n+\t\treturn false;\n \tswitch (action->type) {\n \tcase RTE_FLOW_ACTION_TYPE_QUEUE:\n \tcase RTE_FLOW_ACTION_TYPE_RSS:\n \t\tif (flow_attr->transfer)\n \t\t\treturn false;\n \t\tbreak;\n+\tcase RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:\n+\t\tif (!is_proxy || !flow_attr->transfer)\n+\t\t\treturn false;\n+\t\tport = action->conf;\n+\t\tif (!port || port->port_id != MLX5_REPRESENTED_PORT_ESW_MGR)\n+\t\t\treturn false;\n+\t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:\n \tcase RTE_FLOW_ACTION_TYPE_RAW_ENCAP:\n \tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \tcase RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:\n \tcase RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:\n-\t\tif (!priv->sh->esw_mode && !flow_attr->transfer)\n+\t\tif (!is_proxy || !flow_attr->transfer)\n \t\t\treturn false;\n \t\tif (action[0].type == RTE_FLOW_ACTION_TYPE_RAW_DECAP &&\n \t\t action[1].type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)\n@@ -9966,6 +9979,7 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,\n \t\t\tstruct mlx5dr_action_dest_attr *dest_attr,\n \t\t\tuint8_t *reformat_buf, struct rte_flow_error *error)\n {\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n \tint ret;\n \tuint32_t i;\n \tbool decap_seen = false;\n@@ -9992,6 +10006,9 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,\n \t\t\tif (ret)\n \t\t\t\treturn ret;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:\n+\t\t\tdest_attr->dest = priv->hw_def_miss;\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \t\t\tdecap_seen = true;\n \t\t\tbreak;\n", "prefixes": [ "v2", "2/3" ] }