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GET /api/patches/133577/?format=api
{ "id": 133577, "url": "http://patches.dpdk.org/api/patches/133577/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231029163202.216450-4-getelson@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231029163202.216450-4-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231029163202.216450-4-getelson@nvidia.com", "date": "2023-10-29T16:31:36", "name": "[04/30] net/mlx5: add rte_device parameter to locate HWS registers", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "6dda8c5b934cc6fcfeaf93716876b9534df06f35", "submitter": { "id": 1882, "url": "http://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231029163202.216450-4-getelson@nvidia.com/mbox/", "series": [ { "id": 30049, "url": "http://patches.dpdk.org/api/series/30049/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30049", "date": "2023-10-29T16:31:33", "name": "[01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data", "version": 1, "mbox": "http://patches.dpdk.org/series/30049/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/133577/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/133577/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5F80243238;\n\tSun, 29 Oct 2023 17:32:54 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C5B8640A80;\n\tSun, 29 Oct 2023 17:32:50 +0100 (CET)", "from NAM10-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam10on2074.outbound.protection.outlook.com [40.107.94.74])\n by mails.dpdk.org (Postfix) with ESMTP id 9819240A73\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<getelson@nvidia.com>, <mkashani@nvidia.com>, <rasland@nvidia.com>, \"Ori\n Kam\" <orika@nvidia.com>, Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>", "Subject": "[PATCH 04/30] net/mlx5: add rte_device parameter to locate HWS\n registers", "Date": "Sun, 29 Oct 2023 18:31:36 +0200", "Message-ID": "<20231029163202.216450-4-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20231029163202.216450-1-getelson@nvidia.com>", "References": "<20231029163202.216450-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL02EPF0001A0FC:EE_|DS0PR12MB9276:EE_", "X-MS-Office365-Filtering-Correlation-Id": "4b058bda-8e6e-4fd0-e201-08dbd89cae8f", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n w/t3140q4E//Dn9zK2a3cQxxq2vimUehZ/HcFIGhZUGWP6U9C2XGZsGulwVUpCqQKTFimBP9PtC/jX/fzMTobBZFCFbSqIVrEA6UjsN7rffkgZHvIU6Sj1W8eZOX2Z/Y1n2k0MpkcU+XTcq3PyYDzDs6+B6dcr+xby4ceShnwfnBAXEzh1+MhJAF/qv7XReMOySlleQU0mlkX/NASD2p8plLGwuHNgaTVrXEluVdfEkG+QCsoWY6gcIXZgHZa3NTvnfIRS0pZLfwr7GbpEwgz6NIOM1XCkaP7GZEMPQ4fACzJKF3577F3MlG4hhhiuxY2vMH1Z+YYeAAwz5dJwlS9H7JuEbomDqdGhLU1M8UPHQ4+uXrb+s7gubLkh5wW+R5YZbtQFgtTcWPb0gIraYpq2OkIUskr5UmULCTBfS6YU8Hw/AyCGCAxJqfoi1m4soZ2q1/Ztmubzqk5QcBHiga7WDMuywbYauwKIG017ds1VE7pyXJtRk9V9IgytrNopjGAr1JG7MOLlFHMkcMJOADj7wTV7ySnZH7YGX3nnRQT6GZsHKrUzn95U5ovfMz9w/hlZAgQEwMF4K7/++oZLWxf8HvBf48Qpl5fV5kbgkwIPzT/mxZRAdQfdSnNc7mErlGFw8V7Mrg9gtEmW9Z7Yi223Myz7z2ebxPEfiQo7LMwOPRRy6ToMS8MkcPlACzd/irWrijUgz4U+OJDTfhBC/l/tdYzS9rnNH0Yp9lc3ezAzaiRGOfntk4mr6dJq7CXhwA", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; 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Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BL02EPF0001A0FC.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DS0PR12MB9276", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "1. Add rte_eth_dev parameter to the `flow_hw_get_reg_id()`\n\n2. Add mlx5_flow_hw_get_reg_id()\n\nSigned-off-by: Gregory Etelson <getelson@nvidia.com>\nAcked-by: Ori Kam <orika@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow.c | 2 +-\n drivers/net/mlx5/mlx5_flow.h | 13 +++++++++++--\n drivers/net/mlx5/mlx5_flow_dv.c | 12 ++++++------\n drivers/net/mlx5/mlx5_flow_hw.c | 7 +++----\n 4 files changed, 21 insertions(+), 13 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex a500afd4f7..45a67607ed 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -1718,7 +1718,7 @@ flow_drv_rxq_flags_set(struct rte_eth_dev *dev,\n \t}\n }\n \n-static void\n+void\n flow_rxq_mark_flag_set(struct rte_eth_dev *dev)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 92dfd9a3a4..9344b5178a 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -1678,8 +1678,10 @@ void flow_hw_clear_flow_metadata_config(void);\n * TODO: Per port / device, FDB or NIC for Meta matching.\n */\n static __rte_always_inline int\n-flow_hw_get_reg_id(enum rte_flow_item_type type, uint32_t id)\n+flow_hw_get_reg_id(struct rte_eth_dev *dev,\n+\t\t enum rte_flow_item_type type, uint32_t id)\n {\n+\tRTE_SET_USED(dev);\n \tswitch (type) {\n \tcase RTE_FLOW_ITEM_TYPE_META:\n #ifdef HAVE_MLX5_HWS_SUPPORT\n@@ -1723,7 +1725,8 @@ flow_hw_get_reg_id_from_ctx(void *dr_ctx,\n \n \t\tpriv = rte_eth_devices[port].data->dev_private;\n \t\tif (priv->dr_ctx == dr_ctx)\n-\t\t\treturn flow_hw_get_reg_id(type, id);\n+\t\t\treturn flow_hw_get_reg_id(&rte_eth_devices[port],\n+\t\t\t\t\t\t type, id);\n \t}\n #else\n \tRTE_SET_USED(dr_ctx);\n@@ -2874,6 +2877,12 @@ flow_hw_get_srh_flex_parser_byte_off_from_ctx(void *dr_ctx __rte_unused)\n }\n void\n mlx5_indirect_list_handles_release(struct rte_eth_dev *dev);\n+void\n+flow_rxq_mark_flag_set(struct rte_eth_dev *dev);\n+int\n+mlx5_flow_hw_get_reg_id(struct mlx5dr_context *ctx,\n+\t\t\tenum rte_flow_item_type type, uint32_t id);\n+\n #ifdef HAVE_MLX5_HWS_SUPPORT\n struct mlx5_mirror;\n void\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 3dc2fe5c71..05a374493d 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1919,8 +1919,8 @@ mlx5_flow_field_id_to_modify_info\n \t\t\toff_be = (tag_index == MLX5_LINEAR_HASH_TAG_INDEX) ?\n \t\t\t\t 16 - (data->offset + width) + 16 : data->offset;\n \t\t\tif (priv->sh->config.dv_flow_en == 2)\n-\t\t\t\treg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG,\n-\t\t\t\t\t\t\t tag_index);\n+\t\t\t\treg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG,\n+\t\t\t\t\t\t\t data->level);\n \t\t\telse\n \t\t\t\treg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,\n \t\t\t\t\t\t\t tag_index, error);\n@@ -2025,7 +2025,7 @@ mlx5_flow_field_id_to_modify_info\n \n \t\t\tif (priv->sh->config.dv_flow_en == 2)\n \t\t\t\treg = flow_hw_get_reg_id\n-\t\t\t\t\t(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n+\t\t\t\t\t(dev, RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n \t\t\telse\n \t\t\t\treg = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR,\n \t\t\t\t\t\t 0, error);\n@@ -10256,7 +10256,7 @@ flow_dv_translate_item_meta(struct rte_eth_dev *dev,\n \tif (!!(key_type & MLX5_SET_MATCHER_SW))\n \t\treg = flow_dv_get_metadata_reg(dev, attr, NULL);\n \telse\n-\t\treg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_META, 0);\n+\t\treg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_META, 0);\n \tif (reg < 0)\n \t\treturn;\n \tMLX5_ASSERT(reg != REG_NON);\n@@ -10359,7 +10359,7 @@ flow_dv_translate_item_tag(struct rte_eth_dev *dev, void *key,\n \tif (!!(key_type & MLX5_SET_MATCHER_SW))\n \t\treg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, index, NULL);\n \telse\n-\t\treg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG, index);\n+\t\treg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG, index);\n \tMLX5_ASSERT(reg > 0);\n \tflow_dv_match_meta_reg(key, (enum modify_reg)reg, tag_v->data, tag_m->data);\n }\n@@ -11057,7 +11057,7 @@ flow_dv_translate_item_meter_color(struct rte_eth_dev *dev, void *key,\n \tif (!!(key_type & MLX5_SET_MATCHER_SW))\n \t\treg = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, NULL);\n \telse\n-\t\treg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n+\t\treg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n \tif (reg == REG_NON)\n \t\treturn;\n \tflow_dv_match_meta_reg(key, (enum modify_reg)reg, value, mask);\ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 88fe8d9a68..d3f065e9c1 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -5595,9 +5595,8 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,\n \t\t\tif (tag == NULL)\n \t\t\t\treturn rte_flow_error_set(error, EINVAL,\n \t\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\t\t\t NULL,\n-\t\t\t\t\t\t\t \"Tag spec is NULL\");\n-\t\t\ttag_idx = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG, tag->index);\n+\t\t\t\t\t\t\t NULL, \"Tag spec is NULL\");\n+\t\t\ttag_idx = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG, tag->index);\n \t\t\tif (tag_idx == REG_NON)\n \t\t\t\treturn rte_flow_error_set(error, EINVAL,\n \t\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n@@ -5655,7 +5654,7 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_METER_COLOR:\n \t\t{\n-\t\t\tint reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n+\t\t\tint reg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n \t\t\tif (reg == REG_NON)\n \t\t\t\treturn rte_flow_error_set(error, EINVAL,\n \t\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n", "prefixes": [ "04/30" ] }