Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 133453,
    "url": "http://patches.dpdk.org/api/patches/133453/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231027030001.602639-11-chaoyong.he@corigine.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20231027030001.602639-11-chaoyong.he@corigine.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20231027030001.602639-11-chaoyong.he@corigine.com",
    "date": "2023-10-27T02:59:47",
    "name": "[v4,10/24] net/nfp: change parameter of reconfig",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "bf384b59b541b7cb4255c57e54c1ab53160a5a17",
    "submitter": {
        "id": 2554,
        "url": "http://patches.dpdk.org/api/people/2554/?format=api",
        "name": "Chaoyong He",
        "email": "chaoyong.he@corigine.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231027030001.602639-11-chaoyong.he@corigine.com/mbox/",
    "series": [
        {
            "id": 30016,
            "url": "http://patches.dpdk.org/api/series/30016/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30016",
            "date": "2023-10-27T02:59:37",
            "name": "add the NFP vDPA PMD",
            "version": 4,
            "mbox": "http://patches.dpdk.org/series/30016/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/133453/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/133453/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5C55C4320F;\n\tFri, 27 Oct 2023 05:02:11 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 09FF142E00;\n\tFri, 27 Oct 2023 05:00:57 +0200 (CEST)",
            "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2091.outbound.protection.outlook.com [40.107.220.91])\n by mails.dpdk.org (Postfix) with ESMTP id 5B0E842DC1\n for <dev@dpdk.org>; Fri, 27 Oct 2023 05:00:46 +0200 (CEST)",
            "from SJ0PR13MB5545.namprd13.prod.outlook.com (2603:10b6:a03:424::5)\n by DM6PR13MB4493.namprd13.prod.outlook.com (2603:10b6:5:1b9::16) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6907.33; Fri, 27 Oct\n 2023 03:00:43 +0000",
            "from SJ0PR13MB5545.namprd13.prod.outlook.com\n ([fe80::45b3:d83c:cff2:4a1b]) by SJ0PR13MB5545.namprd13.prod.outlook.com\n ([fe80::45b3:d83c:cff2:4a1b%6]) with mapi id 15.20.6933.022; Fri, 27 Oct 2023\n 03:00:43 +0000"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=dxzm7wB3NWYW6pDtWqKBp4FLUAHqy8mPPzHSeVGicSXsxfdgtcNVF4CBihbGTCbSDcs9jhMNyC4JGgcU3wBw8U1+49rlrtsnbTaBEvlxjChFwNHbDHTEYLVf4x+lS5bE4v8bKmaEYiN5dylif2jGTmKi3aChts4HqDf5U7jzUOKFCEAAYpY4z6edtWDWah9KcH8HzL9cukrFbGLuxkjV64fYmz1cfBV8Z8iQiASxLuKG7t3ULh+x9qXxhTYRANxXCdvWt2KPTQtq+hhauzDmjQ/exp0zGfGD12QS/SfHaGhgx3TGpeWNInfE/YZ6IWlQ11wpH7oJlQL1kI7Nhl3WDA==",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=6l4RrTx+p2ORCx6/L0mC61f/C1QnDjSNY/xqbz1YhyU=;\n b=SKVpLEtKzPYa/INVQg1PBs1b7Z9x/L0gcDUgS9pLv5d0gn7KkLRegXHXHNxArPOXuxFqIv5Vw9k84Tg4rPP1DRWKaJ1CArmNjd/cDl7NDXUOC97otcHIUiiUUs5acLcEUn99jgPyEVOOd6aHZ5vSCwNWR+zEO4Rv9c0OjeUNQexqUxkcmUhG9F0sBVOuXqm79R51Apg/Dpeaq95l3NtDmzohhU9pPDlWyk3A76Lp8YKI60wj88x42ZWxTnWwo9oqtScpPero+1nSDzyJMX/SkuTUQZdGW0E7pEt5hei6x4vcC5A2fL/vdCKqXrtnRD8rV6MEld5khPn6ZbYJHwy4xg==",
        "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=corigine.com; dmarc=pass action=none header.from=corigine.com;\n dkim=pass header.d=corigine.com; arc=none",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=corigine.onmicrosoft.com; s=selector2-corigine-onmicrosoft-com;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=6l4RrTx+p2ORCx6/L0mC61f/C1QnDjSNY/xqbz1YhyU=;\n b=BghQtopfR30QdpqtF/dJvOSjc1+kOoIuagxOc6Ug7zuf2c2q5DnZklCepZ8dj9c92L1x9WQ8HGWB4+1Hzt3PZjHHpULiImx2+MSNy+/zEuOuHzG+JEGC6b0Oq0Ri6ECXCYp6myR1uFsfNc+ulXEE+AiPz495aJ0fOFD6h5OsfYE=",
        "Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;",
        "From": "Chaoyong He <chaoyong.he@corigine.com>",
        "To": "dev@dpdk.org",
        "Cc": "oss-drivers@corigine.com, Chaoyong He <chaoyong.he@corigine.com>,\n Long Wu <long.wu@corigine.com>, Peng Zhang <peng.zhang@corigine.com>",
        "Subject": "[PATCH v4 10/24] net/nfp: change parameter of reconfig",
        "Date": "Fri, 27 Oct 2023 10:59:47 +0800",
        "Message-Id": "<20231027030001.602639-11-chaoyong.he@corigine.com>",
        "X-Mailer": "git-send-email 2.39.1",
        "In-Reply-To": "<20231027030001.602639-1-chaoyong.he@corigine.com>",
        "References": "<20231026064324.177531-1-chaoyong.he@corigine.com>\n <20231027030001.602639-1-chaoyong.he@corigine.com>",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-ClientProxiedBy": "BYAPR08CA0065.namprd08.prod.outlook.com\n (2603:10b6:a03:117::42) To SJ0PR13MB5545.namprd13.prod.outlook.com\n (2603:10b6:a03:424::5)",
        "MIME-Version": "1.0",
        "X-MS-PublicTrafficType": "Email",
        "X-MS-TrafficTypeDiagnostic": "SJ0PR13MB5545:EE_|DM6PR13MB4493:EE_",
        "X-MS-Office365-Filtering-Correlation-Id": "3e164df8-f435-4b58-53f9-08dbd698e8fc",
        "X-MS-Exchange-SenderADCheck": "1",
        "X-MS-Exchange-AntiSpam-Relay": "0",
        "X-Microsoft-Antispam": "BCL:0;",
        "X-Microsoft-Antispam-Message-Info": "\n vkQ95WQEqPeS9LEVOcXAYk+yF0/820/EDto2b5flsI0IDIGsSsnUemI7tT2x0k/1mTeXz5NehzSrWIORf4k1kWiBKVyRBUhFiy4xyKRBoTaURGsLGBKl+vCpsAtu2Bp1kHiHoCyeymmkFZWt4gcJAynw4xYqF7p7uJFer2XFrjPOWStZ1cvOZ1v7Llbja3WKjJgU8MF16kgHq82+soPNWeAq4VMTxTsZyu2pIM12nqlRKVZMQ9iotWpO1cJyJdsOQAxKdtaGmIRmTyyM9Nj2KRtsHJS7pxjM5Iei4NputPLCmjSKuTOGPc1cFiA156nQlkKzMdUc6xsEFuiWUIYYrlIoHeL97BZSr6AE3DvRe/mYjTtVQeZTpO/Y6NUa1Ds2OAe4rIco1RTBf4xdhgTblKZ0j4j5qd/PeTQrgZtCyb/NDXyp9+F8KeoJ0r5M/pZwrrnRh3UcRwCSmAezHfi/P+K92WjC2yBMVKmKoxq05uBcyJOdOZFaJ8+E8S7Cv0RwmtfgK64NzAef5xX77txxTEED6pnxTURvPR7vocfqZTyrmitK5blYZ05n8kmHv/EPP3vfwFdJRKuwz9TATaytDEaK9zqoCCWETSDFkTYLHI8WJasqm/WuUlKfubbHwDF/HpjOL6o820WzNAMOxYp2PhyhLPm3hSQ8Tg2XGjm/Z5A=",
        "X-Forefront-Antispam-Report": "CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:SJ0PR13MB5545.namprd13.prod.outlook.com; PTR:; CAT:NONE;\n SFS:(13230031)(396003)(136003)(366004)(346002)(376002)(39840400004)(230922051799003)(186009)(1800799009)(64100799003)(451199024)(38350700005)(83380400001)(30864003)(4326008)(52116002)(2906002)(38100700002)(107886003)(44832011)(8936002)(26005)(2616005)(1076003)(36756003)(8676002)(54906003)(5660300002)(66476007)(6916009)(6506007)(316002)(6486002)(6512007)(41300700001)(66556008)(66946007)(86362001)(478600001);\n DIR:OUT; SFP:1102;",
        "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1",
        "X-MS-Exchange-AntiSpam-MessageData-0": "\n WPyx4XJIsx5hweG152EUaFiSaga/IshrOfLTzJaZncpnA/HfQG0BmCVSzjrhAhTOTwcWWCBOAbisHMy2t+OsdSC9l7egLI6T5SKMxPo1KvDX3hNcnfHjBUH/GelL9lteSvC8R3p77u7MkpfsOOGpVxUwai2Np+TzslWsEpVm7zsR6rVAkr3i7uiNNwFQxD9v1ct0MYDHNeMVK7hUTD/W8oAZqPY+f5qw5EiOOS0XZ+WhJEIkFBW16VzDE8HWWv6LdGTdf/8CYg4OhMbTExwGXM6vqCguoCsXQB2fZ86S3PPtw+Xayf7f0iyryBK09z56lErDm1w9wSCAEL+QG/Vc7aEjDWu+VhvUCcXhyLOcdPME+lH6NLmv3G3BkizK1Jz3uax1HfyxV9QVlLn6i+RZe2Q7geFyotV3F9OwKPjeutj4VC4hnztqTGg1ik5pr95xTj6ILh/QHt+zqYaV/d27Es7XK8KZhfnqs5rRZrRY7gzLK+O/79ZAT/tIA8PHSMdgCc3KPq34NB7Br9lc2sC6q5Zb40a85YW1OiAzYiDS4dQ2XHee9Xwa4SDFqSvDKogI+tK6PvcH0kE9VV3gHBI/e+MXBQXQIiVF3GFfiFFsqbXHCAn4lNYPJrb8/2OD7oS/vV+PG0MjJl2MjY8BfXRDILdBiMCebRSRy8r7QjnZiyZEIpB62SmZYR1KwW//2L9i8kjlc5ad78F8FK2FSal2I+qIvUM9Nk4DC0LIi6EboRUN3BT4VSu3Jdk9d0o0y2dduuXEh5c3hbA6RHgiYHtvhxlary/vyJKL1rXXX9ez+/QxyshuvKQlJVR9bSI6lgGGrO+R/ed2UgPUvoSxukdDgcdNGJE3mLtdQ2aEI18e5kX5onIleiWt1Iu31KYDa5Fr6hkMhtFFvfDAfQsNIRvU/tmhv2ZIdETSiUu7h/C52qGjJZlfOg5Z+l1Sr06noGCBjdwtA2Lm/LnPr1kC8stgosrSD02cB9Amhoulm4uEl8NC7Io85iAdKwqhcD0wGiDhm8UpXXPfkWefAvkyqfUSDE7Q2OUdxQnWWB2a3ExjiyeltYL5c36/epZbZ7/iY8qT/EwFOM7nuaop26V/MM7hxa86iJk6/L6QabgjD1tBgQjgT6KWVan/3hr3SikkOCrunuOGDe2GYczfW8fDXCQdGTl4pTwDzeoVNbAWIHX91pnTJtUcsEFJEenDAwGajWDI8h1Xv6RiFLyGWnqZ0Axk3Xk0JLilcHT28Yr5QFZBEX8H09sU5FNdI9Zw0hsaRThoUvKBrtmjiL7AOeaPLGvRNG7zl5STGzmSyr6/apmlvd+yAhLgzL3nysw2r+07m6eYa6snRri1HCVoz/LcsvQraRyIZ+fyAAmxEK5cXygLn+/XjmvPsACV601uJgSSzFNwB9pUHsvf0rVx7ZP21oOSY+okDtnfGZfXSB89Og877w6WBhGfnCJXjsUx4o24L13x2dRyaEEazhHPYmVeGppBG8OtNiBSriC7iJFek6nZgxyP2HVJKuv86rAr7uMUKshcynetQNzDRXx/CaHlrTPYL/CzRYX35kygj74WdyVF+YMDSphBo1X4W7vqlLHnq+1xLaqogWJTOa2ml0Wf3B7fqA==",
        "X-OriginatorOrg": "corigine.com",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 3e164df8-f435-4b58-53f9-08dbd698e8fc",
        "X-MS-Exchange-CrossTenant-AuthSource": "SJ0PR13MB5545.namprd13.prod.outlook.com",
        "X-MS-Exchange-CrossTenant-AuthAs": "Internal",
        "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Oct 2023 03:00:43.8368 (UTC)",
        "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted",
        "X-MS-Exchange-CrossTenant-Id": "fe128f2c-073b-4c20-818e-7246a585940c",
        "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED",
        "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n 0ksC3boHZyrpHlu0HWWOLyopQ434Qee2AKXpfFV1Edoth4cN4GvRXSNL30hV9OpLLtToESs4TI/R8Y31SuXhWTs2ij/jhWvHIDie3Gic6+Q=",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR13MB4493",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Extract the 'reconfig_lock' data field into the super class, also change\nthe parameter of the related APIs, prepare for the upcoming common\nlibrary.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nReviewed-by: Long Wu <long.wu@corigine.com>\nReviewed-by: Peng Zhang <peng.zhang@corigine.com>\n---\n drivers/net/nfp/flower/nfp_flower.c |  50 +++++----\n drivers/net/nfp/nfp_ethdev.c        |  34 +++---\n drivers/net/nfp/nfp_ethdev_vf.c     |  20 ++--\n drivers/net/nfp/nfp_net_common.c    | 161 +++++++++++++++-------------\n drivers/net/nfp/nfp_net_common.h    |   7 +-\n 5 files changed, 149 insertions(+), 123 deletions(-)",
    "diff": "diff --git a/drivers/net/nfp/flower/nfp_flower.c b/drivers/net/nfp/flower/nfp_flower.c\nindex ccb579541b..831f4a7265 100644\n--- a/drivers/net/nfp/flower/nfp_flower.c\n+++ b/drivers/net/nfp/flower/nfp_flower.c\n@@ -52,27 +52,29 @@ nfp_pf_repr_disable_queues(struct rte_eth_dev *dev)\n {\n \tuint32_t update;\n \tuint32_t new_ctrl;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \tstruct nfp_flower_representor *repr;\n \n \trepr = dev->data->dev_private;\n-\thw = repr->app_fw_flower->pf_hw;\n+\tnet_hw = repr->app_fw_flower->pf_hw;\n+\thw = &net_hw->super;\n \n-\tnn_cfg_writeq(&hw->super, NFP_NET_CFG_TXRS_ENABLE, 0);\n-\tnn_cfg_writeq(&hw->super, NFP_NET_CFG_RXRS_ENABLE, 0);\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_TXRS_ENABLE, 0);\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_RXRS_ENABLE, 0);\n \n-\tnew_ctrl = hw->super.ctrl & ~NFP_NET_CFG_CTRL_ENABLE;\n+\tnew_ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_ENABLE;\n \tupdate = NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING |\n \t\t\tNFP_NET_CFG_UPDATE_MSIX;\n \n-\tif (hw->super.cap & NFP_NET_CFG_CTRL_RINGCFG)\n+\tif (hw->cap & NFP_NET_CFG_CTRL_RINGCFG)\n \t\tnew_ctrl &= ~NFP_NET_CFG_CTRL_RINGCFG;\n \n \t/* If an error when reconfig we avoid to change hw state */\n-\tif (nfp_net_reconfig(hw, new_ctrl, update) != 0)\n+\tif (nfp_reconfig(hw, new_ctrl, update) < 0)\n \t\treturn;\n \n-\thw->super.ctrl = new_ctrl;\n+\thw->ctrl = new_ctrl;\n }\n \n int\n@@ -80,13 +82,15 @@ nfp_flower_pf_start(struct rte_eth_dev *dev)\n {\n \tint ret;\n \tuint16_t i;\n+\tstruct nfp_hw *hw;\n \tuint32_t new_ctrl;\n \tuint32_t update = 0;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \tstruct nfp_flower_representor *repr;\n \n \trepr = dev->data->dev_private;\n-\thw = repr->app_fw_flower->pf_hw;\n+\tnet_hw = repr->app_fw_flower->pf_hw;\n+\thw = &net_hw->super;\n \n \t/* Disabling queues just in case... */\n \tnfp_pf_repr_disable_queues(dev);\n@@ -97,11 +101,11 @@ nfp_flower_pf_start(struct rte_eth_dev *dev)\n \tnew_ctrl = nfp_check_offloads(dev);\n \n \t/* Writing configuration parameters in the device */\n-\tnfp_net_params_setup(hw);\n+\tnfp_net_params_setup(net_hw);\n \n \tupdate |= NFP_NET_CFG_UPDATE_RSS;\n \n-\tif ((hw->super.cap & NFP_NET_CFG_CTRL_RSS2) != 0)\n+\tif ((hw->cap & NFP_NET_CFG_CTRL_RSS2) != 0)\n \t\tnew_ctrl |= NFP_NET_CFG_CTRL_RSS2;\n \telse\n \t\tnew_ctrl |= NFP_NET_CFG_CTRL_RSS;\n@@ -111,19 +115,19 @@ nfp_flower_pf_start(struct rte_eth_dev *dev)\n \n \tupdate |= NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING;\n \n-\tif ((hw->super.cap & NFP_NET_CFG_CTRL_RINGCFG) != 0)\n+\tif ((hw->cap & NFP_NET_CFG_CTRL_RINGCFG) != 0)\n \t\tnew_ctrl |= NFP_NET_CFG_CTRL_RINGCFG;\n \n-\tnn_cfg_writel(&hw->super, NFP_NET_CFG_CTRL, new_ctrl);\n+\tnn_cfg_writel(hw, NFP_NET_CFG_CTRL, new_ctrl);\n \n \t/* If an error when reconfig we avoid to change hw state */\n-\tret = nfp_net_reconfig(hw, new_ctrl, update);\n+\tret = nfp_reconfig(hw, new_ctrl, update);\n \tif (ret != 0) {\n \t\tPMD_INIT_LOG(ERR, \"Failed to reconfig PF vnic\");\n \t\treturn -EIO;\n \t}\n \n-\thw->super.ctrl = new_ctrl;\n+\thw->ctrl = new_ctrl;\n \n \t/* Setup the freelist ring */\n \tret = nfp_net_rx_freelist_setup(dev);\n@@ -374,7 +378,7 @@ nfp_flower_init_vnic_common(struct nfp_net_hw *hw,\n \t\t\tvnic_type, hw->max_rx_queues, hw->max_tx_queues);\n \n \t/* Initializing spinlock for reconfigs */\n-\trte_spinlock_init(&hw->reconfig_lock);\n+\trte_spinlock_init(&hw->super.reconfig_lock);\n \n \treturn 0;\n }\n@@ -690,14 +694,16 @@ nfp_flower_cleanup_ctrl_vnic(struct nfp_net_hw *hw)\n }\n \n static int\n-nfp_flower_start_ctrl_vnic(struct nfp_net_hw *hw)\n+nfp_flower_start_ctrl_vnic(struct nfp_net_hw *net_hw)\n {\n \tint ret;\n \tuint32_t update;\n \tuint32_t new_ctrl;\n+\tstruct nfp_hw *hw;\n \tstruct rte_eth_dev *dev;\n \n-\tdev = hw->eth_dev;\n+\tdev = net_hw->eth_dev;\n+\thw = &net_hw->super;\n \n \t/* Disabling queues just in case... */\n \tnfp_net_disable_queues(dev);\n@@ -706,7 +712,7 @@ nfp_flower_start_ctrl_vnic(struct nfp_net_hw *hw)\n \tnfp_net_enable_queues(dev);\n \n \t/* Writing configuration parameters in the device */\n-\tnfp_net_params_setup(hw);\n+\tnfp_net_params_setup(net_hw);\n \n \tnew_ctrl = NFP_NET_CFG_CTRL_ENABLE;\n \tupdate = NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING |\n@@ -715,13 +721,13 @@ nfp_flower_start_ctrl_vnic(struct nfp_net_hw *hw)\n \trte_wmb();\n \n \t/* If an error when reconfig we avoid to change hw state */\n-\tret = nfp_net_reconfig(hw, new_ctrl, update);\n+\tret = nfp_reconfig(hw, new_ctrl, update);\n \tif (ret != 0) {\n \t\tPMD_INIT_LOG(ERR, \"Failed to reconfig ctrl vnic\");\n \t\treturn -EIO;\n \t}\n \n-\thw->super.ctrl = new_ctrl;\n+\thw->ctrl = new_ctrl;\n \n \t/* Setup the freelist ring */\n \tret = nfp_net_rx_freelist_setup(dev);\ndiff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c\nindex a773a81e55..1378545d22 100644\n--- a/drivers/net/nfp/nfp_ethdev.c\n+++ b/drivers/net/nfp/nfp_ethdev.c\n@@ -45,12 +45,13 @@ nfp_net_start(struct rte_eth_dev *dev)\n {\n \tint ret;\n \tuint16_t i;\n+\tstruct nfp_hw *hw;\n \tuint32_t new_ctrl;\n \tuint32_t update = 0;\n \tuint32_t cap_extend;\n \tuint32_t intr_vector;\n-\tstruct nfp_net_hw *hw;\n \tuint32_t ctrl_extend = 0;\n+\tstruct nfp_net_hw *net_hw;\n \tstruct nfp_pf_dev *pf_dev;\n \tstruct rte_eth_conf *dev_conf;\n \tstruct rte_eth_rxmode *rxmode;\n@@ -58,9 +59,10 @@ nfp_net_start(struct rte_eth_dev *dev)\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n \tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n-\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tnet_hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tpf_dev = NFP_NET_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tapp_fw_nic = NFP_PRIV_TO_APP_FW_NIC(pf_dev->app_fw_priv);\n+\thw = &net_hw->super;\n \n \t/* Disabling queues just in case... */\n \tnfp_net_disable_queues(dev);\n@@ -100,9 +102,9 @@ nfp_net_start(struct rte_eth_dev *dev)\n \t}\n \n \t/* Checking MTU set */\n-\tif (dev->data->mtu > hw->flbufsz) {\n+\tif (dev->data->mtu > net_hw->flbufsz) {\n \t\tPMD_INIT_LOG(ERR, \"MTU (%u) can't be larger than the current NFP_FRAME_SIZE (%u)\",\n-\t\t\t\tdev->data->mtu, hw->flbufsz);\n+\t\t\t\tdev->data->mtu, net_hw->flbufsz);\n \t\treturn -ERANGE;\n \t}\n \n@@ -111,7 +113,7 @@ nfp_net_start(struct rte_eth_dev *dev)\n \tnew_ctrl = nfp_check_offloads(dev);\n \n \t/* Writing configuration parameters in the device */\n-\tnfp_net_params_setup(hw);\n+\tnfp_net_params_setup(net_hw);\n \n \tdev_conf = &dev->data->dev_conf;\n \trxmode = &dev_conf->rxmode;\n@@ -119,7 +121,7 @@ nfp_net_start(struct rte_eth_dev *dev)\n \tif ((rxmode->mq_mode & RTE_ETH_MQ_RX_RSS) != 0) {\n \t\tnfp_net_rss_config_default(dev);\n \t\tupdate |= NFP_NET_CFG_UPDATE_RSS;\n-\t\tnew_ctrl |= nfp_net_cfg_ctrl_rss(hw->super.cap);\n+\t\tnew_ctrl |= nfp_net_cfg_ctrl_rss(hw->cap);\n \t}\n \n \t/* Enable device */\n@@ -128,19 +130,19 @@ nfp_net_start(struct rte_eth_dev *dev)\n \tupdate |= NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING;\n \n \t/* Enable vxlan */\n-\tif ((hw->super.cap & NFP_NET_CFG_CTRL_VXLAN) != 0) {\n+\tif ((hw->cap & NFP_NET_CFG_CTRL_VXLAN) != 0) {\n \t\tnew_ctrl |= NFP_NET_CFG_CTRL_VXLAN;\n \t\tupdate |= NFP_NET_CFG_UPDATE_VXLAN;\n \t}\n \n-\tif ((hw->super.cap & NFP_NET_CFG_CTRL_RINGCFG) != 0)\n+\tif ((hw->cap & NFP_NET_CFG_CTRL_RINGCFG) != 0)\n \t\tnew_ctrl |= NFP_NET_CFG_CTRL_RINGCFG;\n \n-\tif (nfp_net_reconfig(hw, new_ctrl, update) != 0)\n+\tif (nfp_reconfig(hw, new_ctrl, update) != 0)\n \t\treturn -EIO;\n \n \t/* Enable packet type offload by extend ctrl word1. */\n-\tcap_extend = hw->super.cap_ext;\n+\tcap_extend = hw->cap_ext;\n \tif ((cap_extend & NFP_NET_CFG_CTRL_PKT_TYPE) != 0)\n \t\tctrl_extend = NFP_NET_CFG_CTRL_PKT_TYPE;\n \n@@ -149,10 +151,10 @@ nfp_net_start(struct rte_eth_dev *dev)\n \t\t\t\t| NFP_NET_CFG_CTRL_IPSEC_LM_LOOKUP;\n \n \tupdate = NFP_NET_CFG_UPDATE_GEN;\n-\tif (nfp_net_ext_reconfig(hw, ctrl_extend, update) != 0)\n+\tif (nfp_ext_reconfig(hw, ctrl_extend, update) != 0)\n \t\treturn -EIO;\n \n-\thw->super.ctrl_ext = ctrl_extend;\n+\thw->ctrl_ext = ctrl_extend;\n \n \t/*\n \t * Allocating rte mbufs for configured rx queues.\n@@ -165,11 +167,11 @@ nfp_net_start(struct rte_eth_dev *dev)\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n \t\t/* Configure the physical port up */\n-\t\tnfp_eth_set_configured(hw->cpp, hw->nfp_idx, 1);\n+\t\tnfp_eth_set_configured(net_hw->cpp, net_hw->nfp_idx, 1);\n \telse\n-\t\tnfp_eth_set_configured(dev->process_private, hw->nfp_idx, 1);\n+\t\tnfp_eth_set_configured(dev->process_private, net_hw->nfp_idx, 1);\n \n-\thw->super.ctrl = new_ctrl;\n+\thw->ctrl = new_ctrl;\n \n \tfor (i = 0; i < dev->data->nb_rx_queues; i++)\n \t\tdev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;\n@@ -587,7 +589,7 @@ nfp_net_init(struct rte_eth_dev *eth_dev)\n \tnfp_net_log_device_information(hw);\n \n \t/* Initializing spinlock for reconfigs */\n-\trte_spinlock_init(&hw->reconfig_lock);\n+\trte_spinlock_init(&hw->super.reconfig_lock);\n \n \t/* Allocating memory for mac addr */\n \teth_dev->data->mac_addrs = rte_zmalloc(\"mac_addr\", RTE_ETHER_ADDR_LEN, 0);\ndiff --git a/drivers/net/nfp/nfp_ethdev_vf.c b/drivers/net/nfp/nfp_ethdev_vf.c\nindex 7fb2a3d378..6ead7e02b8 100644\n--- a/drivers/net/nfp/nfp_ethdev_vf.c\n+++ b/drivers/net/nfp/nfp_ethdev_vf.c\n@@ -32,10 +32,11 @@ nfp_netvf_start(struct rte_eth_dev *dev)\n {\n \tint ret;\n \tuint16_t i;\n+\tstruct nfp_hw *hw;\n \tuint32_t new_ctrl;\n \tuint32_t update = 0;\n \tuint32_t intr_vector;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \tstruct rte_eth_conf *dev_conf;\n \tstruct rte_eth_rxmode *rxmode;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n@@ -77,8 +78,9 @@ nfp_netvf_start(struct rte_eth_dev *dev)\n \tnew_ctrl = nfp_check_offloads(dev);\n \n \t/* Writing configuration parameters in the device */\n-\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tnfp_net_params_setup(hw);\n+\tnet_hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\thw = &net_hw->super;\n+\tnfp_net_params_setup(net_hw);\n \n \tdev_conf = &dev->data->dev_conf;\n \trxmode = &dev_conf->rxmode;\n@@ -86,7 +88,7 @@ nfp_netvf_start(struct rte_eth_dev *dev)\n \tif ((rxmode->mq_mode & RTE_ETH_MQ_RX_RSS) != 0) {\n \t\tnfp_net_rss_config_default(dev);\n \t\tupdate |= NFP_NET_CFG_UPDATE_RSS;\n-\t\tnew_ctrl |= nfp_net_cfg_ctrl_rss(hw->super.cap);\n+\t\tnew_ctrl |= nfp_net_cfg_ctrl_rss(hw->cap);\n \t}\n \n \t/* Enable device */\n@@ -94,11 +96,11 @@ nfp_netvf_start(struct rte_eth_dev *dev)\n \n \tupdate |= NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING;\n \n-\tif ((hw->super.cap & NFP_NET_CFG_CTRL_RINGCFG) != 0)\n+\tif ((hw->cap & NFP_NET_CFG_CTRL_RINGCFG) != 0)\n \t\tnew_ctrl |= NFP_NET_CFG_CTRL_RINGCFG;\n \n-\tnn_cfg_writel(&hw->super, NFP_NET_CFG_CTRL, new_ctrl);\n-\tif (nfp_net_reconfig(hw, new_ctrl, update) != 0)\n+\tnn_cfg_writel(hw, NFP_NET_CFG_CTRL, new_ctrl);\n+\tif (nfp_reconfig(hw, new_ctrl, update) != 0)\n \t\treturn -EIO;\n \n \t/*\n@@ -110,7 +112,7 @@ nfp_netvf_start(struct rte_eth_dev *dev)\n \t\tgoto error;\n \t}\n \n-\thw->super.ctrl = new_ctrl;\n+\thw->ctrl = new_ctrl;\n \n \tfor (i = 0; i < dev->data->nb_rx_queues; i++)\n \t\tdev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;\n@@ -320,7 +322,7 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev)\n \tnfp_net_log_device_information(hw);\n \n \t/* Initializing spinlock for reconfigs */\n-\trte_spinlock_init(&hw->reconfig_lock);\n+\trte_spinlock_init(&hw->super.reconfig_lock);\n \n \t/* Allocating memory for mac addr */\n \teth_dev->data->mac_addrs = rte_zmalloc(\"mac_addr\", RTE_ETHER_ADDR_LEN, 0);\ndiff --git a/drivers/net/nfp/nfp_net_common.c b/drivers/net/nfp/nfp_net_common.c\nindex 2ab8d8fadd..9e6d2fa490 100644\n--- a/drivers/net/nfp/nfp_net_common.c\n+++ b/drivers/net/nfp/nfp_net_common.c\n@@ -199,7 +199,7 @@ nfp_net_notify_port_speed(struct nfp_net_hw *hw,\n #define FW_VER_LEN        32\n \n static int\n-__nfp_net_reconfig(struct nfp_net_hw *hw,\n+nfp_reconfig_real(struct nfp_hw *hw,\n \t\tuint32_t update)\n {\n \tuint32_t cnt;\n@@ -207,14 +207,14 @@ __nfp_net_reconfig(struct nfp_net_hw *hw,\n \tstruct timespec wait;\n \n \tPMD_DRV_LOG(DEBUG, \"Writing to the configuration queue (%p)...\",\n-\t\t\thw->super.qcp_cfg);\n+\t\t\thw->qcp_cfg);\n \n-\tif (hw->super.qcp_cfg == NULL) {\n+\tif (hw->qcp_cfg == NULL) {\n \t\tPMD_DRV_LOG(ERR, \"Bad configuration queue pointer\");\n \t\treturn -ENXIO;\n \t}\n \n-\tnfp_qcp_ptr_add(hw->super.qcp_cfg, NFP_QCP_WRITE_PTR, 1);\n+\tnfp_qcp_ptr_add(hw->qcp_cfg, NFP_QCP_WRITE_PTR, 1);\n \n \twait.tv_sec = 0;\n \twait.tv_nsec = 1000000; /* 1ms */\n@@ -223,7 +223,7 @@ __nfp_net_reconfig(struct nfp_net_hw *hw,\n \n \t/* Poll update field, waiting for NFP to ack the config */\n \tfor (cnt = 0; ; cnt++) {\n-\t\tnew = nn_cfg_readl(&hw->super, NFP_NET_CFG_UPDATE);\n+\t\tnew = nn_cfg_readl(hw, NFP_NET_CFG_UPDATE);\n \t\tif (new == 0)\n \t\t\tbreak;\n \n@@ -263,7 +263,7 @@ __nfp_net_reconfig(struct nfp_net_hw *hw,\n  *   - (-EIO) if I/O err and fail to reconfigure the device.\n  */\n int\n-nfp_net_reconfig(struct nfp_net_hw *hw,\n+nfp_reconfig(struct nfp_hw *hw,\n \t\tuint32_t ctrl,\n \t\tuint32_t update)\n {\n@@ -271,17 +271,17 @@ nfp_net_reconfig(struct nfp_net_hw *hw,\n \n \trte_spinlock_lock(&hw->reconfig_lock);\n \n-\tnn_cfg_writel(&hw->super, NFP_NET_CFG_CTRL, ctrl);\n-\tnn_cfg_writel(&hw->super, NFP_NET_CFG_UPDATE, update);\n+\tnn_cfg_writel(hw, NFP_NET_CFG_CTRL, ctrl);\n+\tnn_cfg_writel(hw, NFP_NET_CFG_UPDATE, update);\n \n \trte_wmb();\n \n-\tret = __nfp_net_reconfig(hw, update);\n+\tret = nfp_reconfig_real(hw, update);\n \n \trte_spinlock_unlock(&hw->reconfig_lock);\n \n \tif (ret != 0) {\n-\t\tPMD_DRV_LOG(ERR, \"Error nfp net reconfig: ctrl=%#08x update=%#08x\",\n+\t\tPMD_DRV_LOG(ERR, \"Error nfp reconfig: ctrl=%#08x update=%#08x\",\n \t\t\t\tctrl, update);\n \t\treturn -EIO;\n \t}\n@@ -307,7 +307,7 @@ nfp_net_reconfig(struct nfp_net_hw *hw,\n  *   - (-EIO) if I/O err and fail to reconfigure the device.\n  */\n int\n-nfp_net_ext_reconfig(struct nfp_net_hw *hw,\n+nfp_ext_reconfig(struct nfp_hw *hw,\n \t\tuint32_t ctrl_ext,\n \t\tuint32_t update)\n {\n@@ -315,17 +315,17 @@ nfp_net_ext_reconfig(struct nfp_net_hw *hw,\n \n \trte_spinlock_lock(&hw->reconfig_lock);\n \n-\tnn_cfg_writel(&hw->super, NFP_NET_CFG_CTRL_WORD1, ctrl_ext);\n-\tnn_cfg_writel(&hw->super, NFP_NET_CFG_UPDATE, update);\n+\tnn_cfg_writel(hw, NFP_NET_CFG_CTRL_WORD1, ctrl_ext);\n+\tnn_cfg_writel(hw, NFP_NET_CFG_UPDATE, update);\n \n \trte_wmb();\n \n-\tret = __nfp_net_reconfig(hw, update);\n+\tret = nfp_reconfig_real(hw, update);\n \n \trte_spinlock_unlock(&hw->reconfig_lock);\n \n \tif (ret != 0) {\n-\t\tPMD_DRV_LOG(ERR, \"Error nft net ext reconfig: ctrl_ext=%#08x update=%#08x\",\n+\t\tPMD_DRV_LOG(ERR, \"Error nfp ext reconfig: ctrl_ext=%#08x update=%#08x\",\n \t\t\t\tctrl_ext, update);\n \t\treturn -EIO;\n \t}\n@@ -354,16 +354,16 @@ nfp_net_mbox_reconfig(struct nfp_net_hw *hw,\n \n \tmbox = hw->tlv_caps.mbox_off;\n \n-\trte_spinlock_lock(&hw->reconfig_lock);\n+\trte_spinlock_lock(&hw->super.reconfig_lock);\n \n \tnn_cfg_writeq(&hw->super, mbox + NFP_NET_CFG_MBOX_SIMPLE_CMD, mbox_cmd);\n \tnn_cfg_writel(&hw->super, NFP_NET_CFG_UPDATE, NFP_NET_CFG_UPDATE_MBOX);\n \n \trte_wmb();\n \n-\tret = __nfp_net_reconfig(hw, NFP_NET_CFG_UPDATE_MBOX);\n+\tret = nfp_reconfig_real(&hw->super, NFP_NET_CFG_UPDATE_MBOX);\n \n-\trte_spinlock_unlock(&hw->reconfig_lock);\n+\trte_spinlock_unlock(&hw->super.reconfig_lock);\n \n \tif (ret != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Error nft net mailbox reconfig: mbox=%#08x update=%#08x\",\n@@ -494,26 +494,28 @@ nfp_net_disable_queues(struct rte_eth_dev *dev)\n {\n \tuint32_t update;\n \tuint32_t new_ctrl;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \n-\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tnet_hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\thw = &net_hw->super;\n \n-\tnn_cfg_writeq(&hw->super, NFP_NET_CFG_TXRS_ENABLE, 0);\n-\tnn_cfg_writeq(&hw->super, NFP_NET_CFG_RXRS_ENABLE, 0);\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_TXRS_ENABLE, 0);\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_RXRS_ENABLE, 0);\n \n-\tnew_ctrl = hw->super.ctrl & ~NFP_NET_CFG_CTRL_ENABLE;\n+\tnew_ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_ENABLE;\n \tupdate = NFP_NET_CFG_UPDATE_GEN |\n \t\t\tNFP_NET_CFG_UPDATE_RING |\n \t\t\tNFP_NET_CFG_UPDATE_MSIX;\n \n-\tif ((hw->super.cap & NFP_NET_CFG_CTRL_RINGCFG) != 0)\n+\tif ((hw->cap & NFP_NET_CFG_CTRL_RINGCFG) != 0)\n \t\tnew_ctrl &= ~NFP_NET_CFG_CTRL_RINGCFG;\n \n \t/* If an error when reconfig we avoid to change hw state */\n-\tif (nfp_net_reconfig(hw, new_ctrl, update) != 0)\n+\tif (nfp_reconfig(hw, new_ctrl, update) != 0)\n \t\treturn;\n \n-\thw->super.ctrl = new_ctrl;\n+\thw->ctrl = new_ctrl;\n }\n \n void\n@@ -551,26 +553,28 @@ nfp_net_set_mac_addr(struct rte_eth_dev *dev,\n {\n \tuint32_t ctrl;\n \tuint32_t update;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \n-\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tif ((hw->super.ctrl & NFP_NET_CFG_CTRL_ENABLE) != 0 &&\n-\t\t\t(hw->super.cap & NFP_NET_CFG_CTRL_LIVE_ADDR) == 0) {\n+\tnet_hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\thw = &net_hw->super;\n+\tif ((hw->ctrl & NFP_NET_CFG_CTRL_ENABLE) != 0 &&\n+\t\t\t(hw->cap & NFP_NET_CFG_CTRL_LIVE_ADDR) == 0) {\n \t\tPMD_DRV_LOG(ERR, \"MAC address unable to change when port enabled\");\n \t\treturn -EBUSY;\n \t}\n \n \t/* Writing new MAC to the specific port BAR address */\n-\tnfp_net_write_mac(hw, (uint8_t *)mac_addr);\n+\tnfp_net_write_mac(net_hw, (uint8_t *)mac_addr);\n \n \tupdate = NFP_NET_CFG_UPDATE_MACADDR;\n-\tctrl = hw->super.ctrl;\n-\tif ((hw->super.ctrl & NFP_NET_CFG_CTRL_ENABLE) != 0 &&\n-\t\t\t(hw->super.cap & NFP_NET_CFG_CTRL_LIVE_ADDR) != 0)\n+\tctrl = hw->ctrl;\n+\tif ((hw->ctrl & NFP_NET_CFG_CTRL_ENABLE) != 0 &&\n+\t\t\t(hw->cap & NFP_NET_CFG_CTRL_LIVE_ADDR) != 0)\n \t\tctrl |= NFP_NET_CFG_CTRL_LIVE_ADDR;\n \n \t/* Signal the NIC about the change */\n-\tif (nfp_net_reconfig(hw, ctrl, update) != 0) {\n+\tif (nfp_reconfig(hw, ctrl, update) != 0) {\n \t\tPMD_DRV_LOG(ERR, \"MAC address update failed\");\n \t\treturn -EIO;\n \t}\n@@ -689,36 +693,38 @@ int\n nfp_net_promisc_enable(struct rte_eth_dev *dev)\n {\n \tint ret;\n+\tuint32_t update;\n \tuint32_t new_ctrl;\n-\tuint32_t update = 0;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \tstruct nfp_flower_representor *repr;\n \n \tif ((dev->data->dev_flags & RTE_ETH_DEV_REPRESENTOR) != 0) {\n \t\trepr = dev->data->dev_private;\n-\t\thw = repr->app_fw_flower->pf_hw;\n+\t\tnet_hw = repr->app_fw_flower->pf_hw;\n \t} else {\n-\t\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\t\tnet_hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \t}\n \n-\tif ((hw->super.cap & NFP_NET_CFG_CTRL_PROMISC) == 0) {\n+\thw = &net_hw->super;\n+\tif ((hw->cap & NFP_NET_CFG_CTRL_PROMISC) == 0) {\n \t\tPMD_DRV_LOG(ERR, \"Promiscuous mode not supported\");\n \t\treturn -ENOTSUP;\n \t}\n \n-\tif ((hw->super.ctrl & NFP_NET_CFG_CTRL_PROMISC) != 0) {\n+\tif ((hw->ctrl & NFP_NET_CFG_CTRL_PROMISC) != 0) {\n \t\tPMD_DRV_LOG(INFO, \"Promiscuous mode already enabled\");\n \t\treturn 0;\n \t}\n \n-\tnew_ctrl = hw->super.ctrl | NFP_NET_CFG_CTRL_PROMISC;\n+\tnew_ctrl = hw->ctrl | NFP_NET_CFG_CTRL_PROMISC;\n \tupdate = NFP_NET_CFG_UPDATE_GEN;\n \n-\tret = nfp_net_reconfig(hw, new_ctrl, update);\n+\tret = nfp_reconfig(hw, new_ctrl, update);\n \tif (ret != 0)\n \t\treturn ret;\n \n-\thw->super.ctrl = new_ctrl;\n+\thw->ctrl = new_ctrl;\n \n \treturn 0;\n }\n@@ -727,25 +733,27 @@ int\n nfp_net_promisc_disable(struct rte_eth_dev *dev)\n {\n \tint ret;\n+\tuint32_t update;\n \tuint32_t new_ctrl;\n-\tuint32_t update = 0;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \n-\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tnet_hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\thw = &net_hw->super;\n \n-\tif ((hw->super.ctrl & NFP_NET_CFG_CTRL_PROMISC) == 0) {\n+\tif ((hw->ctrl & NFP_NET_CFG_CTRL_PROMISC) == 0) {\n \t\tPMD_DRV_LOG(INFO, \"Promiscuous mode already disabled\");\n \t\treturn 0;\n \t}\n \n-\tnew_ctrl = hw->super.ctrl & ~NFP_NET_CFG_CTRL_PROMISC;\n+\tnew_ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_PROMISC;\n \tupdate = NFP_NET_CFG_UPDATE_GEN;\n \n-\tret = nfp_net_reconfig(hw, new_ctrl, update);\n+\tret = nfp_reconfig(hw, new_ctrl, update);\n \tif (ret != 0)\n \t\treturn ret;\n \n-\thw->super.ctrl = new_ctrl;\n+\thw->ctrl = new_ctrl;\n \n \treturn 0;\n }\n@@ -1554,17 +1562,20 @@ nfp_net_vlan_offload_set(struct rte_eth_dev *dev,\n \tint ret;\n \tuint32_t update;\n \tuint32_t new_ctrl;\n+\tstruct nfp_hw *hw;\n \tuint64_t rx_offload;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \tuint32_t rxvlan_ctrl = 0;\n \n-\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tnet_hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\thw = &net_hw->super;\n+\n \trx_offload = dev->data->dev_conf.rxmode.offloads;\n-\tnew_ctrl = hw->super.ctrl;\n+\tnew_ctrl = hw->ctrl;\n \n \t/* VLAN stripping setting */\n \tif ((mask & RTE_ETH_VLAN_STRIP_MASK) != 0) {\n-\t\tnfp_net_enable_rxvlan_cap(hw, &rxvlan_ctrl);\n+\t\tnfp_net_enable_rxvlan_cap(net_hw, &rxvlan_ctrl);\n \t\tif ((rx_offload & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) != 0)\n \t\t\tnew_ctrl |= rxvlan_ctrl;\n \t\telse\n@@ -1579,16 +1590,16 @@ nfp_net_vlan_offload_set(struct rte_eth_dev *dev,\n \t\t\tnew_ctrl &= ~NFP_NET_CFG_CTRL_RXQINQ;\n \t}\n \n-\tif (new_ctrl == hw->super.ctrl)\n+\tif (new_ctrl == hw->ctrl)\n \t\treturn 0;\n \n \tupdate = NFP_NET_CFG_UPDATE_GEN;\n \n-\tret = nfp_net_reconfig(hw, new_ctrl, update);\n+\tret = nfp_reconfig(hw, new_ctrl, update);\n \tif (ret != 0)\n \t\treturn ret;\n \n-\thw->super.ctrl = new_ctrl;\n+\thw->ctrl = new_ctrl;\n \n \treturn 0;\n }\n@@ -1658,10 +1669,13 @@ nfp_net_reta_update(struct rte_eth_dev *dev,\n {\n \tint ret;\n \tuint32_t update;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \n-\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tif ((hw->super.ctrl & NFP_NET_CFG_CTRL_RSS_ANY) == 0)\n+\tnet_hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\thw = &net_hw->super;\n+\n+\tif ((hw->ctrl & NFP_NET_CFG_CTRL_RSS_ANY) == 0)\n \t\treturn -EINVAL;\n \n \tret = nfp_net_rss_reta_write(dev, reta_conf, reta_size);\n@@ -1670,7 +1684,7 @@ nfp_net_reta_update(struct rte_eth_dev *dev,\n \n \tupdate = NFP_NET_CFG_UPDATE_RSS;\n \n-\tif (nfp_net_reconfig(hw, hw->super.ctrl, update) != 0)\n+\tif (nfp_reconfig(hw, hw->ctrl, update) != 0)\n \t\treturn -EIO;\n \n \treturn 0;\n@@ -1789,14 +1803,16 @@ nfp_net_rss_hash_update(struct rte_eth_dev *dev,\n {\n \tuint32_t update;\n \tuint64_t rss_hf;\n-\tstruct nfp_net_hw *hw;\n+\tstruct nfp_hw *hw;\n+\tstruct nfp_net_hw *net_hw;\n \n-\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tnet_hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\thw = &net_hw->super;\n \n \trss_hf = rss_conf->rss_hf;\n \n \t/* Checking if RSS is enabled */\n-\tif ((hw->super.ctrl & NFP_NET_CFG_CTRL_RSS_ANY) == 0) {\n+\tif ((hw->ctrl & NFP_NET_CFG_CTRL_RSS_ANY) == 0) {\n \t\tif (rss_hf != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"RSS unsupported\");\n \t\t\treturn -EINVAL;\n@@ -1814,7 +1830,7 @@ nfp_net_rss_hash_update(struct rte_eth_dev *dev,\n \n \tupdate = NFP_NET_CFG_UPDATE_RSS;\n \n-\tif (nfp_net_reconfig(hw, hw->super.ctrl, update) != 0)\n+\tif (nfp_reconfig(hw, hw->ctrl, update) != 0)\n \t\treturn -EIO;\n \n \treturn 0;\n@@ -1969,31 +1985,32 @@ nfp_net_close_tx_queue(struct rte_eth_dev *dev)\n }\n \n int\n-nfp_net_set_vxlan_port(struct nfp_net_hw *hw,\n+nfp_net_set_vxlan_port(struct nfp_net_hw *net_hw,\n \t\tsize_t idx,\n \t\tuint16_t port)\n {\n \tint ret;\n \tuint32_t i;\n+\tstruct nfp_hw *hw = &net_hw->super;\n \n \tif (idx >= NFP_NET_N_VXLAN_PORTS) {\n \t\tPMD_DRV_LOG(ERR, \"The idx value is out of range.\");\n \t\treturn -ERANGE;\n \t}\n \n-\thw->vxlan_ports[idx] = port;\n+\tnet_hw->vxlan_ports[idx] = port;\n \n \tfor (i = 0; i < NFP_NET_N_VXLAN_PORTS; i += 2) {\n-\t\tnn_cfg_writel(&hw->super, NFP_NET_CFG_VXLAN_PORT + i * sizeof(port),\n-\t\t\t\t(hw->vxlan_ports[i + 1] << 16) | hw->vxlan_ports[i]);\n+\t\tnn_cfg_writel(hw, NFP_NET_CFG_VXLAN_PORT + i * sizeof(port),\n+\t\t\t\t(net_hw->vxlan_ports[i + 1] << 16) | net_hw->vxlan_ports[i]);\n \t}\n \n \trte_spinlock_lock(&hw->reconfig_lock);\n \n-\tnn_cfg_writel(&hw->super, NFP_NET_CFG_UPDATE, NFP_NET_CFG_UPDATE_VXLAN);\n+\tnn_cfg_writel(hw, NFP_NET_CFG_UPDATE, NFP_NET_CFG_UPDATE_VXLAN);\n \trte_wmb();\n \n-\tret = __nfp_net_reconfig(hw, NFP_NET_CFG_UPDATE_VXLAN);\n+\tret = nfp_reconfig_real(hw, NFP_NET_CFG_UPDATE_VXLAN);\n \n \trte_spinlock_unlock(&hw->reconfig_lock);\n \ndiff --git a/drivers/net/nfp/nfp_net_common.h b/drivers/net/nfp/nfp_net_common.h\nindex 3fe3e96107..d418cd2b99 100644\n--- a/drivers/net/nfp/nfp_net_common.h\n+++ b/drivers/net/nfp/nfp_net_common.h\n@@ -119,6 +119,7 @@ struct nfp_hw {\n \tuint32_t cap_ext;\n \tuint32_t ctrl;\n \tuint32_t ctrl_ext;\n+\trte_spinlock_t reconfig_lock;\n };\n \n struct nfp_net_hw {\n@@ -150,8 +151,6 @@ struct nfp_net_hw {\n \tuint16_t vxlan_ports[NFP_NET_N_VXLAN_PORTS];\n \tuint8_t vxlan_usecnt[NFP_NET_N_VXLAN_PORTS];\n \n-\trte_spinlock_t reconfig_lock;\n-\n \tuint32_t max_tx_queues;\n \tuint32_t max_rx_queues;\n \tuint16_t flbufsz;\n@@ -368,8 +367,8 @@ nfp_qcp_queue_offset(const struct nfp_dev_info *dev_info,\n }\n \n /* Prototypes for common NFP functions */\n-int nfp_net_reconfig(struct nfp_net_hw *hw, uint32_t ctrl, uint32_t update);\n-int nfp_net_ext_reconfig(struct nfp_net_hw *hw, uint32_t ctrl_ext, uint32_t update);\n+int nfp_reconfig(struct nfp_hw *hw, uint32_t ctrl, uint32_t update);\n+int nfp_ext_reconfig(struct nfp_hw *hw, uint32_t ctrl_ext, uint32_t update);\n int nfp_net_mbox_reconfig(struct nfp_net_hw *hw, uint32_t mbox_cmd);\n int nfp_net_configure(struct rte_eth_dev *dev);\n int nfp_net_common_init(struct rte_pci_device *pci_dev, struct nfp_net_hw *hw);\n",
    "prefixes": [
        "v4",
        "10/24"
    ]
}