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GET /api/patches/132684/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 132684,
    "url": "http://patches.dpdk.org/api/patches/132684/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231017004401.698745-3-suanmingm@nvidia.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20231017004401.698745-3-suanmingm@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20231017004401.698745-3-suanmingm@nvidia.com",
    "date": "2023-10-17T00:44:00",
    "name": "[2/3] net/mlx5: add port representor destination to mirror",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "8a15c3c3e0d6173da575624456ac1881eb47503a",
    "submitter": {
        "id": 1887,
        "url": "http://patches.dpdk.org/api/people/1887/?format=api",
        "name": "Suanming Mou",
        "email": "suanmingm@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231017004401.698745-3-suanmingm@nvidia.com/mbox/",
    "series": [
        {
            "id": 29859,
            "url": "http://patches.dpdk.org/api/series/29859/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29859",
            "date": "2023-10-17T00:43:58",
            "name": "net/mlx5: add port representor destination to mirror",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/29859/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/132684/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/132684/checks/",
    "tags": {},
    "related": [],
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        "From": "Suanming Mou <suanmingm@nvidia.com>",
        "To": "<orika@nvidia.com>, Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>",
        "CC": "<rasland@nvidia.com>, <dev@dpdk.org>",
        "Subject": "[PATCH 2/3] net/mlx5: add port representor destination to mirror",
        "Date": "Tue, 17 Oct 2023 08:44:00 +0800",
        "Message-ID": "<20231017004401.698745-3-suanmingm@nvidia.com>",
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    },
    "content": "In order to clone the traffic from FDB to NIC TIR, user can set\nport representor action as mirror clone destination. In that case\ncloned traffic will be moved to E-Switch manager root table, and\ngoes to software TIR.\n\nThis commit adds the port representor support to mirror action.\n\nSigned-off-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_hw.c | 19 ++++++++++++++++++-\n 1 file changed, 18 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 9feb40ddb3..46af492ac5 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -9735,6 +9735,7 @@ mlx5_mirror_destroy_clone(struct rte_eth_dev *dev,\n \t\tflow_hw_jump_release(dev, clone->action_ctx);\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:\n+\tcase RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:\n \tcase RTE_FLOW_ACTION_TYPE_RAW_ENCAP:\n \tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \tcase RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:\n@@ -9779,6 +9780,7 @@ mlx5_mirror_terminal_action(const struct rte_flow_action *action)\n \tcase RTE_FLOW_ACTION_TYPE_RSS:\n \tcase RTE_FLOW_ACTION_TYPE_QUEUE:\n \tcase RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:\n+\tcase RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:\n \t\treturn true;\n \tdefault:\n \t\tbreak;\n@@ -9792,19 +9794,30 @@ mlx5_mirror_validate_sample_action(struct rte_eth_dev *dev,\n \t\t\t\t   const struct rte_flow_action *action)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tconst struct rte_flow_action_ethdev *port = NULL;\n+\tbool is_proxy = MLX5_HW_PORT_IS_PROXY(priv);\n \n+\tif (!action)\n+\t\treturn false;\n \tswitch(action->type) {\n \tcase RTE_FLOW_ACTION_TYPE_QUEUE:\n \tcase RTE_FLOW_ACTION_TYPE_RSS:\n \t\tif (flow_attr->transfer)\n \t\t\treturn false;\n \t\tbreak;\n+\tcase RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:\n+\t\tif (!is_proxy || !flow_attr->transfer)\n+\t\t\treturn false;\n+\t\tport = action->conf;\n+\t\tif (!port || port->port_id != MLX5_REPRESENTED_PORT_ESW_MGR)\n+\t\t\treturn false;\n+\t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:\n \tcase RTE_FLOW_ACTION_TYPE_RAW_ENCAP:\n \tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \tcase RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:\n \tcase RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:\n-\t\tif (!priv->sh->esw_mode && !flow_attr->transfer)\n+\t\tif (!is_proxy || !flow_attr->transfer)\n \t\t\treturn false;\n \t\tif (action[0].type == RTE_FLOW_ACTION_TYPE_RAW_DECAP &&\n \t\t    action[1].type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)\n@@ -9962,6 +9975,7 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,\n                        struct mlx5dr_action_dest_attr *dest_attr,\n \t\t       uint8_t *reformat_buf, struct rte_flow_error *error)\n {\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n \tint ret;\n \tuint32_t i;\n \tbool decap_seen = false;\n@@ -9988,6 +10002,9 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,\n \t\t\tif (ret)\n \t\t\t\treturn ret;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:\n+\t\t\tdest_attr->dest = priv->hw_def_miss;\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \t\t\tdecap_seen = true;\n \t\t\tbreak;\n",
    "prefixes": [
        "2/3"
    ]
}