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GET /api/patches/132643/?format=api
{ "id": 132643, "url": "http://patches.dpdk.org/api/patches/132643/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231016184235.200427-7-getelson@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231016184235.200427-7-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231016184235.200427-7-getelson@nvidia.com", "date": "2023-10-16T18:42:26", "name": "[v2,07/16] net/mlx5: reformat HWS code", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "917d50f3486d771df48509ccf12ccd67cef95f71", "submitter": { "id": 1882, "url": "http://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231016184235.200427-7-getelson@nvidia.com/mbox/", "series": [ { "id": 29662, "url": "http://patches.dpdk.org/api/series/29662/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29662", "date": "2023-09-27T19:10:46", "name": "net/mlx5: support indirect list actions", "version": 1, "mbox": "http://patches.dpdk.org/series/29662/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/132643/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/132643/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2FCB943181;\n\tMon, 16 Oct 2023 20:43:56 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 50E4B40E54;\n\tMon, 16 Oct 2023 20:43:31 +0200 (CEST)", "from NAM11-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam11on2041.outbound.protection.outlook.com [40.107.236.41])\n by mails.dpdk.org (Postfix) with ESMTP id DD02540E78\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<getelson@nvidia.com>, =?utf-8?b?wqA=?= <mkashani@nvidia.com>,\n\t=?utf-8?q?=C2=A0_=2E_=2E_/patches/upstream-pmd-indirect-actions-list/v2/v2-?=\n\t=?utf-8?q?0000-cover-letter_=2E_patch?= <rasland@nvidia.com>,\n Matan Azrad <matan@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>,\n Suanming Mou <suanmingm@nvidia.com>", "Subject": "[PATCH v2 07/16] net/mlx5: reformat HWS code", "Date": "Mon, 16 Oct 2023 21:42:26 +0300", "Message-ID": "<20231016184235.200427-7-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20231016184235.200427-1-getelson@nvidia.com>", "References": "<20230927191046.405282-1-getelson@nvidia.com>\n <20231016184235.200427-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "MWH0EPF000989EA:EE_|MN6PR12MB8592:EE_", "X-MS-Office365-Filtering-Correlation-Id": "e52c7065-9902-4bbb-b90c-08dbce77c8f7", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n igmVh2o/6AS/ISlp7g06/ma6wazpjhVEhe2Tx1ycB8dyTR8tgprWlhhwxn+8R+hxAnA1rkiq2m1CWw674TlxiXVqsbpR76Pkyn2pQE22j9g1v5F63KICHPch3h+Wfx2y+1uQMzr53COrJP/WY9WizN1gvz788fR6AwbHrro+R9sWHzX8DMi7mkWAbsQw4ykU+PsAiV5J2W9vLGxri9de5VUUI1JVBIxFnypMhort3Qjm8TouqeUaGUU1PbH0IUHx9MjZp79I6uvUcCTO9nCv9N+TkzZjLTk7yrHbq33LqhD59776DoVV0foOfqkq1SSi5GVw0My+8jxbjB3pOd5Np51Dxn819JRhdmIe52h0bJ7qwLug1AdAOmWkx7AEztOsS8RsdgfdwqRS1B1W+KEhF6U9ewRg1xOgHxQCvLXP37gBqS+mD9pKI6IR3vTo3wF1syaK0TXM/rvNfnLzPeEnJy2CHMGkGuS8CbSRKC3vVUQ3Mo21R27tEJHoWJapYUW5mMcMemfIRqv0Zcb6PqwU/ZadHq8MJl2G1tHp60xKFrsuFFgkunBFvItzqOQQVRMg7chfKW9EXz5rG+Q7MRcbVmjtcp9LAVHEA/sxABl5kOY7WI9wCYLvMEH2E7qHRqcEpomucdu+GhpzsVCSF4teNugE8LovWKNcFBhNZZm1SqeyONhYXYsPB9UErmdhgocAXGMSVfLGAEvA1ERR+h62Mdd+GxPS7K85MEcxOOiOrXM=", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(396003)(346002)(39860400002)(376002)(136003)(230922051799003)(451199024)(82310400011)(64100799003)(1800799009)(186009)(46966006)(36840700001)(40470700004)(40480700001)(40460700003)(55016003)(36860700001)(82740400003)(7636003)(356005)(47076005)(83380400001)(6666004)(16526019)(26005)(7696005)(6286002)(36756003)(316002)(70586007)(70206006)(54906003)(478600001)(6916009)(1076003)(107886003)(426003)(336012)(2616005)(86362001)(41300700001)(2906002)(5660300002)(8936002)(8676002)(4326008);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "16 Oct 2023 18:43:26.9446 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n e52c7065-9902-4bbb-b90c-08dbce77c8f7", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n MWH0EPF000989EA.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN6PR12MB8592", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Replace if() with switch().\n\nSigned-off-by: Gregory Etelson <getelson@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_hw.c | 70 ++++++++++++++++++---------------\n 1 file changed, 39 insertions(+), 31 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 6fcf654e4a..b2215fb5cf 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -4548,6 +4548,17 @@ static enum mlx5dr_action_type mlx5_hw_dr_action_types[] = {\n \t[RTE_FLOW_ACTION_TYPE_SEND_TO_KERNEL] = MLX5DR_ACTION_TYP_DEST_ROOT,\n };\n \n+static inline void\n+action_template_set_type(struct rte_flow_actions_template *at,\n+\t\t\t enum mlx5dr_action_type *action_types,\n+\t\t\t unsigned int action_src, uint16_t *curr_off,\n+\t\t\t enum mlx5dr_action_type type)\n+{\n+\tat->actions_off[action_src] = *curr_off;\n+\taction_types[*curr_off] = type;\n+\t*curr_off = *curr_off + 1;\n+}\n+\n static int\n flow_hw_dr_actions_template_handle_shared(const struct rte_flow_action *mask,\n \t\t\t\t\t unsigned int action_src,\n@@ -4565,9 +4576,8 @@ flow_hw_dr_actions_template_handle_shared(const struct rte_flow_action *mask,\n \ttype = mask->type;\n \tswitch (type) {\n \tcase RTE_FLOW_ACTION_TYPE_RSS:\n-\t\tat->actions_off[action_src] = *curr_off;\n-\t\taction_types[*curr_off] = MLX5DR_ACTION_TYP_TIR;\n-\t\t*curr_off = *curr_off + 1;\n+\t\taction_template_set_type(at, action_types, action_src, curr_off,\n+\t\t\t\t\t MLX5DR_ACTION_TYP_TIR);\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_AGE:\n \tcase RTE_FLOW_ACTION_TYPE_COUNT:\n@@ -4575,23 +4585,20 @@ flow_hw_dr_actions_template_handle_shared(const struct rte_flow_action *mask,\n \t\t * Both AGE and COUNT action need counter, the first one fills\n \t\t * the action_types array, and the second only saves the offset.\n \t\t */\n-\t\tif (*cnt_off == UINT16_MAX) {\n-\t\t\t*cnt_off = *curr_off;\n-\t\t\taction_types[*cnt_off] = MLX5DR_ACTION_TYP_CTR;\n-\t\t\t*curr_off = *curr_off + 1;\n-\t\t}\n+\t\tif (*cnt_off == UINT16_MAX)\n+\t\t\taction_template_set_type(at, action_types,\n+\t\t\t\t\t\t action_src, curr_off,\n+\t\t\t\t\t\t MLX5DR_ACTION_TYP_CTR);\n \t\tat->actions_off[action_src] = *cnt_off;\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_CONNTRACK:\n-\t\tat->actions_off[action_src] = *curr_off;\n-\t\taction_types[*curr_off] = MLX5DR_ACTION_TYP_ASO_CT;\n-\t\t*curr_off = *curr_off + 1;\n+\t\taction_template_set_type(at, action_types, action_src, curr_off,\n+\t\t\t\t\t MLX5DR_ACTION_TYP_ASO_CT);\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_QUOTA:\n \tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n-\t\tat->actions_off[action_src] = *curr_off;\n-\t\taction_types[*curr_off] = MLX5DR_ACTION_TYP_ASO_METER;\n-\t\t*curr_off = *curr_off + 1;\n+\t\taction_template_set_type(at, action_types, action_src, curr_off,\n+\t\t\t\t\t MLX5DR_ACTION_TYP_ASO_METER);\n \t\tbreak;\n \tdefault:\n \t\tDRV_LOG(WARNING, \"Unsupported shared action type: %d\", type);\n@@ -5101,31 +5108,32 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev,\n \tat->reformat_off = UINT16_MAX;\n \tat->mhdr_off = UINT16_MAX;\n \tat->rx_cpy_pos = pos;\n-\t/*\n-\t * mlx5 PMD hacks indirect action index directly to the action conf.\n-\t * The rte_flow_conv() function copies the content from conf pointer.\n-\t * Need to restore the indirect action index from action conf here.\n-\t */\n \tfor (i = 0; actions->type != RTE_FLOW_ACTION_TYPE_END;\n \t actions++, masks++, i++) {\n-\t\tif (actions->type == RTE_FLOW_ACTION_TYPE_INDIRECT) {\n+\t\tconst struct rte_flow_action_modify_field *info;\n+\n+\t\tswitch (actions->type) {\n+\t\t/*\n+\t\t * mlx5 PMD hacks indirect action index directly to the action conf.\n+\t\t * The rte_flow_conv() function copies the content from conf pointer.\n+\t\t * Need to restore the indirect action index from action conf here.\n+\t\t */\n+\t\tcase RTE_FLOW_ACTION_TYPE_INDIRECT:\n \t\t\tat->actions[i].conf = actions->conf;\n \t\t\tat->masks[i].conf = masks->conf;\n-\t\t}\n-\t\tif (actions->type == RTE_FLOW_ACTION_TYPE_MODIFY_FIELD) {\n-\t\t\tconst struct rte_flow_action_modify_field *info = actions->conf;\n-\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:\n+\t\t\tinfo = actions->conf;\n \t\t\tif ((info->dst.field == RTE_FLOW_FIELD_FLEX_ITEM &&\n \t\t\t flow_hw_flex_item_acquire(dev, info->dst.flex_handle,\n \t\t\t\t\t\t &at->flex_item)) ||\n-\t\t\t (info->src.field == RTE_FLOW_FIELD_FLEX_ITEM &&\n-\t\t\t flow_hw_flex_item_acquire(dev, info->src.flex_handle,\n-\t\t\t\t\t\t\t&at->flex_item))) {\n-\t\t\t\trte_flow_error_set(error, rte_errno,\n-\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n-\t\t\t\t\t\t \"Failed to acquire flex item\");\n+\t\t\t (info->src.field == RTE_FLOW_FIELD_FLEX_ITEM &&\n+\t\t\t flow_hw_flex_item_acquire(dev, info->src.flex_handle,\n+\t\t\t\t\t\t &at->flex_item)))\n \t\t\t\tgoto error;\n-\t\t\t}\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tbreak;\n \t\t}\n \t}\n \tat->tmpl = flow_hw_dr_actions_template_create(at);\n", "prefixes": [ "v2", "07/16" ] }