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GET /api/patches/131562/?format=api
{ "id": 131562, "url": "http://patches.dpdk.org/api/patches/131562/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230918114035.751407-1-rbhansali@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230918114035.751407-1-rbhansali@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230918114035.751407-1-rbhansali@marvell.com", "date": "2023-09-18T11:40:34", "name": "[1/2] common/cnxk: reserve last LMT line for control ops", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a32589f71d8b2549fcf2ef59703e1737fc28d710", "submitter": { "id": 2436, "url": "http://patches.dpdk.org/api/people/2436/?format=api", "name": "Rahul Bhansali", "email": "rbhansali@marvell.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230918114035.751407-1-rbhansali@marvell.com/mbox/", "series": [ { "id": 29533, "url": "http://patches.dpdk.org/api/series/29533/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29533", "date": "2023-09-18T11:40:34", "name": "[1/2] common/cnxk: reserve last LMT line for control ops", "version": 1, "mbox": "http://patches.dpdk.org/series/29533/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/131562/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/131562/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C17B0425D0;\n\tMon, 18 Sep 2023 13:40:48 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 35A1840263;\n\tMon, 18 Sep 2023 13:40:48 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 45CED4021F\n for <dev@dpdk.org>; Mon, 18 Sep 2023 13:40:46 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 38I0L2cX005255 for <dev@dpdk.org>; Mon, 18 Sep 2023 04:40:45 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3t59qpv5jb-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Mon, 18 Sep 2023 04:40:45 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Mon, 18 Sep 2023 04:40:43 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Mon, 18 Sep 2023 04:40:43 -0700", "from localhost.localdomain (unknown [10.28.36.158])\n by maili.marvell.com (Postfix) with ESMTP id 2DDED5B6921;\n Mon, 18 Sep 2023 04:40:40 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=WaF+vR4ZcD/QI5pe0AXb6YdskjrGae88EBDs3csd0w0=;\n b=FE+jmn+L8vbb1JJ8UZCWX9okkm8yV6Q0ThSHwXD1Uf0PsZYEOJFYOwI547qDLetREuW/\n QU70NToRhDJpFC0hzEtHehz09ewYLYXh0QcU4j1BCS/h+xaRG3L9yh6sTErAa9XBmNhM\n r/8F6LGZquz/prJtEK7x60XlFIIDwnF2KDjPlplyazuknV8VcqClcxfaiBF2mPyTjYHI\n gLzGNgzkxyVD2W1i6UY3TiGZ6p/AulKJaJ26iQUqHs+47DACB0FWLpS+G92uxEErVqdg\n 1UBzq9Weliruk/CNahWgJrl8RTrfj2EL1S4L9qfY15DZzaqDacjMY18siUjDKyWnQQYN Ww==", "From": "Rahul Bhansali <rbhansali@marvell.com>", "To": "<dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>", "Subject": "[PATCH 1/2] common/cnxk: reserve last LMT line for control ops", "Date": "Mon, 18 Sep 2023 17:10:34 +0530", "Message-ID": "<20230918114035.751407-1-rbhansali@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "Ov3Xy-OTINgKg0OExJEu8bkEY6d6uhlW", "X-Proofpoint-GUID": "Ov3Xy-OTINgKg0OExJEu8bkEY6d6uhlW", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.601,FMLib:17.11.176.26\n definitions=2023-09-18_04,2023-09-18_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "As rte_eth_dev_configure() can be called from any EAL or non-EAL cores.\nAnd in case of non-EAL core, LMT address will not be a valid. So,\nreserving last LMT line 2047 for control path specific functionality.\n\nSigned-off-by: Rahul Bhansali <rbhansali@marvell.com>\n---\n drivers/common/cnxk/roc_dev.c | 5 +++++\n drivers/common/cnxk/roc_nix_inl.c | 6 ++++--\n drivers/common/cnxk/roc_platform.c | 25 +++++++++++++++++++++++++\n drivers/common/cnxk/roc_platform.h | 5 +++++\n drivers/common/cnxk/version.map | 2 ++\n 5 files changed, 41 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c\nindex 18d7981825..3815da078a 100644\n--- a/drivers/common/cnxk/roc_dev.c\n+++ b/drivers/common/cnxk/roc_dev.c\n@@ -1369,6 +1369,11 @@ dev_init(struct dev *dev, struct plt_pci_device *pci_dev)\n \tif (!dev_cache_line_size_valid())\n \t\treturn -EFAULT;\n \n+\tif (!roc_plt_lmt_validate()) {\n+\t\tplt_err(\"Failed to validate LMT line\");\n+\t\treturn -EFAULT;\n+\t}\n+\n \tbar2 = (uintptr_t)pci_dev->mem_resource[2].addr;\n \tbar4 = (uintptr_t)pci_dev->mem_resource[4].addr;\n \tif (bar2 == 0 || bar4 == 0) {\ndiff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c\nindex 5cb1f11f53..750fd08355 100644\n--- a/drivers/common/cnxk/roc_nix_inl.c\n+++ b/drivers/common/cnxk/roc_nix_inl.c\n@@ -779,8 +779,10 @@ nix_inl_eng_caps_get(struct nix *nix)\n \n \t\thw_res->cn10k.compcode = CPT_COMP_NOT_DONE;\n \n-\t\t/* Use this lcore's LMT line as no one else is using it */\n-\t\tROC_LMT_BASE_ID_GET(lmt_base, lmt_id);\n+\t\t/* Use this reserved LMT line as no one else is using it */\n+\t\tlmt_id = roc_plt_control_lmt_id_get();\n+\t\tlmt_base += ((uint64_t)lmt_id << ROC_LMT_LINE_SIZE_LOG2);\n+\n \t\tmemcpy((void *)lmt_base, &inst, sizeof(inst));\n \n \t\tlmt_arg = ROC_CN10K_CPT_LMT_ARG | (uint64_t)lmt_id;\ndiff --git a/drivers/common/cnxk/roc_platform.c b/drivers/common/cnxk/roc_platform.c\nindex f91b95ceab..ffc82720b0 100644\n--- a/drivers/common/cnxk/roc_platform.c\n+++ b/drivers/common/cnxk/roc_platform.c\n@@ -21,6 +21,31 @@ roc_plt_init_cb_register(roc_plt_init_cb_t cb)\n \treturn 0;\n }\n \n+uint16_t\n+roc_plt_control_lmt_id_get(void)\n+{\n+\tuint32_t lcore_id = plt_lcore_id();\n+\tif (lcore_id != LCORE_ID_ANY)\n+\t\treturn lcore_id << ROC_LMT_LINES_PER_CORE_LOG2;\n+\telse\n+\t\t/* Return Last LMT ID to be use in control path functionality */\n+\t\treturn ROC_NUM_LMT_LINES - 1;\n+}\n+\n+uint16_t\n+roc_plt_lmt_validate(void)\n+{\n+\tif (!roc_model_is_cn9k()) {\n+\t\t/* Last LMT line is reserved for control specific operation and can be\n+\t\t * use from any EAL or non EAL cores.\n+\t\t */\n+\t\tif ((RTE_MAX_LCORE << ROC_LMT_LINES_PER_CORE_LOG2) >\n+\t\t (ROC_NUM_LMT_LINES - 1))\n+\t\t\treturn 0;\n+\t}\n+\treturn 1;\n+}\n+\n int\n roc_plt_init(void)\n {\ndiff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h\nindex e7a6564163..7605eed33d 100644\n--- a/drivers/common/cnxk/roc_platform.h\n+++ b/drivers/common/cnxk/roc_platform.h\n@@ -314,6 +314,11 @@ extern int cnxk_logtype_ree;\n __rte_internal\n int roc_plt_init(void);\n \n+__rte_internal\n+uint16_t roc_plt_control_lmt_id_get(void);\n+__rte_internal\n+uint16_t roc_plt_lmt_validate(void);\n+\n /* Init callbacks */\n typedef int (*roc_plt_init_cb_t)(void);\n int __roc_api roc_plt_init_cb_register(roc_plt_init_cb_t cb);\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 43c3d9ed77..04f8fabfcb 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -463,6 +463,8 @@ INTERNAL {\n \troc_ot_ipsec_outb_sa_init;\n \troc_plt_init;\n \troc_plt_init_cb_register;\n+\troc_plt_lmt_validate;\n+\troc_plt_control_lmt_id_get;\n \troc_sso_dev_fini;\n \troc_sso_dev_init;\n \troc_sso_dump;\n", "prefixes": [ "1/2" ] }