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GET /api/patches/130767/?format=api
{ "id": 130767, "url": "http://patches.dpdk.org/api/patches/130767/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230825103635.3614778-2-adwivedi@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230825103635.3614778-2-adwivedi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230825103635.3614778-2-adwivedi@marvell.com", "date": "2023-08-25T10:36:35", "name": "[v2,1/1] net/cnxk: support MACsec PN threshold events on multiple ports", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "a6f7cb0d66d55a944571634436222ea4dd769695", "submitter": { "id": 1561, "url": "http://patches.dpdk.org/api/people/1561/?format=api", "name": "Ankur Dwivedi", "email": "adwivedi@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230825103635.3614778-2-adwivedi@marvell.com/mbox/", "series": [ { "id": 29343, "url": "http://patches.dpdk.org/api/series/29343/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29343", "date": "2023-08-25T10:36:34", "name": "support for MACsec PN threshold events on multiple ports", "version": 2, "mbox": "http://patches.dpdk.org/series/29343/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/130767/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/130767/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D618A430FF;\n\tFri, 25 Aug 2023 12:37:01 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C84DF40EE4;\n\tFri, 25 Aug 2023 12:37:01 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 61F09400D5\n for <dev@dpdk.org>; Fri, 25 Aug 2023 12:37:00 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 37P3ctLH001995 for <dev@dpdk.org>; Fri, 25 Aug 2023 03:36:59 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3spmk291nf-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 25 Aug 2023 03:36:59 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Fri, 25 Aug 2023 03:36:57 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Fri, 25 Aug 2023 03:36:57 -0700", "from localhost.localdomain (unknown [10.28.36.185])\n by maili.marvell.com (Postfix) with ESMTP id 8C5C83F7093;\n Fri, 25 Aug 2023 03:36:55 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=vcu8vXor15KqZgkdLpn2EiYJdhwDFoHEHX76myjVbCM=;\n b=QGyCaqkXQcIs0HzC+GzgMRsfOAcdYv5YG4TTZM5OgZs1WEMiVt6lX1FVTWIKFH8IfyqZ\n hLndwR51OYYHIxcvb0fYLOrSZ6t3iNIUUEoXN10X7ASOpbawrvHPzPfBPGtm86aoQiU8\n inIjBee5F5FIB4MxIssE+PMPL1miGdnqs/urLwS6+k9XkEFjKvW9qcRGCgnTdfTIymrc\n OvHr2bgEKLMo+aPLplaxthpnJiEPIvoReGfR9JkJQVtERBN5afXEAF0mUCJmve/m6DwT\n cr4LFj7DbGEEue0DkbfN8yXZzhosxB0m6gkhZiGQj8hfMQ5iL5o8nNzDV/fc0yPYkpjl dA==", "From": "Ankur Dwivedi <adwivedi@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<gakhil@marvell.com>, <vattunuru@marvell.com>, <jerinj@marvell.com>,\n \"Ankur Dwivedi\" <adwivedi@marvell.com>", "Subject": "[PATCH v2 1/1] net/cnxk: support MACsec PN threshold events on\n multiple ports", "Date": "Fri, 25 Aug 2023 16:06:35 +0530", "Message-ID": "<20230825103635.3614778-2-adwivedi@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230825103635.3614778-1-adwivedi@marvell.com>", "References": "<20230823055000.2692083-1-adwivedi@marvell.com>\n <20230825103635.3614778-1-adwivedi@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "wmzKB2tUFwaZXmmQyN81V1vAC8uEwi0F", "X-Proofpoint-GUID": "wmzKB2tUFwaZXmmQyN81V1vAC8uEwi0F", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26\n definitions=2023-08-25_08,2023-08-25_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Adds sa to port mapping in roc mcs. The sa to port map is updated when the\nsa is created. A portid field is also added to macsec event callback\nfunction. The above changes helps to propagate the tx and rx pn threshold\nevents to the correct ethernet device.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\n---\n drivers/common/cnxk/roc_mcs.c | 22 +++++++++++++++++++---\n drivers/common/cnxk/roc_mcs.h | 8 ++++++--\n drivers/common/cnxk/roc_mcs_sec_cfg.c | 6 ++++++\n drivers/common/cnxk/version.map | 1 +\n drivers/net/cnxk/cnxk_ethdev_mcs.c | 14 +++++++++++++-\n 5 files changed, 45 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_mcs.c b/drivers/common/cnxk/roc_mcs.c\nindex 1f269ddae5..f823f7f478 100644\n--- a/drivers/common/cnxk/roc_mcs.c\n+++ b/drivers/common/cnxk/roc_mcs.c\n@@ -10,6 +10,7 @@ struct mcs_event_cb {\n \tenum roc_mcs_event_type event;\n \troc_mcs_dev_cb_fn cb_fn;\n \tvoid *cb_arg;\n+\tvoid *userdata;\n \tvoid *ret_param;\n \tuint32_t active;\n };\n@@ -320,12 +321,16 @@ roc_mcs_intr_configure(struct roc_mcs *mcs, struct roc_mcs_intr_cfg *config)\n {\n \tstruct mcs_intr_cfg *req;\n \tstruct msg_rsp *rsp;\n+\tint rc;\n \n \tif (config == NULL)\n \t\treturn -EINVAL;\n \n \tMCS_SUPPORT_CHECK;\n \n+\tif (mcs->intr_cfg_once)\n+\t\treturn 0;\n+\n \treq = mbox_alloc_msg_mcs_intr_cfg(mcs->mbox);\n \tif (req == NULL)\n \t\treturn -ENOMEM;\n@@ -333,7 +338,11 @@ roc_mcs_intr_configure(struct roc_mcs *mcs, struct roc_mcs_intr_cfg *config)\n \treq->intr_mask = config->intr_mask;\n \treq->mcs_id = mcs->idx;\n \n-\treturn mbox_process_msg(mcs->mbox, (void *)&rsp);\n+\trc = mbox_process_msg(mcs->mbox, (void *)&rsp);\n+\tif (rc == 0)\n+\t\tmcs->intr_cfg_once = true;\n+\n+\treturn rc;\n }\n \n int\n@@ -630,7 +639,7 @@ roc_mcs_event_cb_register(struct roc_mcs *mcs, enum roc_mcs_event_type event,\n \t\tcb->cb_fn = cb_fn;\n \t\tcb->cb_arg = cb_arg;\n \t\tcb->event = event;\n-\t\tmcs->userdata = userdata;\n+\t\tcb->userdata = userdata;\n \t\tTAILQ_INSERT_TAIL(cb_list, cb, next);\n \t}\n \n@@ -678,7 +687,8 @@ mcs_event_cb_process(struct roc_mcs *mcs, struct roc_mcs_event_desc *desc)\n \t\tcb->active = 1;\n \t\tmcs_cb.ret_param = desc;\n \n-\t\trc = mcs_cb.cb_fn(mcs->userdata, mcs_cb.ret_param, mcs_cb.cb_arg);\n+\t\trc = mcs_cb.cb_fn(mcs_cb.userdata, mcs_cb.ret_param, mcs_cb.cb_arg,\n+\t\t\t\t mcs->sa_port_map[desc->metadata.sa_idx]);\n \t\tcb->active = 0;\n \t}\n \n@@ -788,6 +798,10 @@ mcs_alloc_rsrc_bmap(struct roc_mcs *mcs)\n \t\t}\n \t}\n \n+\tmcs->sa_port_map = plt_zmalloc(sizeof(uint8_t) * hw->sa_entries, 0);\n+\tif (mcs->sa_port_map == NULL)\n+\t\tgoto exit;\n+\n \treturn rc;\n \n exit:\n@@ -865,6 +879,8 @@ roc_mcs_dev_fini(struct roc_mcs *mcs)\n \n \tplt_free(priv->port_rsrc);\n \n+\tplt_free(mcs->sa_port_map);\n+\n \troc_idev_mcs_free(mcs);\n \n \tplt_free(mcs);\ndiff --git a/drivers/common/cnxk/roc_mcs.h b/drivers/common/cnxk/roc_mcs.h\nindex afac6c92e2..1b554f79c9 100644\n--- a/drivers/common/cnxk/roc_mcs.h\n+++ b/drivers/common/cnxk/roc_mcs.h\n@@ -477,15 +477,17 @@ struct roc_mcs_fips_result_rsp {\n };\n \n /** User application callback to be registered for any notifications from driver. */\n-typedef int (*roc_mcs_dev_cb_fn)(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg);\n+typedef int (*roc_mcs_dev_cb_fn)(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg,\n+\t\t\t\t uint8_t port_id);\n \n struct roc_mcs {\n \tTAILQ_ENTRY(roc_mcs) next;\n \tstruct plt_pci_device *pci_dev;\n \tstruct mbox *mbox;\n-\tvoid *userdata;\n \tuint8_t idx;\n \tuint8_t refcount;\n+\tbool intr_cfg_once;\n+\tuint8_t *sa_port_map;\n \n #define ROC_MCS_MEM_SZ (1 * 1024)\n \tuint8_t reserved[ROC_MCS_MEM_SZ] __plt_cache_aligned;\n@@ -556,6 +558,8 @@ __roc_api int roc_mcs_tx_sc_sa_map_write(struct roc_mcs *mcs,\n \t\t\t\t\t struct roc_mcs_tx_sc_sa_map *tx_sc_sa_map);\n __roc_api int roc_mcs_tx_sc_sa_map_read(struct roc_mcs *mcs,\n \t\t\t\t\tstruct roc_mcs_tx_sc_sa_map *tx_sc_sa_map);\n+/* SA to Port map update */\n+__roc_api void roc_mcs_sa_port_map_update(struct roc_mcs *mcs, int sa_id, uint8_t port_id);\n \n /* Flow entry read, write and enable */\n __roc_api int roc_mcs_flowid_entry_write(struct roc_mcs *mcs,\ndiff --git a/drivers/common/cnxk/roc_mcs_sec_cfg.c b/drivers/common/cnxk/roc_mcs_sec_cfg.c\nindex 7b3a4c91e8..e2fd3e7b8c 100644\n--- a/drivers/common/cnxk/roc_mcs_sec_cfg.c\n+++ b/drivers/common/cnxk/roc_mcs_sec_cfg.c\n@@ -526,3 +526,9 @@ roc_mcs_flowid_entry_enable(struct roc_mcs *mcs, struct roc_mcs_flowid_ena_dis_e\n \n \treturn mbox_process_msg(mcs->mbox, (void *)&rsp);\n }\n+\n+void\n+roc_mcs_sa_port_map_update(struct roc_mcs *mcs, int sa_id, uint8_t port_id)\n+{\n+\tmcs->sa_port_map[sa_id] = port_id;\n+}\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 8c71497df8..47b219af2b 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -170,6 +170,7 @@ INTERNAL {\n \troc_mcs_rx_sc_sa_map_write;\n \troc_mcs_sa_policy_read;\n \troc_mcs_sa_policy_write;\n+\troc_mcs_sa_port_map_update;\n \troc_mcs_sc_stats_get;\n \troc_mcs_secy_policy_read;\n \troc_mcs_secy_policy_write;\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_mcs.c b/drivers/net/cnxk/cnxk_ethdev_mcs.c\nindex 5264774394..06ef7c98f3 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_mcs.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_mcs.c\n@@ -113,6 +113,8 @@ cnxk_eth_macsec_sa_create(void *device, struct rte_security_macsec_sa *conf)\n \t\treturn -EINVAL;\n \t}\n \n+\troc_mcs_sa_port_map_update(mcs_dev->mdev, sa_id, mcs_dev->port_id);\n+\n \treturn sa_id;\n }\n \n@@ -586,9 +588,11 @@ cnxk_eth_macsec_session_stats_get(struct cnxk_eth_dev *dev, struct cnxk_macsec_s\n }\n \n static int\n-cnxk_mcs_event_cb(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg)\n+cnxk_mcs_event_cb(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg,\n+\t\t uint8_t port_id)\n {\n \tstruct rte_eth_event_macsec_desc d = {0};\n+\tstruct cnxk_mcs_dev *mcs_dev = userdata;\n \n \td.metadata = (uint64_t)userdata;\n \n@@ -617,15 +621,23 @@ cnxk_mcs_event_cb(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg)\n \t\tbreak;\n \tcase ROC_MCS_EVENT_RX_SA_PN_HARD_EXP:\n \t\td.type = RTE_ETH_EVENT_MACSEC_RX_SA_PN_HARD_EXP;\n+\t\tif (mcs_dev->port_id != port_id)\n+\t\t\treturn 0;\n \t\tbreak;\n \tcase ROC_MCS_EVENT_RX_SA_PN_SOFT_EXP:\n \t\td.type = RTE_ETH_EVENT_MACSEC_RX_SA_PN_SOFT_EXP;\n+\t\tif (mcs_dev->port_id != port_id)\n+\t\t\treturn 0;\n \t\tbreak;\n \tcase ROC_MCS_EVENT_TX_SA_PN_HARD_EXP:\n \t\td.type = RTE_ETH_EVENT_MACSEC_TX_SA_PN_HARD_EXP;\n+\t\tif (mcs_dev->port_id != port_id)\n+\t\t\treturn 0;\n \t\tbreak;\n \tcase ROC_MCS_EVENT_TX_SA_PN_SOFT_EXP:\n \t\td.type = RTE_ETH_EVENT_MACSEC_TX_SA_PN_SOFT_EXP;\n+\t\tif (mcs_dev->port_id != port_id)\n+\t\t\treturn 0;\n \t\tbreak;\n \tdefault:\n \t\tplt_err(\"Unknown MACsec event type: %d\", desc->type);\n", "prefixes": [ "v2", "1/1" ] }