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GET /api/patches/127254/?format=api
{ "id": 127254, "url": "http://patches.dpdk.org/api/patches/127254/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230523200401.1945974-7-gakhil@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230523200401.1945974-7-gakhil@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230523200401.1945974-7-gakhil@marvell.com", "date": "2023-05-23T20:03:52", "name": "[06/15] common/cnxk: add MACsec stats", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "b3b438e117c2c02d0b61b1a4dfd603175249bfa5", "submitter": { "id": 2094, "url": "http://patches.dpdk.org/api/people/2094/?format=api", "name": "Akhil Goyal", "email": "gakhil@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230523200401.1945974-7-gakhil@marvell.com/mbox/", "series": [ { "id": 28141, "url": "http://patches.dpdk.org/api/series/28141/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28141", "date": "2023-05-23T20:03:46", "name": "net/cnxk: add MACsec support", "version": 1, "mbox": "http://patches.dpdk.org/series/28141/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/127254/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/127254/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 42B1242B85;\n\tTue, 23 May 2023 22:04:56 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5CE0F42D5A;\n\tTue, 23 May 2023 22:04:39 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id F343A42D4B\n for <dev@dpdk.org>; Tue, 23 May 2023 22:04:36 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 34NG9Uxm021276; Tue, 23 May 2023 13:04:35 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3qpwqk32j7-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 23 May 2023 13:04:34 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Tue, 23 May 2023 13:04:31 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Tue, 23 May 2023 13:04:31 -0700", "from localhost.localdomain (unknown [10.28.36.102])\n by maili.marvell.com (Postfix) with ESMTP id A33C23F70AC;\n Tue, 23 May 2023 13:04:28 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=u9pEiOu/LlKiWwJQMv9JSK/gIiUAAdmZ8WprNUuFlfY=;\n b=JU8F3X3r82cz5gWhmHdt5j6li1Kh5boUJSG6TxKvqVKc7+F8j9xZjLg5r+yngEYe/VPH\n FQccRGaXV0UJNKQqomfBupjrm65VzoAwc+1lpamI/tOWycZKKeYxpZ1jp0hbiy429SHV\n NGNIH65pq1bFUVj4EMT3W0UQWQh+KcKyd50EX1um/KIbNjD3NgwFerz+mTbvrTYWxX5H\n tgnewSWg2Hes8OYI7s697YghoTRqxkay1MYualaFM2CqOzCMqt1mvbZVguYhinw1d7J4\n 80sKHVjHV/66BiVmDHXTygekX68TWEZNWXDDO2ybvdp3SQC9TfYJ8dum4MgnkHZytSqb 6Q==", "From": "Akhil Goyal <gakhil@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<thomas@monjalon.net>, <olivier.matz@6wind.com>, <orika@nvidia.com>,\n <david.marchand@redhat.com>, <vattunuru@marvell.com>,\n <ferruh.yigit@amd.com>, <jerinj@marvell.com>, <adwivedi@marvell.com>,\n <ndabilpuram@marvell.com>, Akhil Goyal <gakhil@marvell.com>", "Subject": "[PATCH 06/15] common/cnxk: add MACsec stats", "Date": "Wed, 24 May 2023 01:33:52 +0530", "Message-ID": "<20230523200401.1945974-7-gakhil@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230523200401.1945974-1-gakhil@marvell.com>", "References": "<20220928124516.93050-1-gakhil@marvell.com>\n <20230523200401.1945974-1-gakhil@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "rt6bvfLid6L5VCNJEp7lL-keO-zNQrw5", "X-Proofpoint-GUID": "rt6bvfLid6L5VCNJEp7lL-keO-zNQrw5", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26\n definitions=2023-05-23_12,2023-05-23_02,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added ROC APIs for MACsec stats for SC/SECY/FLOW/PORT\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\nSigned-off-by: Akhil Goyal <gakhil@marvell.com>\n---\n drivers/common/cnxk/meson.build | 1 +\n drivers/common/cnxk/roc_mbox.h | 93 ++++++++++++++\n drivers/common/cnxk/roc_mcs.h | 85 ++++++++++++\n drivers/common/cnxk/roc_mcs_stats.c | 193 ++++++++++++++++++++++++++++\n drivers/common/cnxk/version.map | 5 +\n 5 files changed, 377 insertions(+)\n create mode 100644 drivers/common/cnxk/roc_mcs_stats.c", "diff": "diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex 589baf74fe..79e10bac74 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -28,6 +28,7 @@ sources = files(\n 'roc_mbox.c',\n 'roc_mcs.c',\n 'roc_mcs_sec_cfg.c',\n+ 'roc_mcs_stats.c',\n 'roc_ml.c',\n 'roc_model.c',\n 'roc_nix.c',\ndiff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h\nindex 9f9783ec92..1cbe66cc0c 100644\n--- a/drivers/common/cnxk/roc_mbox.h\n+++ b/drivers/common/cnxk/roc_mbox.h\n@@ -291,6 +291,11 @@ struct mbox_msghdr {\n \tM(MCS_PN_TABLE_WRITE, 0xa009, mcs_pn_table_write, mcs_pn_table_write_req, msg_rsp) \\\n \tM(MCS_SET_ACTIVE_LMAC, 0xa00a, mcs_set_active_lmac, mcs_set_active_lmac, msg_rsp) \\\n \tM(MCS_GET_HW_INFO, 0xa00b, mcs_get_hw_info, msg_req, mcs_hw_info) \\\n+\tM(MCS_GET_FLOWID_STATS, 0xa00c, mcs_get_flowid_stats, mcs_stats_req, mcs_flowid_stats) \\\n+\tM(MCS_GET_SECY_STATS, 0xa00d, mcs_get_secy_stats, mcs_stats_req, mcs_secy_stats) \\\n+\tM(MCS_GET_SC_STATS, 0xa00e, mcs_get_sc_stats, mcs_stats_req, mcs_sc_stats) \\\n+\tM(MCS_GET_PORT_STATS, 0xa010, mcs_get_port_stats, mcs_stats_req, mcs_port_stats) \\\n+\tM(MCS_CLEAR_STATS, 0xa011, mcs_clear_stats, mcs_clear_stats, msg_rsp) \\\n \tM(MCS_SET_LMAC_MODE, 0xa013, mcs_set_lmac_mode, mcs_set_lmac_mode, msg_rsp) \\\n \tM(MCS_SET_PN_THRESHOLD, 0xa014, mcs_set_pn_threshold, mcs_set_pn_threshold, msg_rsp) \\\n \n@@ -859,6 +864,94 @@ struct mcs_set_pn_threshold {\n \tuint64_t __io rsvd;\n };\n \n+struct mcs_stats_req {\n+\tstruct mbox_msghdr hdr;\n+\tuint8_t __io id;\n+\tuint8_t __io mcs_id;\n+\tuint8_t __io dir;\n+\tuint64_t __io rsvd;\n+};\n+\n+struct mcs_flowid_stats {\n+\tstruct mbox_msghdr hdr;\n+\tuint64_t __io tcam_hit_cnt;\n+\tuint64_t __io rsvd;\n+};\n+\n+struct mcs_secy_stats {\n+\tstruct mbox_msghdr hdr;\n+\tuint64_t __io ctl_pkt_bcast_cnt;\n+\tuint64_t __io ctl_pkt_mcast_cnt;\n+\tuint64_t __io ctl_pkt_ucast_cnt;\n+\tuint64_t __io ctl_octet_cnt;\n+\tuint64_t __io unctl_pkt_bcast_cnt;\n+\tuint64_t __io unctl_pkt_mcast_cnt;\n+\tuint64_t __io unctl_pkt_ucast_cnt;\n+\tuint64_t __io unctl_octet_cnt;\n+\t/* Valid only for RX */\n+\tuint64_t __io octet_decrypted_cnt;\n+\tuint64_t __io octet_validated_cnt;\n+\tuint64_t __io pkt_port_disabled_cnt;\n+\tuint64_t __io pkt_badtag_cnt;\n+\tuint64_t __io pkt_nosa_cnt;\n+\tuint64_t __io pkt_nosaerror_cnt;\n+\tuint64_t __io pkt_tagged_ctl_cnt;\n+\tuint64_t __io pkt_untaged_cnt;\n+\tuint64_t __io pkt_ctl_cnt; /* CN10K-B */\n+\tuint64_t __io pkt_notag_cnt; /* CNF10K-B */\n+\t/* Valid only for TX */\n+\tuint64_t __io octet_encrypted_cnt;\n+\tuint64_t __io octet_protected_cnt;\n+\tuint64_t __io pkt_noactivesa_cnt;\n+\tuint64_t __io pkt_toolong_cnt;\n+\tuint64_t __io pkt_untagged_cnt;\n+\tuint64_t __io rsvd[4];\n+};\n+\n+struct mcs_port_stats {\n+\tstruct mbox_msghdr hdr;\n+\tuint64_t __io tcam_miss_cnt;\n+\tuint64_t __io parser_err_cnt;\n+\tuint64_t __io preempt_err_cnt; /* CNF10K-B */\n+\tuint64_t __io sectag_insert_err_cnt;\n+\tuint64_t __io rsvd[4];\n+};\n+\n+struct mcs_sc_stats {\n+\tstruct mbox_msghdr hdr;\n+\t/* RX */\n+\tuint64_t __io hit_cnt;\n+\tuint64_t __io pkt_invalid_cnt;\n+\tuint64_t __io pkt_late_cnt;\n+\tuint64_t __io pkt_notvalid_cnt;\n+\tuint64_t __io pkt_unchecked_cnt;\n+\tuint64_t __io pkt_delay_cnt;\t /* CNF10K-B */\n+\tuint64_t __io pkt_ok_cnt;\t /* CNF10K-B */\n+\tuint64_t __io octet_decrypt_cnt; /* CN10K-B */\n+\tuint64_t __io octet_validate_cnt; /* CN10K-B */\n+\t/* TX */\n+\tuint64_t __io pkt_encrypt_cnt;\n+\tuint64_t __io pkt_protected_cnt;\n+\tuint64_t __io octet_encrypt_cnt; /* CN10K-B */\n+\tuint64_t __io octet_protected_cnt; /* CN10K-B */\n+\tuint64_t __io rsvd[4];\n+};\n+\n+struct mcs_clear_stats {\n+\tstruct mbox_msghdr hdr;\n+#define MCS_FLOWID_STATS 0\n+#define MCS_SECY_STATS\t 1\n+#define MCS_SC_STATS\t 2\n+#define MCS_SA_STATS\t 3\n+#define MCS_PORT_STATS\t 4\n+\tuint8_t __io type; /* FLOWID, SECY, SC, SA, PORT */\n+\t/* type = PORT, If id = FF(invalid) port no is derived from pcifunc */\n+\tuint8_t __io id;\n+\tuint8_t __io mcs_id;\n+\tuint8_t __io dir;\n+\tuint8_t __io all; /* All resources stats mapped to PF are cleared */\n+};\n+\n /* NPA mbox message formats */\n \n /* NPA mailbox error codes\ndiff --git a/drivers/common/cnxk/roc_mcs.h b/drivers/common/cnxk/roc_mcs.h\nindex a51ee21278..0157a7b26a 100644\n--- a/drivers/common/cnxk/roc_mcs.h\n+++ b/drivers/common/cnxk/roc_mcs.h\n@@ -135,6 +135,76 @@ struct roc_mcs_set_pn_threshold {\n \tuint64_t rsvd;\n };\n \n+struct roc_mcs_stats_req {\n+\tuint8_t id;\n+\tuint8_t dir;\n+};\n+\n+struct roc_mcs_flowid_stats {\n+\tuint64_t tcam_hit_cnt;\n+};\n+\n+struct roc_mcs_secy_stats {\n+\tuint64_t ctl_pkt_bcast_cnt;\n+\tuint64_t ctl_pkt_mcast_cnt;\n+\tuint64_t ctl_pkt_ucast_cnt;\n+\tuint64_t ctl_octet_cnt;\n+\tuint64_t unctl_pkt_bcast_cnt;\n+\tuint64_t unctl_pkt_mcast_cnt;\n+\tuint64_t unctl_pkt_ucast_cnt;\n+\tuint64_t unctl_octet_cnt;\n+\t/* Valid only for RX */\n+\tuint64_t octet_decrypted_cnt;\n+\tuint64_t octet_validated_cnt;\n+\tuint64_t pkt_port_disabled_cnt;\n+\tuint64_t pkt_badtag_cnt;\n+\tuint64_t pkt_nosa_cnt;\n+\tuint64_t pkt_nosaerror_cnt;\n+\tuint64_t pkt_tagged_ctl_cnt;\n+\tuint64_t pkt_untaged_cnt;\n+\tuint64_t pkt_ctl_cnt;\t/* CN10K-B */\n+\tuint64_t pkt_notag_cnt; /* CNF10K-B */\n+\t/* Valid only for TX */\n+\tuint64_t octet_encrypted_cnt;\n+\tuint64_t octet_protected_cnt;\n+\tuint64_t pkt_noactivesa_cnt;\n+\tuint64_t pkt_toolong_cnt;\n+\tuint64_t pkt_untagged_cnt;\n+};\n+\n+struct roc_mcs_sc_stats {\n+\t/* RX */\n+\tuint64_t hit_cnt;\n+\tuint64_t pkt_invalid_cnt;\n+\tuint64_t pkt_late_cnt;\n+\tuint64_t pkt_notvalid_cnt;\n+\tuint64_t pkt_unchecked_cnt;\n+\tuint64_t pkt_delay_cnt;\t /* CNF10K-B */\n+\tuint64_t pkt_ok_cnt;\t /* CNF10K-B */\n+\tuint64_t octet_decrypt_cnt; /* CN10K-B */\n+\tuint64_t octet_validate_cnt; /* CN10K-B */\n+\t/* TX */\n+\tuint64_t pkt_encrypt_cnt;\n+\tuint64_t pkt_protected_cnt;\n+\tuint64_t octet_encrypt_cnt; /* CN10K-B */\n+\tuint64_t octet_protected_cnt; /* CN10K-B */\n+};\n+\n+struct roc_mcs_port_stats {\n+\tuint64_t tcam_miss_cnt;\n+\tuint64_t parser_err_cnt;\n+\tuint64_t preempt_err_cnt; /* CNF10K-B */\n+\tuint64_t sectag_insert_err_cnt;\n+};\n+\n+struct roc_mcs_clear_stats {\n+\tuint8_t type; /* FLOWID, SECY, SC, SA, PORT */\n+\t/* type = PORT, If id = FF(invalid) port no is derived from pcifunc */\n+\tuint8_t id;\n+\tuint8_t dir;\n+\tuint8_t all; /* All resources stats mapped to PF are cleared */\n+};\n+\n struct roc_mcs {\n \tTAILQ_ENTRY(roc_mcs) next;\n \tstruct plt_pci_device *pci_dev;\n@@ -205,4 +275,19 @@ __roc_api int roc_mcs_flowid_entry_read(struct roc_mcs *mcs,\n __roc_api int roc_mcs_flowid_entry_enable(struct roc_mcs *mcs,\n \t\t\t\t\t struct roc_mcs_flowid_ena_dis_entry *entry);\n \n+/* Flow id stats get */\n+__roc_api int roc_mcs_flowid_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req,\n+\t\t\t\t struct roc_mcs_flowid_stats *stats);\n+/* Secy stats get */\n+__roc_api int roc_mcs_secy_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req,\n+\t\t\t\t struct roc_mcs_secy_stats *stats);\n+/* SC stats get */\n+__roc_api int roc_mcs_sc_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req,\n+\t\t\t\t struct roc_mcs_sc_stats *stats);\n+/* Port stats get */\n+__roc_api int roc_mcs_port_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req,\n+\t\t\t\t struct roc_mcs_port_stats *stats);\n+/* Clear stats */\n+__roc_api int roc_mcs_stats_clear(struct roc_mcs *mcs, struct roc_mcs_clear_stats *mcs_req);\n+\n #endif /* _ROC_MCS_H_ */\ndiff --git a/drivers/common/cnxk/roc_mcs_stats.c b/drivers/common/cnxk/roc_mcs_stats.c\nnew file mode 100644\nindex 0000000000..24ac8a31cd\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_mcs_stats.c\n@@ -0,0 +1,193 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2022 Marvell.\n+ */\n+\n+#include \"roc_api.h\"\n+#include \"roc_priv.h\"\n+\n+int\n+roc_mcs_flowid_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req,\n+\t\t\t struct roc_mcs_flowid_stats *stats)\n+{\n+\tstruct mcs_flowid_stats *rsp;\n+\tstruct mcs_stats_req *req;\n+\tint rc;\n+\n+\tMCS_SUPPORT_CHECK;\n+\n+\treq = mbox_alloc_msg_mcs_get_flowid_stats(mcs->mbox);\n+\tif (req == NULL)\n+\t\treturn -ENOSPC;\n+\n+\treq->id = mcs_req->id;\n+\treq->mcs_id = mcs->idx;\n+\treq->dir = mcs_req->dir;\n+\n+\trc = mbox_process_msg(mcs->mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tstats->tcam_hit_cnt = rsp->tcam_hit_cnt;\n+\n+\treturn rc;\n+}\n+\n+int\n+roc_mcs_secy_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req,\n+\t\t struct roc_mcs_secy_stats *stats)\n+{\n+\tstruct mcs_secy_stats *rsp;\n+\tstruct mcs_stats_req *req;\n+\tint rc;\n+\n+\tMCS_SUPPORT_CHECK;\n+\n+\treq = mbox_alloc_msg_mcs_get_secy_stats(mcs->mbox);\n+\tif (req == NULL)\n+\t\treturn -ENOSPC;\n+\n+\treq->id = mcs_req->id;\n+\treq->mcs_id = mcs->idx;\n+\treq->dir = mcs_req->dir;\n+\n+\trc = mbox_process_msg(mcs->mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tstats->ctl_pkt_bcast_cnt = rsp->ctl_pkt_bcast_cnt;\n+\tstats->ctl_pkt_mcast_cnt = rsp->ctl_pkt_mcast_cnt;\n+\tstats->ctl_pkt_ucast_cnt = rsp->ctl_pkt_ucast_cnt;\n+\tstats->ctl_octet_cnt = rsp->ctl_octet_cnt;\n+\tstats->unctl_pkt_bcast_cnt = rsp->unctl_pkt_bcast_cnt;\n+\tstats->unctl_pkt_mcast_cnt = rsp->unctl_pkt_mcast_cnt;\n+\tstats->unctl_pkt_ucast_cnt = rsp->unctl_pkt_ucast_cnt;\n+\tstats->unctl_octet_cnt = rsp->unctl_octet_cnt;\n+\n+\tif (mcs_req->dir == MCS_RX) {\n+\t\tstats->octet_decrypted_cnt = rsp->octet_decrypted_cnt;\n+\t\tstats->octet_validated_cnt = rsp->octet_validated_cnt;\n+\t\tstats->pkt_port_disabled_cnt = rsp->pkt_port_disabled_cnt;\n+\t\tstats->pkt_badtag_cnt = rsp->pkt_badtag_cnt;\n+\t\tstats->pkt_nosa_cnt = rsp->pkt_nosa_cnt;\n+\t\tstats->pkt_nosaerror_cnt = rsp->pkt_nosaerror_cnt;\n+\t\tstats->pkt_tagged_ctl_cnt = rsp->pkt_tagged_ctl_cnt;\n+\t\tstats->pkt_untaged_cnt = rsp->pkt_untaged_cnt;\n+\t\tif (roc_model_is_cn10kb_a0())\n+\t\t\t/* CN10K-B */\n+\t\t\tstats->pkt_ctl_cnt = rsp->pkt_ctl_cnt;\n+\t\telse\n+\t\t\t/* CNF10K-B */\n+\t\t\tstats->pkt_notag_cnt = rsp->pkt_notag_cnt;\n+\t} else {\n+\t\tstats->octet_encrypted_cnt = rsp->octet_encrypted_cnt;\n+\t\tstats->octet_protected_cnt = rsp->octet_protected_cnt;\n+\t\tstats->pkt_noactivesa_cnt = rsp->pkt_noactivesa_cnt;\n+\t\tstats->pkt_toolong_cnt = rsp->pkt_toolong_cnt;\n+\t\tstats->pkt_untagged_cnt = rsp->pkt_untagged_cnt;\n+\t}\n+\n+\treturn rc;\n+}\n+\n+int\n+roc_mcs_sc_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req,\n+\t\t struct roc_mcs_sc_stats *stats)\n+{\n+\tstruct mcs_stats_req *req;\n+\tstruct mcs_sc_stats *rsp;\n+\tint rc;\n+\n+\tMCS_SUPPORT_CHECK;\n+\n+\treq = mbox_alloc_msg_mcs_get_sc_stats(mcs->mbox);\n+\tif (req == NULL)\n+\t\treturn -ENOSPC;\n+\n+\treq->id = mcs_req->id;\n+\treq->mcs_id = mcs->idx;\n+\treq->dir = mcs_req->dir;\n+\n+\trc = mbox_process_msg(mcs->mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (mcs_req->dir == MCS_RX) {\n+\t\tstats->hit_cnt = rsp->hit_cnt;\n+\t\tstats->pkt_invalid_cnt = rsp->pkt_invalid_cnt;\n+\t\tstats->pkt_late_cnt = rsp->pkt_late_cnt;\n+\t\tstats->pkt_notvalid_cnt = rsp->pkt_notvalid_cnt;\n+\t\tstats->pkt_unchecked_cnt = rsp->pkt_unchecked_cnt;\n+\t\tif (roc_model_is_cn10kb_a0()) {\n+\t\t\tstats->octet_decrypt_cnt = rsp->octet_decrypt_cnt;\n+\t\t\tstats->octet_validate_cnt = rsp->octet_validate_cnt;\n+\t\t} else {\n+\t\t\tstats->pkt_delay_cnt = rsp->pkt_delay_cnt;\n+\t\t\tstats->pkt_ok_cnt = rsp->pkt_ok_cnt;\n+\t\t}\n+\t} else {\n+\t\tstats->pkt_encrypt_cnt = rsp->pkt_encrypt_cnt;\n+\t\tstats->pkt_protected_cnt = rsp->pkt_protected_cnt;\n+\t\tif (roc_model_is_cn10kb_a0()) {\n+\t\t\tstats->octet_encrypt_cnt = rsp->octet_encrypt_cnt;\n+\t\t\tstats->octet_protected_cnt = rsp->octet_protected_cnt;\n+\t\t}\n+\t}\n+\n+\treturn rc;\n+}\n+\n+int\n+roc_mcs_port_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req,\n+\t\t struct roc_mcs_port_stats *stats)\n+{\n+\tstruct mcs_port_stats *rsp;\n+\tstruct mcs_stats_req *req;\n+\tint rc;\n+\n+\tMCS_SUPPORT_CHECK;\n+\n+\treq = mbox_alloc_msg_mcs_get_port_stats(mcs->mbox);\n+\tif (req == NULL)\n+\t\treturn -ENOSPC;\n+\n+\treq->id = mcs_req->id;\n+\treq->mcs_id = mcs->idx;\n+\treq->dir = mcs_req->dir;\n+\n+\trc = mbox_process_msg(mcs->mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tstats->tcam_miss_cnt = rsp->tcam_miss_cnt;\n+\tstats->parser_err_cnt = rsp->parser_err_cnt;\n+\tif (roc_model_is_cnf10kb())\n+\t\tstats->preempt_err_cnt = rsp->preempt_err_cnt;\n+\n+\tstats->sectag_insert_err_cnt = rsp->sectag_insert_err_cnt;\n+\n+\treturn rc;\n+}\n+\n+int\n+roc_mcs_stats_clear(struct roc_mcs *mcs, struct roc_mcs_clear_stats *mcs_req)\n+{\n+\tstruct mcs_clear_stats *req;\n+\tstruct msg_rsp *rsp;\n+\n+\tMCS_SUPPORT_CHECK;\n+\n+\tif (!roc_model_is_cn10kb_a0() && mcs_req->type == MCS_SA_STATS)\n+\t\treturn MCS_ERR_HW_NOTSUP;\n+\n+\treq = mbox_alloc_msg_mcs_clear_stats(mcs->mbox);\n+\tif (req == NULL)\n+\t\treturn -ENOSPC;\n+\n+\treq->type = mcs_req->type;\n+\treq->id = mcs_req->id;\n+\treq->mcs_id = mcs->idx;\n+\treq->dir = mcs_req->dir;\n+\treq->all = mcs_req->all;\n+\n+\treturn mbox_process_msg(mcs->mbox, (void *)&rsp);\n+}\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 9be7887967..4b832f2303 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -141,12 +141,14 @@ INTERNAL {\n \troc_mcs_flowid_entry_enable;\n \troc_mcs_flowid_entry_read;\n \troc_mcs_flowid_entry_write;\n+\troc_mcs_flowid_stats_get;\n \troc_mcs_free_rsrc;\n \troc_mcs_hw_info_get;\n \troc_mcs_lmac_mode_set;\n \troc_mcs_pn_table_write;\n \troc_mcs_pn_table_read;\n \troc_mcs_pn_threshold_set;\n+\troc_mcs_port_stats_get;\n \troc_mcs_rx_sc_cam_enable;\n \troc_mcs_rx_sc_cam_read;\n \troc_mcs_rx_sc_cam_write;\n@@ -154,8 +156,11 @@ INTERNAL {\n \troc_mcs_rx_sc_sa_map_write;\n \troc_mcs_sa_policy_read;\n \troc_mcs_sa_policy_write;\n+\troc_mcs_sc_stats_get;\n \troc_mcs_secy_policy_read;\n \troc_mcs_secy_policy_write;\n+\troc_mcs_secy_stats_get;\n+\troc_mcs_stats_clear;\n \troc_mcs_tx_sc_sa_map_read;\n \troc_mcs_tx_sc_sa_map_write;\n \troc_nix_bpf_alloc;\n", "prefixes": [ "06/15" ] }