Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/127229/?format=api
{ "id": 127229, "url": "http://patches.dpdk.org/api/patches/127229/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230523184818.139353-3-hernan.vargas@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230523184818.139353-3-hernan.vargas@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230523184818.139353-3-hernan.vargas@intel.com", "date": "2023-05-23T18:48:14", "name": "[v1,2/6] baseband/fpga_5gnr_fec: fix seg fault unconf queue", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "396912b1bb7df5f9363a157e2512796f91037e50", "submitter": { "id": 2659, "url": "http://patches.dpdk.org/api/people/2659/?format=api", "name": "Hernan Vargas", "email": "hernan.vargas@intel.com" }, "delegate": { "id": 2642, "url": "http://patches.dpdk.org/api/users/2642/?format=api", "username": "mcoquelin", "first_name": "Maxime", "last_name": "Coquelin", "email": "maxime.coquelin@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230523184818.139353-3-hernan.vargas@intel.com/mbox/", "series": [ { "id": 28139, "url": "http://patches.dpdk.org/api/series/28139/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28139", "date": "2023-05-23T18:48:12", "name": "baseband/fpga_5gnr_fec: changes for 23.07", "version": 1, "mbox": "http://patches.dpdk.org/series/28139/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/127229/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/127229/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3E67B42B83;\n\tTue, 23 May 2023 20:49:42 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D2BF542D3A;\n\tTue, 23 May 2023 20:49:32 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id 817A340A80;\n Tue, 23 May 2023 20:49:29 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 May 2023 11:49:27 -0700", "from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103])\n by orsmga005.jf.intel.com with ESMTP; 23 May 2023 11:49:27 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1684867769; x=1716403769;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=Frj23hiAk5qBsV8F1Kiv9TzYc2VcjdMrdi5Hi/xKsVc=;\n b=UbejMS4BWbUPBH/q/T9xrZiHsIiJ8aO0H0E7dP0G8F+/lzx2LJ1qq5j8\n LDKyUijSFSNYH89ku6y8rbqnaOKV7enYR9k89psIuI5yphUhlA/72Kezq\n qvWiKSlEiiJYgHwxwFx35G29cz6OJwTdUk18xm8EJSWWy2sRWQQr58KDw\n KuUz1JseZMallJ7G7MhixOOzevFE3P9SpqF4e6pnAWq8EaWgXPjmn28Ef\n s4/g3qVFcwCQIsEkOjf9QQKvcKO8pwVsDF7/tKrP7LFZxYaZBupsoFrZg\n dTqfwaM9cQh3msLXqihoMxuv6DkaBLLjZbg1DpG8NopaaQxHlEyQsdUA2 Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10719\"; a=\"439677942\"", "E=Sophos;i=\"6.00,187,1681196400\"; d=\"scan'208\";a=\"439677942\"", "E=McAfee;i=\"6600,9927,10719\"; a=\"878317347\"", "E=Sophos;i=\"6.00,187,1681196400\"; d=\"scan'208\";a=\"878317347\"" ], "X-ExtLoop1": "1", "From": "Hernan Vargas <hernan.vargas@intel.com>", "To": "dev@dpdk.org, maxime.coquelin@redhat.com, gakhil@marvell.com,\n trix@redhat.com", "Cc": "nicolas.chautru@intel.com, qi.z.zhang@intel.com,\n Hernan Vargas <hernan.vargas@intel.com>, stable@dpdk.org", "Subject": "[PATCH v1 2/6] baseband/fpga_5gnr_fec: fix seg fault unconf queue", "Date": "Tue, 23 May 2023 11:48:14 -0700", "Message-Id": "<20230523184818.139353-3-hernan.vargas@intel.com>", "X-Mailer": "git-send-email 2.37.1", "In-Reply-To": "<20230523184818.139353-1-hernan.vargas@intel.com>", "References": "<20230523184818.139353-1-hernan.vargas@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Adding exception to prevent segmentation fault in case a queue is\nstarted which was not configured earlier.\n\nFixes: c58109a8871d (\"baseband/fpga_5gnr_fec: add queue configuration\")\nCc: stable@dpdk.org\n\nSigned-off-by: Hernan Vargas <hernan.vargas@intel.com>\n---\n drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 4 ++++\n 1 file changed, 4 insertions(+)", "diff": "diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\nindex 9388cce52960..a6211f73e6e3 100644\n--- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\n+++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\n@@ -573,6 +573,10 @@ fpga_queue_start(struct rte_bbdev *dev, uint16_t queue_id)\n \t\treturn -1;\n \t}\n #endif\n+\tif (dev->data->queues[queue_id].queue_private == NULL) {\n+\t\trte_bbdev_log(ERR, \"Cannot start invalid queue %d\", queue_id);\n+\t\treturn -1;\n+\t}\n \tstruct fpga_queue *q = dev->data->queues[queue_id].queue_private;\n \tuint32_t offset = FPGA_5GNR_FEC_RING_CTRL_REGS +\n \t\t\t(sizeof(struct fpga_ring_ctrl_reg) * q->q_idx);\n", "prefixes": [ "v1", "2/6" ] }