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GET /api/patches/127065/?format=api
{ "id": 127065, "url": "http://patches.dpdk.org/api/patches/127065/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230519034219.2209868-1-psatheesh@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230519034219.2209868-1-psatheesh@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230519034219.2209868-1-psatheesh@marvell.com", "date": "2023-05-19T03:42:18", "name": "[1/2] common/cnxk: support Tx queue flow pattern in ROC API", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "986994f8a947ef5a40bfb35db487fd2277824633", "submitter": { "id": 1663, "url": "http://patches.dpdk.org/api/people/1663/?format=api", "name": "Satheesh Paul Antonysamy", "email": "psatheesh@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230519034219.2209868-1-psatheesh@marvell.com/mbox/", "series": [ { "id": 28076, "url": "http://patches.dpdk.org/api/series/28076/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28076", "date": "2023-05-19T03:42:18", "name": "[1/2] common/cnxk: support Tx queue flow pattern in ROC API", "version": 1, "mbox": "http://patches.dpdk.org/series/28076/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/127065/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/127065/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A6E4742B42;\n\tFri, 19 May 2023 05:42:29 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 77D7840A82;\n\tFri, 19 May 2023 05:42:29 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id A5919406B5\n for <dev@dpdk.org>; Fri, 19 May 2023 05:42:27 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 34IHgCNS012880 for <dev@dpdk.org>; Thu, 18 May 2023 20:42:26 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3qn7jbedge-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 18 May 2023 20:42:26 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Thu, 18 May 2023 20:42:25 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Thu, 18 May 2023 20:42:24 -0700", "from satheeshpaullabpc.. (unknown [10.28.34.33])\n by maili.marvell.com (Postfix) with ESMTP id 095F23F7085;\n Thu, 18 May 2023 20:42:22 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=3R6YLguKW23L9Cwf6Xxwgmuy/cicxQU+O8R/QFaK3Mc=;\n b=B+UBCHAieTwElmRCzYM/B+Oy0ry43E4uIpHdwhL542mjt09p16zS5B62YImuFRatIy8P\n 3TkU49mjvRD4z03FFHBbaPAOQmIDx+scs7DNl1L20fZElyGkoXe1ptlqMLFMe55HyYas\n dQUFF8eY8XEg5Y7K6JImd/Ri4/x+QJ8ndbxqCgRYMHPX2uAiejVeoMZzX6VNRXYfC7gH\n ekMFZMmaVq2/wF4aMj/71j0Kj2LTpCEfEuQY8kF2IZ92bldklsJIYMOM9q0mXHo1WlBp\n R7szFul29r+LAOVYzcTE4k769rM5mRNGP0l0KfmtOOdWEY0GvHw3Ng+z+Gzhdnpe9LoT VQ==", "From": "<psatheesh@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<dev@dpdk.org>, Satheesh Paul <psatheesh@marvell.com>", "Subject": "[dpdk-dev] [PATCH 1/2] common/cnxk: support Tx queue flow pattern in\n ROC API", "Date": "Fri, 19 May 2023 09:12:18 +0530", "Message-ID": "<20230519034219.2209868-1-psatheesh@marvell.com>", "X-Mailer": "git-send-email 2.39.2", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "X96Hzek3iUbRHx64LZBELa0y-k5XwuLf", "X-Proofpoint-ORIG-GUID": "X96Hzek3iUbRHx64LZBELa0y-k5XwuLf", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.170.22\n definitions=2023-05-19_01,2023-05-17_02,2023-02-09_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Satheesh Paul <psatheesh@marvell.com>\n\nAdded ROC API changes to support Tx queue flow\npattern item.\n\nSigned-off-by: Satheesh Paul <psatheesh@marvell.com>\nReviewed-by: Kiran Kumar K <kirankumark@marvell.com>\n---\nDepends-on: series-28056 (\"ethdev: add Tx queue flow matching item\")\n\n drivers/common/cnxk/roc_npc.c | 16 +++++---\n drivers/common/cnxk/roc_npc.h | 1 +\n drivers/common/cnxk/roc_npc_mcam.c | 61 +++++++++++++++++++++++------\n drivers/common/cnxk/roc_npc_parse.c | 52 ++++++++++++++++++++++++\n drivers/common/cnxk/roc_npc_priv.h | 2 +\n 5 files changed, 115 insertions(+), 17 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c\nindex ba75207955..4b5be65b72 100644\n--- a/drivers/common/cnxk/roc_npc.c\n+++ b/drivers/common/cnxk/roc_npc.c\n@@ -779,11 +779,10 @@ npc_parse_pattern(struct npc *npc, const struct roc_npc_item_info pattern[],\n \t\t struct roc_npc_flow *flow, struct npc_parse_state *pst)\n {\n \tnpc_parse_stage_func_t parse_stage_funcs[] = {\n-\t\tnpc_parse_meta_items, npc_parse_mark_item, npc_parse_pre_l2,\n-\t\tnpc_parse_cpt_hdr, npc_parse_higig2_hdr, npc_parse_la,\n-\t\tnpc_parse_lb,\t npc_parse_lc,\t npc_parse_ld,\n-\t\tnpc_parse_le,\t npc_parse_lf,\t npc_parse_lg,\n-\t\tnpc_parse_lh,\n+\t\tnpc_parse_meta_items, npc_parse_mark_item, npc_parse_pre_l2, npc_parse_cpt_hdr,\n+\t\tnpc_parse_higig2_hdr, npc_parse_tx_queue, npc_parse_la, npc_parse_lb,\n+\t\tnpc_parse_lc,\t npc_parse_ld,\t npc_parse_le, npc_parse_lf,\n+\t\tnpc_parse_lg,\t npc_parse_lh,\n \t};\n \tuint8_t layer = 0;\n \tint key_offset;\n@@ -792,9 +791,9 @@ npc_parse_pattern(struct npc *npc, const struct roc_npc_item_info pattern[],\n \tif (pattern == NULL)\n \t\treturn NPC_ERR_PARAM;\n \n-\tmemset(pst, 0, sizeof(*pst));\n \tpst->npc = npc;\n \tpst->flow = flow;\n+\tpst->nix_intf = flow->nix_intf;\n \n \t/* Use integral byte offset */\n \tkey_offset = pst->npc->keyx_len[flow->nix_intf];\n@@ -864,8 +863,12 @@ npc_parse_rule(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,\n \t struct npc_parse_state *pst)\n {\n \tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n+\tstruct roc_nix *roc_nix = roc_npc->roc_nix;\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n \tint err;\n \n+\tpst->nb_tx_queues = nix->nb_tx_queues;\n+\n \t/* Check attr */\n \terr = npc_parse_attr(npc, attr, flow);\n \tif (err)\n@@ -1425,6 +1428,7 @@ roc_npc_flow_create(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,\n \t\treturn NULL;\n \t}\n \tmemset(flow, 0, sizeof(*flow));\n+\tmemset(&parse_state, 0, sizeof(parse_state));\n \n \trc = npc_parse_rule(roc_npc, attr, pattern, actions, flow,\n \t\t\t &parse_state);\ndiff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h\nindex 26a43c12cb..5984da1c1a 100644\n--- a/drivers/common/cnxk/roc_npc.h\n+++ b/drivers/common/cnxk/roc_npc.h\n@@ -39,6 +39,7 @@ enum roc_npc_item_type {\n \tROC_NPC_ITEM_TYPE_QINQ,\n \tROC_NPC_ITEM_TYPE_RAW,\n \tROC_NPC_ITEM_TYPE_MARK,\n+\tROC_NPC_ITEM_TYPE_TX_QUEUE,\n \tROC_NPC_ITEM_TYPE_END,\n };\n \ndiff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c\nindex 72892be300..e0019818c7 100644\n--- a/drivers/common/cnxk/roc_npc_mcam.c\n+++ b/drivers/common/cnxk/roc_npc_mcam.c\n@@ -587,9 +587,47 @@ npc_mcam_set_channel(struct roc_npc_flow *flow,\n \tflow->mcam_mask[0] |= (uint64_t)mask;\n }\n \n+static int\n+npc_mcam_set_pf_func(struct npc *npc, struct roc_npc_flow *flow, uint16_t pf_func)\n+{\n+#define NPC_PF_FUNC_WIDTH 2\n+#define NPC_KEX_PF_FUNC_MASK 0xFFFF\n+\tuint16_t nr_bytes, hdr_offset, key_offset, pf_func_offset;\n+\tuint8_t *flow_mcam_data, *flow_mcam_mask;\n+\tstruct npc_lid_lt_xtract_info *xinfo;\n+\tbool pffunc_found = false;\n+\tuint16_t mask = 0xFFFF;\n+\tint i;\n+\n+\tflow_mcam_data = (uint8_t *)flow->mcam_data;\n+\tflow_mcam_mask = (uint8_t *)flow->mcam_mask;\n+\n+\txinfo = &npc->prx_dxcfg[NIX_INTF_TX][NPC_LID_LA][NPC_LT_LA_IH_NIX_ETHER];\n+\n+\tfor (i = 0; i < NPC_MAX_LD; i++) {\n+\t\tnr_bytes = xinfo->xtract[i].len;\n+\t\thdr_offset = xinfo->xtract[i].hdr_off;\n+\t\tkey_offset = xinfo->xtract[i].key_off;\n+\n+\t\tif (hdr_offset > 0 || nr_bytes < NPC_PF_FUNC_WIDTH)\n+\t\t\tcontinue;\n+\t\telse\n+\t\t\tpffunc_found = true;\n+\n+\t\tpf_func_offset = key_offset + nr_bytes - NPC_PF_FUNC_WIDTH;\n+\t\tmemcpy((void *)&flow_mcam_data[pf_func_offset], (uint8_t *)&pf_func,\n+\t\t NPC_PF_FUNC_WIDTH);\n+\t\tmemcpy((void *)&flow_mcam_mask[pf_func_offset], (uint8_t *)&mask,\n+\t\t NPC_PF_FUNC_WIDTH);\n+\t}\n+\tif (!pffunc_found)\n+\t\treturn -EINVAL;\n+\n+\treturn 0;\n+}\n+\n int\n-npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,\n-\t\t\t struct npc_parse_state *pst)\n+npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow, struct npc_parse_state *pst)\n {\n \tstruct npc_mcam_write_entry_req *req;\n \tstruct nix_inl_dev *inl_dev = NULL;\n@@ -668,6 +706,16 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,\n \t */\n \treq->entry_data.vtag_action = flow->vtag_action;\n \n+\tif (flow->nix_intf == NIX_INTF_TX) {\n+\t\tuint16_t pf_func = (flow->npc_action >> 4) & 0xffff;\n+\n+\t\tpf_func = plt_cpu_to_be_16(pf_func);\n+\n+\t\trc = npc_mcam_set_pf_func(npc, flow, pf_func);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t}\n+\n \tfor (idx = 0; idx < ROC_NPC_MAX_MCAM_WIDTH_DWORDS; idx++) {\n \t\treq->entry_data.kw[idx] = flow->mcam_data[idx];\n \t\treq->entry_data.kw_mask[idx] = flow->mcam_mask[idx];\n@@ -718,15 +766,6 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,\n \t\t\t\tflow->mcam_mask[0] |= (0x7ULL << la_offset);\n \t\t\t}\n \t\t}\n-\t} else {\n-\t\tuint16_t pf_func = (flow->npc_action >> 4) & 0xffff;\n-\n-\t\tpf_func = plt_cpu_to_be_16(pf_func);\n-\t\treq->entry_data.kw[0] |= ((uint64_t)pf_func << 32);\n-\t\treq->entry_data.kw_mask[0] |= ((uint64_t)0xffff << 32);\n-\n-\t\tflow->mcam_data[0] |= ((uint64_t)pf_func << 32);\n-\t\tflow->mcam_mask[0] |= ((uint64_t)0xffff << 32);\n \t}\n \n \trc = mbox_process_msg(mbox, (void *)&rsp);\ndiff --git a/drivers/common/cnxk/roc_npc_parse.c b/drivers/common/cnxk/roc_npc_parse.c\nindex f746b9cb6d..126bbd5358 100644\n--- a/drivers/common/cnxk/roc_npc_parse.c\n+++ b/drivers/common/cnxk/roc_npc_parse.c\n@@ -180,6 +180,58 @@ npc_parse_higig2_hdr(struct npc_parse_state *pst)\n \treturn npc_update_parse_state(pst, &info, lid, lt, 0);\n }\n \n+int\n+npc_parse_tx_queue(struct npc_parse_state *pst)\n+{\n+\tstruct nix_inst_hdr_s nix_inst_hdr, nix_inst_hdr_mask;\n+\tuint8_t hw_mask[NPC_MAX_EXTRACT_HW_LEN];\n+\tstruct npc_parse_item_info parse_info;\n+\tconst uint16_t *send_queue;\n+\tint lid, lt, rc = 0;\n+\n+\tmemset(&nix_inst_hdr, 0, sizeof(nix_inst_hdr));\n+\tmemset(&nix_inst_hdr_mask, 0, sizeof(nix_inst_hdr_mask));\n+\tmemset(&parse_info, 0, sizeof(parse_info));\n+\n+\tif (pst->pattern->type != ROC_NPC_ITEM_TYPE_TX_QUEUE)\n+\t\treturn 0;\n+\n+\tif (pst->flow->nix_intf != NIX_INTF_TX)\n+\t\treturn NPC_ERR_INVALID_SPEC;\n+\n+\tlid = NPC_LID_LA;\n+\tlt = NPC_LT_LA_IH_NIX_ETHER;\n+\tsend_queue = (const uint16_t *)pst->pattern->spec;\n+\n+\tif (*send_queue >= pst->nb_tx_queues)\n+\t\treturn NPC_ERR_INVALID_SPEC;\n+\n+\tnix_inst_hdr.sq = *send_queue;\n+\tnix_inst_hdr_mask.sq = 0xFFFF;\n+\n+\tparse_info.def_mask = NULL;\n+\tparse_info.spec = &nix_inst_hdr;\n+\tparse_info.mask = &nix_inst_hdr_mask;\n+\tparse_info.len = sizeof(nix_inst_hdr);\n+\tparse_info.def_mask = NULL;\n+\tparse_info.hw_hdr_len = 0;\n+\n+\tmemset(hw_mask, 0, sizeof(hw_mask));\n+\n+\tparse_info.hw_mask = &hw_mask;\n+\tnpc_get_hw_supp_mask(pst, &parse_info, lid, lt);\n+\n+\trc = npc_mask_is_supported(parse_info.mask, parse_info.hw_mask, parse_info.len);\n+\tif (!rc)\n+\t\treturn NPC_ERR_INVALID_MASK;\n+\n+\trc = npc_update_parse_state(pst, &parse_info, lid, lt, 0);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn 0;\n+}\n+\n int\n npc_parse_la(struct npc_parse_state *pst)\n {\ndiff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h\nindex 714dcb09c9..6f41df18bb 100644\n--- a/drivers/common/cnxk/roc_npc_priv.h\n+++ b/drivers/common/cnxk/roc_npc_priv.h\n@@ -200,6 +200,7 @@ struct npc_parse_state {\n \tbool set_ipv6ext_ltype_mask;\n \tbool is_second_pass_rule;\n \tbool has_eth_type;\n+\tuint16_t nb_tx_queues;\n };\n \n enum npc_kpu_parser_flag {\n@@ -448,6 +449,7 @@ int npc_parse_mark_item(struct npc_parse_state *pst);\n int npc_parse_pre_l2(struct npc_parse_state *pst);\n int npc_parse_higig2_hdr(struct npc_parse_state *pst);\n int npc_parse_cpt_hdr(struct npc_parse_state *pst);\n+int npc_parse_tx_queue(struct npc_parse_state *pst);\n int npc_parse_la(struct npc_parse_state *pst);\n int npc_parse_lb(struct npc_parse_state *pst);\n int npc_parse_lc(struct npc_parse_state *pst);\n", "prefixes": [ "1/2" ] }