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GET /api/patches/127013/?format=api
http://patches.dpdk.org/api/patches/127013/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230518151638.1207021-20-qiming.yang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230518151638.1207021-20-qiming.yang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230518151638.1207021-20-qiming.yang@intel.com", "date": "2023-05-18T15:16:37", "name": "[v2,19/20] net/ice/base: offer memory config for schedual node", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c1a501409133b091a6f5f87ae9f37f570d40ad01", "submitter": { "id": 522, "url": "http://patches.dpdk.org/api/people/522/?format=api", "name": "Qiming Yang", "email": "qiming.yang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230518151638.1207021-20-qiming.yang@intel.com/mbox/", "series": [ { "id": 28063, "url": "http://patches.dpdk.org/api/series/28063/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28063", "date": "2023-05-18T15:16:18", "name": "net/ice/base: code update", "version": 2, "mbox": "http://patches.dpdk.org/series/28063/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/127013/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/127013/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DE33E42AF1;\n\tThu, 18 May 2023 17:36:41 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E839A42F8A;\n\tThu, 18 May 2023 17:34:50 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by mails.dpdk.org (Postfix) with ESMTP id E650142DB7\n for <dev@dpdk.org>; Thu, 18 May 2023 17:34:48 +0200 (CEST)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 May 2023 08:34:48 -0700", "from dpdk-qiming3.sh.intel.com ([10.67.111.4])\n by fmsmga007.fm.intel.com with ESMTP; 18 May 2023 08:34:47 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1684424089; x=1715960089;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=sKgGRNyDtUYH8/088YHo8s2gI8KM/3VbHCXWntBZc/w=;\n b=YVHMhTSoPOEpoBOlyQ2jH+gtUU7Q7kb7t39JNydF76aKodzI5UvKNsYu\n xQ8duUCXsQi4bEMmskIP2NOKog3Aqf4R0iq/0CnQVwKAHn5YhXUUB6Kd/\n lHiuiCDFZ8Cesj+j0vHRmLExgs/DyjD5NezWEacwgTrUmiXJpF6QMtjp1\n 7PLl3UxvvuV81s4NT0O/ZoQzbl3AVXMGHHSGvxvJE4ZpmIMaNs537cs9p\n cfffC0F+KESprI05ozXcQCTcDF2Zjm4vMXF9+RWVWW9vxDs5582oCQXl+\n qNUPS/Eg+6jhxbyqCfbLOKkIWIvGpXOZ6Hy3HkvXjixR5BR/PUSGxkmy/ g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10714\"; a=\"341527814\"", "E=Sophos;i=\"5.99,285,1677571200\"; d=\"scan'208\";a=\"341527814\"", "E=McAfee;i=\"6600,9927,10714\"; a=\"705235272\"", "E=Sophos;i=\"5.99,285,1677571200\"; d=\"scan'208\";a=\"705235272\"" ], "X-ExtLoop1": "1", "From": "Qiming Yang <qiming.yang@intel.com>", "To": "dev@dpdk.org", "Cc": "qi.z.zhang@intel.com, Qiming Yang <qiming.yang@intel.com>,\n Michal Wilczynski <michal.wilczynski@intel.com>", "Subject": "[PATCH v2 19/20] net/ice/base: offer memory config for schedual node", "Date": "Thu, 18 May 2023 15:16:37 +0000", "Message-Id": "<20230518151638.1207021-20-qiming.yang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230518151638.1207021-1-qiming.yang@intel.com>", "References": "<20230427062001.478032-1-qiming.yang@intel.com>\n <20230518151638.1207021-1-qiming.yang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add an option to pre-allocate memory for ice_sched_node struct. Add\nnew arguments to ice_sched_add() and ice_sched_add_elems() that allow\nfor pre-allocation of memory for ice_sched_node struct.\n\nSigned-off-by: Michal Wilczynski <michal.wilczynski@intel.com>\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 2 +-\n drivers/net/ice/base/ice_dcb.c | 2 +-\n drivers/net/ice/base/ice_sched.c | 24 ++++++++++++++++++------\n drivers/net/ice/base/ice_sched.h | 3 ++-\n 4 files changed, 22 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex f253e2f213..f7f43cd7e0 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -5210,7 +5210,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,\n \tq_ctx->q_teid = LE32_TO_CPU(node.node_teid);\n \n \t/* add a leaf node into scheduler tree queue layer */\n-\tstatus = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);\n+\tstatus = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node, NULL);\n \tif (!status)\n \t\tstatus = ice_sched_replay_q_bw(pi, q_ctx);\n \ndiff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c\nindex 2a308b02bf..cc4e28a702 100644\n--- a/drivers/net/ice/base/ice_dcb.c\n+++ b/drivers/net/ice/base/ice_dcb.c\n@@ -1624,7 +1624,7 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,\n \t\t/* new TC */\n \t\tstatus = ice_sched_query_elem(pi->hw, teid2, &elem);\n \t\tif (!status)\n-\t\t\tstatus = ice_sched_add_node(pi, 1, &elem);\n+\t\t\tstatus = ice_sched_add_node(pi, 1, &elem, NULL);\n \t\tif (status)\n \t\t\tbreak;\n \t\t/* update the TC number */\ndiff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex f558eccb93..a4d31647fe 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -143,12 +143,14 @@ ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,\n * @pi: port information structure\n * @layer: Scheduler layer of the node\n * @info: Scheduler element information from firmware\n+ * @prealloc_node: preallocated ice_sched_node struct for SW DB\n *\n * This function inserts a scheduler node to the SW DB.\n */\n enum ice_status\n ice_sched_add_node(struct ice_port_info *pi, u8 layer,\n-\t\t struct ice_aqc_txsched_elem_data *info)\n+\t\t struct ice_aqc_txsched_elem_data *info,\n+\t\t struct ice_sched_node *prealloc_node)\n {\n \tstruct ice_aqc_txsched_elem_data elem;\n \tstruct ice_sched_node *parent;\n@@ -176,7 +178,11 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,\n \tstatus = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);\n \tif (status)\n \t\treturn status;\n-\tnode = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));\n+\n+\tif (prealloc_node)\n+\t\tnode = prealloc_node;\n+\telse\n+\t\tnode = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));\n \tif (!node)\n \t\treturn ICE_ERR_NO_MEMORY;\n \tif (hw->max_children[layer]) {\n@@ -901,13 +907,15 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,\n * @num_nodes: number of nodes\n * @num_nodes_added: pointer to num nodes added\n * @first_node_teid: if new nodes are added then return the TEID of first node\n+ * @prealloc_nodes: preallocated nodes struct for software DB\n *\n * This function add nodes to HW as well as to SW DB for a given layer\n */\n static enum ice_status\n ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n \t\t struct ice_sched_node *parent, u8 layer, u16 num_nodes,\n-\t\t u16 *num_nodes_added, u32 *first_node_teid)\n+\t\t u16 *num_nodes_added, u32 *first_node_teid,\n+\t\t struct ice_sched_node **prealloc_nodes)\n {\n \tstruct ice_sched_node *prev, *new_node;\n \tstruct ice_aqc_add_elem *buf;\n@@ -953,7 +961,11 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n \t*num_nodes_added = num_nodes;\n \t/* add nodes to the SW DB */\n \tfor (i = 0; i < num_nodes; i++) {\n-\t\tstatus = ice_sched_add_node(pi, layer, &buf->generic[i]);\n+\t\tif (prealloc_nodes)\n+\t\t\tstatus = ice_sched_add_node(pi, layer, &buf->generic[i], prealloc_nodes[i]);\n+\t\telse\n+\t\t\tstatus = ice_sched_add_node(pi, layer, &buf->generic[i], NULL);\n+\n \t\tif (status != ICE_SUCCESS) {\n \t\t\tice_debug(hw, ICE_DBG_SCHED, \"add nodes in SW DB failed status =%d\\n\",\n \t\t\t\t status);\n@@ -1032,7 +1044,7 @@ ice_sched_add_nodes_to_hw_layer(struct ice_port_info *pi,\n \t}\n \n \treturn ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,\n-\t\t\t\t num_nodes_added, first_node_teid);\n+\t\t\t\t num_nodes_added, first_node_teid, NULL);\n }\n \n /**\n@@ -1292,7 +1304,7 @@ enum ice_status ice_sched_init_port(struct ice_port_info *pi)\n \t\t\t ICE_AQC_ELEM_TYPE_ENTRY_POINT)\n \t\t\t\thw->sw_entry_point_layer = j;\n \n-\t\t\tstatus = ice_sched_add_node(pi, j, &buf[i].generic[j]);\n+\t\t\tstatus = ice_sched_add_node(pi, j, &buf[i].generic[j], NULL);\n \t\t\tif (status)\n \t\t\t\tgoto err_init_port;\n \t\t}\ndiff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h\nindex c54f5ca9a0..4b68f3f535 100644\n--- a/drivers/net/ice/base/ice_sched.h\n+++ b/drivers/net/ice/base/ice_sched.h\n@@ -117,7 +117,8 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid);\n /* Add a scheduling node into SW DB for given info */\n enum ice_status\n ice_sched_add_node(struct ice_port_info *pi, u8 layer,\n-\t\t struct ice_aqc_txsched_elem_data *info);\n+\t\t struct ice_aqc_txsched_elem_data *info,\n+\t\t struct ice_sched_node *prealloc_node);\n void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node);\n struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc);\n struct ice_sched_node *\n", "prefixes": [ "v2", "19/20" ] }{ "id": 127013, "url": "