Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/127007/?format=api
{ "id": 127007, "url": "http://patches.dpdk.org/api/patches/127007/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230518151638.1207021-14-qiming.yang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230518151638.1207021-14-qiming.yang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230518151638.1207021-14-qiming.yang@intel.com", "date": "2023-05-18T15:16:31", "name": "[v2,13/20] net/ice/base: add function to get rxq context", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "057bd2724c3ebaccaf0bd1e27400b121afc9e364", "submitter": { "id": 522, "url": "http://patches.dpdk.org/api/people/522/?format=api", "name": "Qiming Yang", "email": "qiming.yang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230518151638.1207021-14-qiming.yang@intel.com/mbox/", "series": [ { "id": 28063, "url": "http://patches.dpdk.org/api/series/28063/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28063", "date": "2023-05-18T15:16:18", "name": "net/ice/base: code update", "version": 2, "mbox": "http://patches.dpdk.org/series/28063/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/127007/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/127007/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 60B8D42AF1;\n\tThu, 18 May 2023 17:36:07 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 87E9142D8F;\n\tThu, 18 May 2023 17:34:42 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by mails.dpdk.org (Postfix) with ESMTP id 7C34F42D46\n for <dev@dpdk.org>; Thu, 18 May 2023 17:34:40 +0200 (CEST)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 May 2023 08:34:40 -0700", "from dpdk-qiming3.sh.intel.com ([10.67.111.4])\n by fmsmga007.fm.intel.com with ESMTP; 18 May 2023 08:34:38 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1684424080; x=1715960080;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=WmOsaiQGrFn9mOCBYPB2lAsKq9TPGPsDoGMOTry00L8=;\n b=BFgH9fVNLBmkh+c+vAkLWn4afNUNNLsGRA2mY8ttWUTPq2RBDOo0S7Cp\n lyMnRvyB+GwvbzQu45BUA0//sPQPKJ0U5E7yK44rZbu+7WIkkM711Dqu5\n 3UHcs0gIoUqCTbFucwyLE0FDHhsBYYHFPmiT4U/rF9hxM+hbD9yWJQQD6\n 5m9P24f4bCWk9+DUV7tv8tRuXrj6tncsPICB8FgcVbo07UciAASHQN5mN\n OGY/4BQD6kDvMjLeXTgrnBOU909YIXvPgRvIPQJbwU9YyZoUw9hpdN2qb\n cgWjgBIkYAkywQ6lRFE2QCaefNPlkKwdPbZAJDhii8/X7leej0WQn32uP g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10714\"; a=\"341527728\"", "E=Sophos;i=\"5.99,285,1677571200\"; d=\"scan'208\";a=\"341527728\"", "E=McAfee;i=\"6600,9927,10714\"; a=\"705235163\"", "E=Sophos;i=\"5.99,285,1677571200\"; d=\"scan'208\";a=\"705235163\"" ], "X-ExtLoop1": "1", "From": "Qiming Yang <qiming.yang@intel.com>", "To": "dev@dpdk.org", "Cc": "qi.z.zhang@intel.com, Qiming Yang <qiming.yang@intel.com>,\n Yahui Cao <yahui.cao@intel.com>", "Subject": "[PATCH v2 13/20] net/ice/base: add function to get rxq context", "Date": "Thu, 18 May 2023 15:16:31 +0000", "Message-Id": "<20230518151638.1207021-14-qiming.yang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230518151638.1207021-1-qiming.yang@intel.com>", "References": "<20230427062001.478032-1-qiming.yang@intel.com>\n <20230518151638.1207021-1-qiming.yang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch exports rxq context which is consumed by linux live migration\ndriver to save device state.\n\nSigned-off-by: Yahui Cao <yahui.cao@intel.com>\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 67 ++++++++++++++++++++++++++++---\n drivers/net/ice/base/ice_common.h | 7 +++-\n 2 files changed, 67 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex a958ecef83..9992d0ad4d 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -1381,6 +1381,37 @@ ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)\n \treturn ICE_SUCCESS;\n }\n \n+/**\n+ * ice_copy_rxq_ctx_from_hw - Copy rxq context register from HW\n+ * @hw: pointer to the hardware structure\n+ * @ice_rxq_ctx: pointer to the rxq context\n+ * @rxq_index: the index of the Rx queue\n+ *\n+ * Copies rxq context from HW register space to dense structure\n+ */\n+static enum ice_status\n+ice_copy_rxq_ctx_from_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)\n+{\n+\tu8 i;\n+\n+\tif (!ice_rxq_ctx)\n+\t\treturn ICE_ERR_BAD_PTR;\n+\n+\tif (rxq_index > QRX_CTRL_MAX_INDEX)\n+\t\treturn ICE_ERR_PARAM;\n+\n+\t/* Copy each dword separately from HW */\n+\tfor (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) {\n+\t\tu32 *ctx = (u32 *)(ice_rxq_ctx + (i * sizeof(u32)));\n+\n+\t\t*ctx = rd32(hw, QRX_CONTEXT(i, rxq_index));\n+\n+\t\tice_debug(hw, ICE_DBG_QCTX, \"qrxdata[%d]: %08X\\n\", i, *ctx);\n+\t}\n+\n+\treturn ICE_SUCCESS;\n+}\n+\n /* LAN Rx Queue Context */\n static const struct ice_ctx_ele ice_rlan_ctx_info[] = {\n \t/* Field\t\tWidth\tLSB */\n@@ -1432,6 +1463,32 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,\n \treturn ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index);\n }\n \n+/**\n+ * ice_read_rxq_ctx - Read rxq context from HW\n+ * @hw: pointer to the hardware structure\n+ * @rlan_ctx: pointer to the rxq context\n+ * @rxq_index: the index of the Rx queue\n+ *\n+ * Read rxq context from HW register space and then converts it from dense\n+ * structure to sparse\n+ */\n+enum ice_status\n+ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,\n+\t\t u32 rxq_index)\n+{\n+\tu8 ctx_buf[ICE_RXQ_CTX_SZ] = { 0 };\n+\tenum ice_status status;\n+\n+\tif (!rlan_ctx)\n+\t\treturn ICE_ERR_BAD_PTR;\n+\n+\tstatus = ice_copy_rxq_ctx_from_hw(hw, ctx_buf, rxq_index);\n+\tif (status)\n+\t\treturn status;\n+\n+\treturn ice_get_ctx(ctx_buf, (u8 *)rlan_ctx, ice_rlan_ctx_info);\n+}\n+\n /**\n * ice_clear_rxq_ctx\n * @hw: pointer to the hardware structure\n@@ -4824,7 +4881,7 @@ ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,\n * @ce_info: a description of the struct to be filled\n */\n static void\n-ice_read_byte(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)\n+ice_read_byte(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)\n {\n \tu8 dest_byte, mask;\n \tu8 *src, *target;\n@@ -4860,7 +4917,7 @@ ice_read_byte(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)\n * @ce_info: a description of the struct to be filled\n */\n static void\n-ice_read_word(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)\n+ice_read_word(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)\n {\n \tu16 dest_word, mask;\n \tu8 *src, *target;\n@@ -4903,7 +4960,7 @@ ice_read_word(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)\n * @ce_info: a description of the struct to be filled\n */\n static void\n-ice_read_dword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)\n+ice_read_dword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)\n {\n \tu32 dest_dword, mask;\n \t__le32 src_dword;\n@@ -4954,7 +5011,7 @@ ice_read_dword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)\n * @ce_info: a description of the struct to be filled\n */\n static void\n-ice_read_qword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)\n+ice_read_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)\n {\n \tu64 dest_qword, mask;\n \t__le64 src_qword;\n@@ -5005,7 +5062,7 @@ ice_read_qword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)\n * @ce_info: a description of the structure to be read from\n */\n enum ice_status\n-ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)\n+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)\n {\n \tint f;\n \ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex e1febfb0c4..aff361e5aa 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -86,6 +86,9 @@ ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,\n enum ice_status\n ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,\n \t\t u32 rxq_index);\n+enum ice_status\n+ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,\n+\t\t u32 rxq_index);\n enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);\n enum ice_status\n ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index);\n@@ -128,6 +131,8 @@ extern const struct ice_ctx_ele ice_tlan_ctx_info[];\n enum ice_status\n ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,\n \t const struct ice_ctx_ele *ce_info);\n+enum ice_status\n+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info);\n \n enum ice_status\n ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,\n@@ -221,8 +226,6 @@ ice_aq_read_topo_dev_nvm(struct ice_hw *hw,\n \t\t\t u32 start_address, u8 *buf, u8 buf_size,\n \t\t\t struct ice_sq_cd *cd);\n \n-enum ice_status\n-ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);\n enum ice_status\n ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,\n \t\tu16 *q_handle, u16 *q_ids, u32 *q_teids,\n", "prefixes": [ "v2", "13/20" ] }