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GET /api/patches/124701/?format=api
{ "id": 124701, "url": "http://patches.dpdk.org/api/patches/124701/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230302212057.1114863-12-mingxia.liu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230302212057.1114863-12-mingxia.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230302212057.1114863-12-mingxia.liu@intel.com", "date": "2023-03-02T21:20:47", "name": "[v9,11/21] net/cpfl: support write back based on ITR expire", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "72d4f27dbd1211b9329fc81b3927ee1baf95b1bc", "submitter": { "id": 2514, "url": "http://patches.dpdk.org/api/people/2514/?format=api", "name": "Liu, Mingxia", "email": "mingxia.liu@intel.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230302212057.1114863-12-mingxia.liu@intel.com/mbox/", "series": [ { "id": 27228, "url": "http://patches.dpdk.org/api/series/27228/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27228", "date": "2023-03-02T21:20:36", "name": "add support for cpfl PMD in DPDK", "version": 9, "mbox": "http://patches.dpdk.org/series/27228/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/124701/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/124701/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B2C9C41DB5;\n\tThu, 2 Mar 2023 14:07:24 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 66C0842D4E;\n\tThu, 2 Mar 2023 14:06:24 +0100 (CET)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by mails.dpdk.org (Postfix) with ESMTP id A086642D3F\n for <dev@dpdk.org>; Thu, 2 Mar 2023 14:06:22 +0100 (CET)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 02 Mar 2023 05:06:22 -0800", "from dpdk-mingxial-ice.sh.intel.com ([10.67.110.191])\n by orsmga001.jf.intel.com with ESMTP; 02 Mar 2023 05:06:20 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1677762382; x=1709298382;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=UQA6XK7bnikXi6staD7Wc1Wgrh56bXc9g6uNXYgkw6s=;\n b=ZWOfn/Csa3wPG7RM+N1QzTgNeTuZIsVdzHvHGEgvltq09GDdxrTr1iSE\n dw7YoeDlZlseXUrlreUkYTnlpBSxgGDSYskJ4tzvGrvmCVkrrR5FMIL8J\n oZHkUDrlc7mc7aJR3KYt9jsbymoUom0X9TZ3DUhjNnQXyfakZbGFAsG+6\n vPNcSPp5gx+nI67aWxIhVaXlV1Qab+wCsdEXyOyqEfCWTrC1Z6gFA/vtj\n 6lr0rtLEubFbg5inb6uEynTb3g3efNRwjSo3TeptiDbSeAbv1wVkFdRe0\n QWcpA6nM+xhmnBz5wya+TiwFAg48kRrI+7Q3U2jh37Qd9ccbMRxV7Fxcx A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10636\"; a=\"322988222\"", "E=Sophos;i=\"5.98,227,1673942400\"; d=\"scan'208\";a=\"322988222\"", "E=McAfee;i=\"6500,9779,10636\"; a=\"707406415\"", "E=Sophos;i=\"5.98,227,1673942400\"; d=\"scan'208\";a=\"707406415\"" ], "X-ExtLoop1": "1", "From": "Mingxia Liu <mingxia.liu@intel.com>", "To": "dev@dpdk.org,\n\tbeilei.xing@intel.com,\n\tyuying.zhang@intel.com", "Cc": "Mingxia Liu <mingxia.liu@intel.com>", "Subject": "[PATCH v9 11/21] net/cpfl: support write back based on ITR expire", "Date": "Thu, 2 Mar 2023 21:20:47 +0000", "Message-Id": "<20230302212057.1114863-12-mingxia.liu@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20230302212057.1114863-1-mingxia.liu@intel.com>", "References": "<20230302103527.931071-1-mingxia.liu@intel.com>\n <20230302212057.1114863-1-mingxia.liu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "ITR is the interval between two interrupts, it can be understood\nas a timer here. WB_ON_ITR(write back on ITR expire) is used for\nreceiving packets without interrupts or full cache line, then\npackets can be received one by one.\n\nTo enable WB_ON_ITR, need to enable some interrupt with\n'idpf_vport_irq_map_config()' first.\n\nSigned-off-by: Mingxia Liu <mingxia.liu@intel.com>\n---\n drivers/net/cpfl/cpfl_ethdev.c | 45 +++++++++++++++++++++++++++++++++-\n drivers/net/cpfl/cpfl_ethdev.h | 2 ++\n 2 files changed, 46 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c\nindex c3a6104dac..ef40ae08df 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.c\n+++ b/drivers/net/cpfl/cpfl_ethdev.c\n@@ -209,6 +209,15 @@ cpfl_dev_configure(struct rte_eth_dev *dev)\n \treturn 0;\n }\n \n+static int\n+cpfl_config_rx_queues_irqs(struct rte_eth_dev *dev)\n+{\n+\tstruct idpf_vport *vport = dev->data->dev_private;\n+\tuint16_t nb_rx_queues = dev->data->nb_rx_queues;\n+\n+\treturn idpf_vport_irq_map_config(vport, nb_rx_queues);\n+}\n+\n static int\n cpfl_start_queues(struct rte_eth_dev *dev)\n {\n@@ -246,12 +255,37 @@ static int\n cpfl_dev_start(struct rte_eth_dev *dev)\n {\n \tstruct idpf_vport *vport = dev->data->dev_private;\n+\tstruct idpf_adapter *base = vport->adapter;\n+\tstruct cpfl_adapter_ext *adapter = CPFL_ADAPTER_TO_EXT(base);\n+\tuint16_t num_allocated_vectors = base->caps.num_allocated_vectors;\n+\tuint16_t req_vecs_num;\n \tint ret;\n \n+\treq_vecs_num = CPFL_DFLT_Q_VEC_NUM;\n+\tif (req_vecs_num + adapter->used_vecs_num > num_allocated_vectors) {\n+\t\tPMD_DRV_LOG(ERR, \"The accumulated request vectors' number should be less than %d\",\n+\t\t\t num_allocated_vectors);\n+\t\tret = -EINVAL;\n+\t\tgoto err_vec;\n+\t}\n+\n+\tret = idpf_vc_vectors_alloc(vport, req_vecs_num);\n+\tif (ret != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to allocate interrupt vectors\");\n+\t\tgoto err_vec;\n+\t}\n+\tadapter->used_vecs_num += req_vecs_num;\n+\n+\tret = cpfl_config_rx_queues_irqs(dev);\n+\tif (ret != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to configure irqs\");\n+\t\tgoto err_irq;\n+\t}\n+\n \tret = cpfl_start_queues(dev);\n \tif (ret != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to start queues\");\n-\t\treturn ret;\n+\t\tgoto err_startq;\n \t}\n \n \tcpfl_set_rx_function(dev);\n@@ -269,6 +303,11 @@ cpfl_dev_start(struct rte_eth_dev *dev)\n \n err_vport:\n \tcpfl_stop_queues(dev);\n+err_startq:\n+\tidpf_vport_irq_unmap_config(vport, dev->data->nb_rx_queues);\n+err_irq:\n+\tidpf_vc_vectors_dealloc(vport);\n+err_vec:\n \treturn ret;\n }\n \n@@ -284,6 +323,10 @@ cpfl_dev_stop(struct rte_eth_dev *dev)\n \n \tcpfl_stop_queues(dev);\n \n+\tidpf_vport_irq_unmap_config(vport, dev->data->nb_rx_queues);\n+\n+\tidpf_vc_vectors_dealloc(vport);\n+\n \tvport->stopped = 1;\n \n \treturn 0;\ndiff --git a/drivers/net/cpfl/cpfl_ethdev.h b/drivers/net/cpfl/cpfl_ethdev.h\nindex 9738e89ca8..4d1441ae64 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.h\n+++ b/drivers/net/cpfl/cpfl_ethdev.h\n@@ -25,6 +25,8 @@\n \n #define CPFL_INVALID_VPORT_IDX\t0xffff\n \n+#define CPFL_DFLT_Q_VEC_NUM\t1\n+\n #define CPFL_MIN_BUF_SIZE\t1024\n #define CPFL_MAX_FRAME_SIZE\t9728\n #define CPFL_DEFAULT_MTU\tRTE_ETHER_MTU\n", "prefixes": [ "v9", "11/21" ] }